459 lines
10 KiB
C
459 lines
10 KiB
C
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2012-04-25 weety first version
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*/
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#include <rtdevice.h>
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#define DBG_TAG "I2C"
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#ifdef RT_I2C_BITOPS_DEBUG
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#define DBG_LVL DBG_LOG
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#else
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#define DBG_LVL DBG_INFO
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#endif
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#include <rtdbg.h>
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#define SET_SDA(ops, val) ops->set_sda(ops->data, val)
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#define SET_SCL(ops, val) ops->set_scl(ops->data, val)
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#define GET_SDA(ops) ops->get_sda(ops->data)
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#define GET_SCL(ops) ops->get_scl(ops->data)
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rt_inline void i2c_delay(struct rt_i2c_bit_ops *ops)
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{
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ops->udelay((ops->delay_us + 1) >> 1);
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}
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rt_inline void i2c_delay2(struct rt_i2c_bit_ops *ops)
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{
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ops->udelay(ops->delay_us);
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}
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#define SDA_L(ops) SET_SDA(ops, 0)
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#define SDA_H(ops) SET_SDA(ops, 1)
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#define SCL_L(ops) SET_SCL(ops, 0)
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/**
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* release scl line, and wait scl line to high.
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*/
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static rt_err_t SCL_H(struct rt_i2c_bit_ops *ops)
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{
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rt_tick_t start;
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SET_SCL(ops, 1);
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if (!ops->get_scl)
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goto done;
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start = rt_tick_get();
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while (!GET_SCL(ops))
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{
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if ((rt_tick_get() - start) > ops->timeout)
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return -RT_ETIMEOUT;
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i2c_delay(ops);
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}
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#ifdef RT_I2C_BITOPS_DEBUG
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if (rt_tick_get() != start)
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{
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LOG_D("wait %ld tick for SCL line to go high",
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rt_tick_get() - start);
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}
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#endif
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done:
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i2c_delay(ops);
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return RT_EOK;
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}
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static void i2c_start(struct rt_i2c_bit_ops *ops)
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{
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#ifdef RT_I2C_BITOPS_DEBUG
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if (ops->get_scl && !GET_SCL(ops))
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{
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LOG_E("I2C bus error, SCL line low");
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}
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if (ops->get_sda && !GET_SDA(ops))
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{
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LOG_E("I2C bus error, SDA line low");
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}
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#endif
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SDA_L(ops);
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i2c_delay(ops);
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SCL_L(ops);
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}
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static void i2c_restart(struct rt_i2c_bit_ops *ops)
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{
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SDA_H(ops);
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SCL_H(ops);
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i2c_delay(ops);
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SDA_L(ops);
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i2c_delay(ops);
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SCL_L(ops);
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}
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static void i2c_stop(struct rt_i2c_bit_ops *ops)
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{
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SDA_L(ops);
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i2c_delay(ops);
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SCL_H(ops);
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i2c_delay(ops);
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SDA_H(ops);
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i2c_delay2(ops);
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}
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rt_inline rt_bool_t i2c_waitack(struct rt_i2c_bit_ops *ops)
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{
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rt_bool_t ack;
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SDA_H(ops);
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i2c_delay(ops);
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if (SCL_H(ops) < 0)
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{
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LOG_W("wait ack timeout");
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return -RT_ETIMEOUT;
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}
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ack = !GET_SDA(ops); /* ACK : SDA pin is pulled low */
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LOG_D("%s", ack ? "ACK" : "NACK");
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SCL_L(ops);
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return ack;
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}
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static rt_int32_t i2c_writeb(struct rt_i2c_bus_device *bus, rt_uint8_t data)
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{
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rt_int32_t i;
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rt_uint8_t bit;
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struct rt_i2c_bit_ops *ops = (struct rt_i2c_bit_ops *)bus->priv;
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for (i = 7; i >= 0; i--)
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{
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SCL_L(ops);
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bit = (data >> i) & 1;
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SET_SDA(ops, bit);
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i2c_delay(ops);
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if (SCL_H(ops) < 0)
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{
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LOG_D("i2c_writeb: 0x%02x, "
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"wait scl pin high timeout at bit %d",
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data, i);
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return -RT_ETIMEOUT;
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}
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}
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SCL_L(ops);
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i2c_delay(ops);
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return i2c_waitack(ops);
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}
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static rt_int32_t i2c_readb(struct rt_i2c_bus_device *bus)
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{
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rt_uint8_t i;
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rt_uint8_t data = 0;
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struct rt_i2c_bit_ops *ops = (struct rt_i2c_bit_ops *)bus->priv;
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SDA_H(ops);
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i2c_delay(ops);
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for (i = 0; i < 8; i++)
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{
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data <<= 1;
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if (SCL_H(ops) < 0)
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{
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LOG_D("i2c_readb: wait scl pin high "
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"timeout at bit %d", 7 - i);
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return -RT_ETIMEOUT;
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}
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if (GET_SDA(ops))
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data |= 1;
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SCL_L(ops);
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i2c_delay2(ops);
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}
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return data;
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}
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static rt_ssize_t i2c_send_bytes(struct rt_i2c_bus_device *bus,
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struct rt_i2c_msg *msg)
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{
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rt_int32_t ret;
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rt_size_t bytes = 0;
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const rt_uint8_t *ptr = msg->buf;
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rt_int32_t count = msg->len;
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rt_uint16_t ignore_nack = msg->flags & RT_I2C_IGNORE_NACK;
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while (count > 0)
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{
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ret = i2c_writeb(bus, *ptr);
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if ((ret > 0) || (ignore_nack && (ret == 0)))
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{
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count --;
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ptr ++;
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bytes ++;
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}
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else if (ret == 0)
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{
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LOG_D("send bytes: NACK.");
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return 0;
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}
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else
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{
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LOG_E("send bytes: error %d", ret);
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return ret;
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}
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}
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return bytes;
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}
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static rt_err_t i2c_send_ack_or_nack(struct rt_i2c_bus_device *bus, int ack)
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{
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struct rt_i2c_bit_ops *ops = (struct rt_i2c_bit_ops *)bus->priv;
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if (ack)
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SET_SDA(ops, 0);
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i2c_delay(ops);
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if (SCL_H(ops) < 0)
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{
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LOG_E("ACK or NACK timeout.");
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return -RT_ETIMEOUT;
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}
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SCL_L(ops);
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return RT_EOK;
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}
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static rt_ssize_t i2c_recv_bytes(struct rt_i2c_bus_device *bus,
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struct rt_i2c_msg *msg)
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{
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rt_int32_t val;
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rt_int32_t bytes = 0; /* actual bytes */
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rt_uint8_t *ptr = msg->buf;
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rt_int32_t count = msg->len;
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const rt_uint32_t flags = msg->flags;
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while (count > 0)
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{
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val = i2c_readb(bus);
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if (val >= 0)
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{
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*ptr = val;
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bytes ++;
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}
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else
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{
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break;
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}
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ptr ++;
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count --;
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LOG_D("recieve bytes: 0x%02x, %s",
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val, (flags & RT_I2C_NO_READ_ACK) ?
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"(No ACK/NACK)" : (count ? "ACK" : "NACK"));
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if (!(flags & RT_I2C_NO_READ_ACK))
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{
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val = i2c_send_ack_or_nack(bus, count);
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if (val < 0)
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return val;
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}
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}
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return bytes;
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}
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static rt_int32_t i2c_send_address(struct rt_i2c_bus_device *bus,
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rt_uint8_t addr,
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rt_int32_t retries)
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{
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struct rt_i2c_bit_ops *ops = (struct rt_i2c_bit_ops *)bus->priv;
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rt_int32_t i;
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rt_err_t ret = 0;
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for (i = 0; i <= retries; i++)
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{
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ret = i2c_writeb(bus, addr);
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if (ret == 1 || i == retries)
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break;
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LOG_D("send stop condition");
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i2c_stop(ops);
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i2c_delay2(ops);
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LOG_D("send start condition");
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i2c_start(ops);
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}
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return ret;
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}
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static rt_err_t i2c_bit_send_address(struct rt_i2c_bus_device *bus,
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struct rt_i2c_msg *msg)
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{
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rt_uint16_t flags = msg->flags;
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rt_uint16_t ignore_nack = msg->flags & RT_I2C_IGNORE_NACK;
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struct rt_i2c_bit_ops *ops = (struct rt_i2c_bit_ops *)bus->priv;
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rt_uint8_t addr1, addr2;
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rt_int32_t retries;
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rt_err_t ret;
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retries = ignore_nack ? 0 : bus->retries;
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if (flags & RT_I2C_ADDR_10BIT)
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{
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addr1 = 0xf0 | ((msg->addr >> 7) & 0x06);
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addr2 = msg->addr & 0xff;
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LOG_D("addr1: %d, addr2: %d", addr1, addr2);
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ret = i2c_send_address(bus, addr1, retries);
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if ((ret != 1) && !ignore_nack)
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{
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LOG_W("NACK: sending first addr");
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return -RT_EIO;
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}
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ret = i2c_writeb(bus, addr2);
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if ((ret != 1) && !ignore_nack)
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{
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LOG_W("NACK: sending second addr");
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return -RT_EIO;
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}
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if (flags & RT_I2C_RD)
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{
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LOG_D("send repeated start condition");
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i2c_restart(ops);
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addr1 |= 0x01;
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ret = i2c_send_address(bus, addr1, retries);
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if ((ret != 1) && !ignore_nack)
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{
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LOG_E("NACK: sending repeated addr");
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return -RT_EIO;
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}
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}
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}
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else
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{
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/* 7-bit addr */
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addr1 = msg->addr << 1;
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if (flags & RT_I2C_RD)
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addr1 |= 1;
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ret = i2c_send_address(bus, addr1, retries);
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if ((ret != 1) && !ignore_nack)
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return -RT_EIO;
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}
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return RT_EOK;
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}
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static rt_ssize_t i2c_bit_xfer(struct rt_i2c_bus_device *bus,
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struct rt_i2c_msg msgs[],
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rt_uint32_t num)
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{
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struct rt_i2c_msg *msg;
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struct rt_i2c_bit_ops *ops = (struct rt_i2c_bit_ops *)bus->priv;
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rt_int32_t ret;
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rt_uint32_t i;
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rt_uint16_t ignore_nack;
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if (num == 0) return 0;
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for (i = 0; i < num; i++)
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{
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msg = &msgs[i];
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ignore_nack = msg->flags & RT_I2C_IGNORE_NACK;
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if (!(msg->flags & RT_I2C_NO_START))
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{
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if (i)
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{
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i2c_restart(ops);
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}
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else
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{
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LOG_D("send start condition");
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||
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|
i2c_start(ops);
|
||
|
|
}
|
||
|
|
ret = i2c_bit_send_address(bus, msg);
|
||
|
|
if ((ret != RT_EOK) && !ignore_nack)
|
||
|
|
{
|
||
|
|
LOG_D("receive NACK from device addr 0x%02x msg %d",
|
||
|
|
msgs[i].addr, i);
|
||
|
|
goto out;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
if (msg->flags & RT_I2C_RD)
|
||
|
|
{
|
||
|
|
ret = i2c_recv_bytes(bus, msg);
|
||
|
|
if (ret >= 1)
|
||
|
|
{
|
||
|
|
LOG_D("read %d byte%s", ret, ret == 1 ? "" : "s");
|
||
|
|
}
|
||
|
|
if (ret < msg->len)
|
||
|
|
{
|
||
|
|
if (ret >= 0)
|
||
|
|
ret = -RT_EIO;
|
||
|
|
goto out;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
ret = i2c_send_bytes(bus, msg);
|
||
|
|
if (ret >= 1)
|
||
|
|
{
|
||
|
|
LOG_D("write %d byte%s", ret, ret == 1 ? "" : "s");
|
||
|
|
}
|
||
|
|
if (ret < msg->len)
|
||
|
|
{
|
||
|
|
if (ret >= 0)
|
||
|
|
ret = -RT_ERROR;
|
||
|
|
goto out;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
ret = i;
|
||
|
|
|
||
|
|
out:
|
||
|
|
if (!(msg->flags & RT_I2C_NO_STOP))
|
||
|
|
{
|
||
|
|
LOG_D("send stop condition");
|
||
|
|
i2c_stop(ops);
|
||
|
|
}
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct rt_i2c_bus_device_ops i2c_bit_bus_ops =
|
||
|
|
{
|
||
|
|
i2c_bit_xfer,
|
||
|
|
RT_NULL,
|
||
|
|
RT_NULL
|
||
|
|
};
|
||
|
|
|
||
|
|
rt_err_t rt_i2c_bit_add_bus(struct rt_i2c_bus_device *bus,
|
||
|
|
const char *bus_name)
|
||
|
|
{
|
||
|
|
bus->ops = &i2c_bit_bus_ops;
|
||
|
|
|
||
|
|
return rt_i2c_bus_device_register(bus, bus_name);
|
||
|
|
}
|