diff --git a/make_riscv.py b/make_riscv.py index 1c4bf3a..fc470ed 100644 --- a/make_riscv.py +++ b/make_riscv.py @@ -7,7 +7,7 @@ import dataclasses from multiprocessing import Process,Queue,Value,cpu_count - +# os.environ["PATH"]="/home/andy/source/my_riscv/bin:"+os.environ["PATH"] CC="riscv64-unknown-elf-gcc" OBJCPY="riscv64-unknown-elf-objcopy" @@ -24,7 +24,7 @@ CFLAG=[ "-Wall", "-Werror", "-g", - "-O0", + "-Os", "-fno-omit-frame-pointer", "-msave-restore" ] @@ -244,12 +244,30 @@ def main(): build_target(SRC) os.system(f"{OBJCPY} -O binary {OUTPUT}/{TARGET}.elf {OUTPUT}/{TARGET}.bin") os.system(f"{OBJCPY} -O ihex {OUTPUT}/{TARGET}.elf {OUTPUT}/{TARGET}.hex") - os.system(f"{OBJDUMP} -d {OUTPUT}/{TARGET}.elf > {OUTPUT}/{TARGET}.lst") + os.system(f"{CC} -v > {OUTPUT}/{TARGET}.lst 2>&1") + os.system(f"{OBJDUMP} -d {OUTPUT}/{TARGET}.elf >> {OUTPUT}/{TARGET}.lst") +# 生成fpga的加载文件 +def create_coe_file(): + with open(f"{OUTPUT}/{TARGET}.bin", mode="rb") as f: + data=f.read() + data_len=len(data)//4 + with open(f"{OUTPUT}/{TARGET}.coe", mode='w+') as f: + f.write("memory_initialization_radix = 16;\n") + f.write("memory_initialization_vector =\n") + for index in range(data_len): + temp=data[index*4]|(data[index*4+1]<<8)|\ + (data[index*4+2])<<16|(data[index*4+3]<<24) + f.write(f"{temp:08x},\n") + for index in range(65536-data_len): + f.write(f"{0:08x},\n") + + if __name__ == "__main__": tick_start=time.time() main() + create_coe_file() tick_end=time.time() print(f"cost: {tick_end-tick_start}") diff --git a/riscv/riscv.ld b/riscv/riscv.ld index 53960e4..1e87dd3 100644 --- a/riscv/riscv.ld +++ b/riscv/riscv.ld @@ -4,8 +4,8 @@ ENTRY( _start ) MEMORY { - flash (rxai!w) : ORIGIN = 0x80000000, LENGTH = 1024K - dram (wxa!ri) : ORIGIN = 0x10000000, LENGTH = 1024K + flash (rxai!w) : ORIGIN = 0x80000000, LENGTH = 256K + dram (wxa!ri) : ORIGIN = 0x10000000, LENGTH = 128K } diff --git a/riscv/startup/main.c b/riscv/startup/main.c index 5dd91bf..218865c 100644 --- a/riscv/startup/main.c +++ b/riscv/startup/main.c @@ -4,11 +4,37 @@ #include "head.h" #include "rtthread.h" -#define PRINT_BASE_ADDR *(uint8_t *)0x40000000 -int my_putc(int c) { - PRINT_BASE_ADDR = c; - return c; +#define UART0_BASE (0x30000000) +#define UART0_CTRL (UART0_BASE + (0x00)) +#define UART0_STATUS (UART0_BASE + (0x04)) +#define UART0_BAUD (UART0_BASE + (0x08)) +#define UART0_TXDATA (UART0_BASE + (0x0c)) +#define UART0_RXDATA (UART0_BASE + (0x10)) + +#define UART0_REG(addr) (*((volatile uint32_t *)addr)) + +// send one char to uart +void my_putc(uint8_t c) +{ + while (UART0_REG(UART0_STATUS) & 0x1); + UART0_REG(UART0_TXDATA) = c; +} + +// Block, get one char from uart. +uint8_t uart_getc() +{ + UART0_REG(UART0_STATUS) &= ~0x2; + while (!(UART0_REG(UART0_STATUS) & 0x2)); + return (UART0_REG(UART0_RXDATA) & 0xff); +} + +// 115200bps, 8 N 1 +void uart_init() +{ + // enable tx and rx + UART0_REG(UART0_CTRL) = 0x3; + } @@ -61,7 +87,9 @@ int main() rt_thread_startup(t); my_printf("enter while 1\n"); while (1) { - my_printf("main: %s\n", g_string); + rt_size_t total, used, max_used; + rt_memory_info(&total, &used, &max_used); + my_printf("main: total=%d, used=%d, max_used=%d\n", total,used,max_used); rt_thread_delay(1000); } return 0; diff --git a/riscv/startup/rtconfig.h b/riscv/startup/rtconfig.h index 16556b4..6d9e01b 100755 --- a/riscv/startup/rtconfig.h +++ b/riscv/startup/rtconfig.h @@ -40,10 +40,12 @@ /* Memory Management */ #define RT_USING_MEMPOOL -#define RT_USING_SLAB +// #define RT_USING_SLAB #define RT_USING_MEMHEAP -#define RT_MEMHEAP_FAST_MODE -#define RT_USING_SLAB_AS_HEAP +#define RT_USING_SMALL_MEM +// #define RT_MEMHEAP_FAST_MODE +// #define RT_USING_SLAB_AS_HEAP +#define RT_USING_MEMHEAP_AS_HEAP #define RT_USING_HEAP #define RT_USING_DEVICE #define RT_USING_SCHED_THREAD_CTX diff --git a/riscv/startup/rtthread_irq.c b/riscv/startup/rtthread_irq.c index 2afb0e3..2a87b66 100644 --- a/riscv/startup/rtthread_irq.c +++ b/riscv/startup/rtthread_irq.c @@ -88,11 +88,27 @@ static void tick_handler(int vec, void* par) { } -static uint32_t g_mem_heap[200 * 1024 / 4]; +static uint32_t g_mem_heap[100 * 1024 / 4]; + +void mem_test_uint8_t() { + uint8_t *p = (uint8_t *)g_mem_heap; + for (int i = 0; i < 1024;i++){ + p[i] = i & 0xff; + } + for (int i = 0; i < 1024;i++){ + if(p[i]!=(i&0xff)){ + rt_kprintf("mem test failed\n"); + } + } + rt_kprintf("mem test succesed\n"); + +} + void rt_hw_board_init(void) { set_csr(mie, (1 << 3) | (1 << 7)); set_csr(mip, (1 << 3)); - rt_system_heap_init(g_mem_heap, g_mem_heap + sizeof(g_mem_heap) / 4); + mem_test_uint8_t(); + rt_system_heap_init(g_mem_heap, &g_mem_heap[sizeof(g_mem_heap) / 4]); rt_hw_interrupt_init(); rt_hw_interrupt_install(7, tick_handler, 0, "tick_handler"); } diff --git a/riscv/startup/start.S b/riscv/startup/start.S index 8f7a312..4b34ba5 100644 --- a/riscv/startup/start.S +++ b/riscv/startup/start.S @@ -10,6 +10,9 @@ _start: la sp, _sp + li a0, 0x3000000c + li a1, 0x38 + sw a1, (a0) /* Load data section */ la a0, _data_lma diff --git a/riscv_cpu/print.c b/riscv_cpu/print.c index b7b4fce..9fd4e21 100644 --- a/riscv_cpu/print.c +++ b/riscv_cpu/print.c @@ -4,8 +4,8 @@ #include "stdio.h" -#define PRINT_BASE_ADDR 0x40000000 -#define PRINT_SIZE 0x4 +#define PRINT_BASE_ADDR 0x30000000 +#define PRINT_SIZE 0x20 #define dev_wr(addr) g_map[(addr-PRINT_BASE_ADDR) >> 2] #define dev_wrb(addr) ((uint8_t *)g_map)[(addr-PRINT_BASE_ADDR)] @@ -13,7 +13,7 @@ -static uint32_t g_map[1]; +static uint32_t g_map[8]; static uint32_t read(uint32_t addr) { if (!(addr & 0x3)) { @@ -38,13 +38,15 @@ static void write(uint32_t addr, uint32_t data) { } else { dev_wrb(addr) = data; } - if (g_index < BUFF_LEN) { - g_buff[g_index++] = data; - } - if (data == '\n') { - g_buff[g_index] = 0; - printf("\033[33m%s\033[0m", g_buff); - g_index = 0; + if(((addr&(~0x3))&0xff)==0xc){ + if (g_index < BUFF_LEN) { + g_buff[g_index++] = g_map[3]; + } + if (data == '\n') { + g_buff[g_index] = 0; + printf("\033[33m%s\033[0m", g_buff); + g_index = 0; + } } }