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riscv模拟器配置与fpga同步

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slab内存分配器似乎不能支持小内存池，改为heap方式
This commit is contained in:
andy
2025-11-11 15:20:05 +08:00
parent 036d64c035
commit 8003bbd256
7 changed files with 94 additions and 25 deletions
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22
riscv_cpu/print.c
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@@ -4,8 +4,8 @@
#include "stdio.h"
#define PRINT_BASE_ADDR 0x40000000
#define PRINT_SIZE 0x4
#define PRINT_BASE_ADDR 0x30000000
#define PRINT_SIZE 0x20
#define dev_wr(addr) g_map[(addr-PRINT_BASE_ADDR) >> 2]
#define dev_wrb(addr) ((uint8_t *)g_map)[(addr-PRINT_BASE_ADDR)]
@@ -13,7 +13,7 @@
static uint32_t g_map[1];
static uint32_t g_map[8];
static uint32_t read(uint32_t addr) {
if (!(addr & 0x3)) {
@@ -38,13 +38,15 @@ static void write(uint32_t addr, uint32_t data) {
} else {
dev_wrb(addr) = data;
}
if (g_index < BUFF_LEN) {
g_buff[g_index++] = data;
}
if (data == '\n') {
g_buff[g_index] = 0;
printf("\033[33m%s\033[0m", g_buff);
g_index = 0;
if(((addr&(~0x3))&0xff)==0xc){
if (g_index < BUFF_LEN) {
g_buff[g_index++] = g_map[3];
}
if (data == '\n') {
g_buff[g_index] = 0;
printf("\033[33m%s\033[0m", g_buff);
g_index = 0;
}
}
}