84 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C
		
	
	
		
			Executable File
		
	
	
	
	
			
		
		
	
	
			84 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C
		
	
	
		
			Executable File
		
	
	
	
	
| /*
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|  * Copyright (c) 2006-2023, RT-Thread Development Team
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|  *
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|  * SPDX-License-Identifier: Apache-2.0
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|  *
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|  * Change Logs:
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|  * Date           Author       Notes
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|  * 2013-07-20     Bernard      first version
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|  * 2023-02-01     GuEe-GUI     move macros to header
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|  */
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| 
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| #ifndef __PIC_GICV2_H__
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| #define __PIC_GICV2_H__
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| 
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| #include <rtdef.h>
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| 
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| #include <drivers/pic.h>
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| 
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| #define GIC_DIST_CTRL               0x000
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| #define GIC_DIST_TYPE               0x004
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| #define GIC_DIST_IIDR               0x008
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| #define GIC_DIST_IGROUP             0x080
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| #define GIC_DIST_ENABLE_SET         0x100
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| #define GIC_DIST_ENABLE_CLEAR       0x180
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| #define GIC_DIST_PENDING_SET        0x200
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| #define GIC_DIST_PENDING_CLEAR      0x280
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| #define GIC_DIST_ACTIVE_SET         0x300
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| #define GIC_DIST_ACTIVE_CLEAR       0x380
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| #define GIC_DIST_PRI                0x400
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| #define GIC_DIST_TARGET             0x800
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| #define GIC_DIST_CONFIG             0xc00
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| #define GIC_DIST_SOFTINT            0xf00
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| #define GIC_DIST_SGI_PENDING_CLEAR  0xf10
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| #define GIC_DIST_SGI_PENDING_SET    0xf20
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| #define GIC_DIST_ICPIDR2            0xfe8
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| 
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| #define GICD_ENABLE                 0x1
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| #define GICD_DISABLE                0x0
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| #define GICD_INT_ACTLOW_LVLTRIG     0x0
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| #define GICD_INT_EN_CLR_X32         0xffffffff
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| #define GICD_INT_EN_SET_SGI         0x0000ffff
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| #define GICD_INT_EN_CLR_PPI         0xffff0000
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| 
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| #define GICD_GROUP0                 0
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| #define GICD_GROUP1                 (~GICD_GROUP0)
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| 
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| #define GIC_CPU_CTRL                0x00
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| #define GIC_CPU_PRIMASK             0x04
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| #define GIC_CPU_BINPOINT            0x08
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| #define GIC_CPU_INTACK              0x0c
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| #define GIC_CPU_EOI                 0x10
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| #define GIC_CPU_RUNNINGPRI          0x14
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| #define GIC_CPU_HIGHPRI             0x18
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| #define GIC_CPU_ALIAS_BINPOINT      0x1c
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| #define GIC_CPU_ACTIVEPRIO          0xd0
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| #define GIC_CPU_IIDR                0xfc
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| #define GIC_CPU_DIR                 0x1000
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| 
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| #define GICC_ENABLE                 0x1
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| #define GICC_INT_PRI_THRESHOLD      0xf0        /* priority levels 16 */
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| #define GIC_CPU_CTRL_ENABLE_GRP0    (1 << 0)
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| #define GIC_CPU_CTRL_ENABLE_GRP1    (1 << 1)
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| #define GIC_CPU_CTRL_EOI_MODE_NS    (1 << 9)
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| 
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| struct gicv2
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| {
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|     struct rt_pic parent;
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| 
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|     int version;
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|     int max_irq;
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| 
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|     void *dist_base;
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|     rt_size_t dist_size;
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|     void *cpu_base;
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|     rt_size_t cpu_size;
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| 
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|     void *hyp_base;
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|     rt_size_t hyp_size;
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|     void *vcpu_base;
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|     rt_size_t vcpu_size;
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| };
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| 
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| #endif /* __IRQ_GICV2_H__ */
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