137 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
		
		
			
		
	
	
			137 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
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								/*
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								 * Copyright (c) 2006-2018, RT-Thread Development Team
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								 *
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								 * SPDX-License-Identifier: Apache-2.0
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								 *
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								 * Change Logs:
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								 * Date           Author       Notes
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								 * 2018/10/01     Bernard      The first version
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								 * 2018/12/27     Jesven       Add SMP support
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								 */
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								#define MSTATUS_FS      0x00006000U /* initial state of FPU     */
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								#include <cpuport.h>
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								  .global	_start
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								  .section ".start", "ax"
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								_start:
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								  j 1f
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								  .word 0xdeadbeef
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								  .align 3
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								  .global g_wake_up
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								  g_wake_up:
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								      .dword 1
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								      .dword 0
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								1:
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								  csrw mideleg, 0
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								  csrw medeleg, 0
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								  csrw mie, 0
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								  csrw mip, 0
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								  la t0, trap_entry
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								  csrw mtvec, t0
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								  li x1, 0
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								  li x2, 0
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								  li x3, 0
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								  li x4, 0
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								  li x5, 0
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								  li x6, 0
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								  li x7, 0
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								  li x8, 0
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								  li x9, 0
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								  li x10,0
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								  li x11,0
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								  li x12,0
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								  li x13,0
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								  li x14,0
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								  li x15,0
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								  li x16,0
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								  li x17,0
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								  li x18,0
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								  li x19,0
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								  li x20,0
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								  li x21,0
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								  li x22,0
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								  li x23,0
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								  li x24,0
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								  li x25,0
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								  li x26,0
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								  li x27,0
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								  li x28,0
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								  li x29,0
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								  li x30,0
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								  li x31,0
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								  /* set to initial state of FPU and disable interrupt */
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								  li t0, MSTATUS_FS
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								  csrs mstatus, t0
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								  fssr    x0
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								  fmv.d.x f0, x0
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								  fmv.d.x f1, x0
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								  fmv.d.x f2, x0
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								  fmv.d.x f3, x0
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								  fmv.d.x f4, x0
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								  fmv.d.x f5, x0
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								  fmv.d.x f6, x0
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								  fmv.d.x f7, x0
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								  fmv.d.x f8, x0
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								  fmv.d.x f9, x0
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								  fmv.d.x f10,x0
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								  fmv.d.x f11,x0
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								  fmv.d.x f12,x0
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								  fmv.d.x f13,x0
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								  fmv.d.x f14,x0
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								  fmv.d.x f15,x0
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								  fmv.d.x f16,x0
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								  fmv.d.x f17,x0
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								  fmv.d.x f18,x0
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								  fmv.d.x f19,x0
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								  fmv.d.x f20,x0
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								  fmv.d.x f21,x0
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								  fmv.d.x f22,x0
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								  fmv.d.x f23,x0
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								  fmv.d.x f24,x0
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								  fmv.d.x f25,x0
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								  fmv.d.x f26,x0
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								  fmv.d.x f27,x0
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								  fmv.d.x f28,x0
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								  fmv.d.x f29,x0
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								  fmv.d.x f30,x0
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								  fmv.d.x f31,x0
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								.option push
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								.option norelax
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								  la gp, __global_pointer$
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								.option pop
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								  /* get cpu id */
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								  csrr a0, mhartid
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								  la   sp, __stack_start__
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								  addi t1, a0, 1
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								  li   t2, __STACKSIZE__
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								  mul  t1, t1, t2
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								  add  sp, sp, t1 /* sp = (cpuid + 1) * __STACKSIZE__ + __stack_start__ */
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								  /* other cpu core, jump to cpu entry directly */
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								  bnez a0, secondary_cpu_entry
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								  j primary_cpu_entry
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								secondary_cpu_entry:
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								#ifdef RT_USING_SMP
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								  la a0, secondary_boot_flag
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								  ld a0, 0(a0)
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								  li a1, 0xa55a
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								  beq a0, a1, secondary_cpu_c_start
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								#endif
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								  j secondary_cpu_entry
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								#ifdef RT_USING_SMP
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								.data
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								.global secondary_boot_flag
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								.align 3
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								secondary_boot_flag:
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								    .dword 0
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								#endif
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