131 lines
		
	
	
		
			3.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			131 lines
		
	
	
		
			3.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (c) 2006-2021, RT-Thread Development Team
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|  *
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|  * SPDX-License-Identifier: Apache-2.0
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|  *
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|  * Change Logs:
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|  * Date           Author       Notes
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|  * 2006-03-18     Bernard      the first version
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|  * 2006-04-25     Bernard      add rt_hw_context_switch_interrupt declaration
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|  * 2006-09-24     Bernard      add rt_hw_context_switch_to declaration
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|  * 2012-12-29     Bernard      add rt_hw_exception_install declaration
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|  * 2017-10-17     Hichard      add some micros
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|  */
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| 
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| #ifndef __RT_HW_H__
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| #define __RT_HW_H__
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| 
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| #include <rtthread.h>
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| 
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| #ifdef __cplusplus
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| extern "C" {
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| #endif
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| 
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| /*
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|  * Some macros define
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|  */
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| #ifndef HWREG32
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| #define HWREG32(x)          (*((volatile rt_uint32_t *)(x)))
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| #endif
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| #ifndef HWREG16
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| #define HWREG16(x)          (*((volatile rt_uint16_t *)(x)))
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| #endif
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| #ifndef HWREG8
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| #define HWREG8(x)           (*((volatile rt_uint8_t *)(x)))
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| #endif
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| 
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| #ifndef RT_CPU_CACHE_LINE_SZ
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| #define RT_CPU_CACHE_LINE_SZ    32
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| #endif
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| 
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| enum RT_HW_CACHE_OPS
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| {
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|     RT_HW_CACHE_FLUSH      = 0x01,
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|     RT_HW_CACHE_INVALIDATE = 0x02,
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| };
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| 
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| /*
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|  * CPU interfaces
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|  */
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| void rt_hw_cpu_icache_enable(void);
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| void rt_hw_cpu_icache_disable(void);
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| rt_base_t rt_hw_cpu_icache_status(void);
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| void rt_hw_cpu_icache_ops(int ops, void* addr, int size);
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| 
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| void rt_hw_cpu_dcache_enable(void);
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| void rt_hw_cpu_dcache_disable(void);
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| rt_base_t rt_hw_cpu_dcache_status(void);
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| void rt_hw_cpu_dcache_ops(int ops, void* addr, int size);
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| 
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| void rt_hw_cpu_reset(void);
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| void rt_hw_cpu_shutdown(void);
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| 
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| rt_uint8_t *rt_hw_stack_init(void       *entry,
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|                              void       *parameter,
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|                              rt_uint8_t *stack_addr,
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|                              void       *exit);
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| 
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| /*
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|  * Interrupt handler definition
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|  */
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| typedef void (*rt_isr_handler_t)(int vector, void *param);
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| 
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| struct rt_irq_desc
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| {
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|     rt_isr_handler_t handler;
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|     void            *param;
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| 
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| #ifdef RT_USING_INTERRUPT_INFO
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|     char             name[RT_NAME_MAX];
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|     rt_uint32_t      counter;
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| #endif
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| };
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| 
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| /*
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|  * Interrupt interfaces
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|  */
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| void rt_hw_interrupt_init(void);
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| void rt_hw_interrupt_mask(int vector);
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| void rt_hw_interrupt_umask(int vector);
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| rt_isr_handler_t rt_hw_interrupt_install(int              vector,
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|                                          rt_isr_handler_t handler,
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|                                          void            *param,
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|                                          const char      *name);
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| 
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| rt_base_t rt_hw_interrupt_disable(void);
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| void rt_hw_interrupt_enable(rt_base_t level);
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| 
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| /*
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|  * Context interfaces
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|  */
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| void rt_hw_context_switch(rt_ubase_t from, rt_ubase_t to);
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| void rt_hw_context_switch_to(rt_ubase_t to);
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| void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to);
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| 
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| void rt_hw_console_output(const char *str);
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| 
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| void rt_hw_backtrace(rt_uint32_t *fp, rt_ubase_t thread_entry);
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| void rt_hw_show_memory(rt_uint32_t addr, rt_size_t size);
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| 
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| /*
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|  * Exception interfaces
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|  */
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| void rt_hw_exception_install(rt_err_t (*exception_handle)(void *context));
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| 
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| /*
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|  * delay interfaces
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|  */
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| void rt_hw_us_delay(rt_uint32_t us);
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| 
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| #define RT_DEFINE_SPINLOCK(x)
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| #define RT_DECLARE_SPINLOCK(x)    rt_ubase_t x
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| 
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| #define rt_hw_spin_lock(lock)     *(lock) = rt_hw_interrupt_disable()
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| #define rt_hw_spin_unlock(lock)   rt_hw_interrupt_enable(*(lock))
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| 
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| #ifdef __cplusplus
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| }
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| #endif
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| 
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| #endif
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