kunlun/plc/halmac/hw3/plc_inc/mac_isr.h

/****************************************************************************

Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.

This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
be copied by any method or incorporated into another program without
the express written consent of Aerospace C.Power. This Information or any portion
thereof remains the property of Aerospace C.Power. The Information contained herein
is believed to be accurate and Aerospace C.Power assumes no responsibility or
liability for its use in any way and conveys no license or title under
any patent or copyright and makes no representation or warranty that this
Information is free from patent or copyright infringement.

****************************************************************************/

#ifndef MAC_ISR_H
#define MAC_ISR_H

/* os shim includes */
#include "os_types.h"

/* driver includes */
#include "iot_irq.h"

#ifdef __cplusplus
extern "C" {
#endif

/* BEACON */
/* generate before TBTT, should happen at next_tbtt - cfg_bcn_alert_ahead */
#define MAC_ISR_BC_ALERT_ID             0

/* generate when cfg number bcn missed, or a period of time without bcn seen */
#define MAC_ISR_BC_MISS_ID              1

/* generate when self's beacon received */
#define MAC_ISR_BC_RX_ID                2

/* SCHEDULER */
/* generate when HW scheduler stop done */
#define MAC_ISR_SCH_STOP_ID             3

/* TX */
/* when sw disable the hwq, hwq need to complete the current transmit, after
 * it done, generate this INT.
 */
#define MAC_ISR_HWQ_STOP_ID             4

/* generate when a mpdu tx complete */
#define MAC_ISR_MPDU_TX_COMP_ID         5

/* generate when a list of mpdus tx complete */
#define MAC_ISR_MPDU_LIST_TX_COMP_ID    6

/* generate when HW read tx start desc err */
#define MAC_ISR_START_DESC_ERR_ID       7

/* generate when HW read tx end desc err */
#define MAC_ISR_END_DESC_ERR_ID         8

/* generate when HW read pb desc err */
#define MAC_ISR_TX_UNDERRUN_ID          9

/* RX */
/* generate when a mpdu rx complete */
#define MAC_ISR_MPDU_RX_ID              10

/* generate when a pb rx complete */
#define MAC_ISR_PB_RX_ID                11

/* generate when a fc rx complete */
#define MAC_ISR_FC_RX_ID                12

/* generate when RX buf is run out for the desc */
#define MAC_ISR_RX_DESC_OVERFLOW_ID     13

/* generate when RX buf is not enough for the payload */
#define MAC_ISR_RX_LOAD_OVERFLOW_ID     14

/* RX ring buf num is under water mark */
#define MAC_ISR_RX_LOW_WATERMARK_ID     15

/* keep this the same as the last valid ISR ID */
#define MAC_ISR_MAX_ID                  15

/* mac isr ext1 zc capture id */
#define MAC_ISR_EXT1_ZC0_CAP_ID         0
#define MAC_ISR_EXT1_ZC1_CAP_ID         1
#define MAC_ISR_EXT1_ZC2_CAP_ID         2
#define MAC_ISR_EXT1_ZC3_CAP_ID         3
#define MAC_ISR_EXT1_ZC4_CAP_ID         4
#define MAC_ISR_EXT1_ZC5_CAP_ID         5

/* keep this the same as the last valid ISR EXT1 ID */
#define MAC_ISR_EXT1_MAX_ID             5

/* function callback to receive dsr from ISR context.
 * @dsr:    list of dsr id to be set. See MAC_DSR_XXX
 * @cnt:    number of ids in the list
 */
typedef void (*dsr_notification_func_t)(uint8_t *dsr, uint8_t cnt);

typedef struct _mac_isr_ctx {
    /* irq handler for HAL_VECTOR_MAC_0 */
    iot_irq_t               isr_0_h;
    /* irq handler for HAL_VECTOR_MAC_1 */
    iot_irq_t               isr_1_h;
    /* irq handler for HAL_VECTOR_MAC_2 */
    iot_irq_t               isr_2_h;
    /* irq handler for HAL_VECTOR_MAC_3 */
    iot_irq_t               isr_3_h;
    /* interrupt mask reg cache */
    uint32_t                isr_mask;
    /* callback to receive dsr events */
    dsr_notification_func_t dsr_callback;
} mac_isr_ctx_t;

/*
 * mac_isr_init() - mac interrupt service init
 * callback:    function callback to receive the dsr from ISR context.
 */
void mac_isr_init(dsr_notification_func_t callback);

/*
 * mac_isr_start() - start mac interrupt service. after this call, interrupt
 *                   service will be enabled.
 */
void mac_isr_start();

/*
 * mac_isr_stop() - start mac interrupt service. after this call, interrupt
 *                  service will be disabled.
 */
void mac_isr_stop();

/*
 * mac_isr_enable() - enable speficied mac interrupt.
 * @id:     mac interrupt id to be enabled. see MAC_ISR_XXX
 */
void mac_isr_enable(uint8_t id);

/*
 * mac_isr_disable() - disable speficied mac interrupt.
 * @id:     mac interrupt id to be disabled. see MAC_ISR_XXX
 */
void mac_isr_disable(uint8_t id);

/*
 * mac_isr_ext1_enable() - enable speficied mac ext1 interrupt.
 * @id:     mac interrupt id to be enabled. see MAC_ISR_EXT1_XXX
 */
void mac_isr_ext1_enable(uint8_t id);

/*
 * mac_isr_ext1_disable() - disable speficied mac ext1 interrupt.
 * @id:     mac interrupt id to be disabled. see MAC_ISR_EXT1_XXX
 */
void mac_isr_ext1_disable(uint8_t id);

void mac_timer_ctxt();

/*
 * mac_isr_clear() - clear speficied mac interrupt.
 * @isr_evt:       - mac interrupt id to be clear. see MAC_ISR_XXX
 */
void mac_isr_clear(uint32_t isr_evt);

#ifdef __cplusplus
}
#endif

#endif /* MAC_ISR_H */