777 lines
13 KiB
Plaintext
777 lines
13 KiB
Plaintext
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# These are some useful functions to add to your ~/.xt-gdbinit file
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# Standard gdb debug settings
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set history filename ~/.gdb_history
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set history save on
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set print pretty on
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set print object on
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set print vtbl on
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set pagination off
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set output-radix 16
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set $new=1
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define fpga_ver
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x 0xa6048
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end
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define dmem_usage
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end
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define ana_read_gain
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set *0x51c00180=1
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x/w 0x51c0017c
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set *0x51c00180=25
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x/w 0x51c0017c
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set *0x51c00180=41
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x/w 0x51c0017c
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end
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define ana_read
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set *0x51c00180=$arg0*4+1
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x/w 0x51c0017c
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x/b 0x51c00181
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end
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define ana_write
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set $addr = $arg0
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set $value = $arg1
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set $mask = $arg2
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set *0x51c00178=$mask
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set *0x51c00174=$value
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set *0x51c00180=$addr*4+3
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end
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define dump_all
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set $phy_reg=0x51800000
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set $phy_tx_reg=0x51900000
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set $phy_rxtd_reg=0x51a00000
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set $phy_rxfd_reg=0x51b00000
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set $phy_dfe_reg=0x51c00000
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set $mac_sys_reg=0x51000000
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set $rgf_rx_reg=0x51000c00
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set $ahb_reg=0x50000000
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set $apb_reg=0x44000000
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set $clk_reg=0x44009000
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set $start=0
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set $size=0x700/4
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set $end=$size
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set logging file phy_reg_dump.txt
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set logging on
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while $start < $end
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x $phy_reg+$start*4
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set $start++
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end
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set logging off
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set logging file phy_tx_reg_dump.txt
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set logging on
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set $start=0
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while $start < $end
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x $phy_tx_reg+$start*4
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set $start++
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end
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set logging off
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set logging file phy_rxtd_reg_dump.txt
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set logging on
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set $start=0
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while $start < $end
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x $phy_rxtd_reg+$start*4
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set $start++
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end
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set logging off
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set logging file phy_rx_fd_reg_dump.txt
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set logging on
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set $start=0
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while $start < $end
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x $phy_rxfd_reg+$start*4
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set $start++
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end
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set logging off
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set logging file phy_dfe_reg_dump.txt
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set logging on
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set $start=0
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while $start < $end
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x $phy_dfe_reg+$start*4
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set $start++
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end
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set logging off
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set logging file mac_sys_reg_dump.txt
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set logging on
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set $start=0
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while $start < $end
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x $mac_sys_reg+$start*4
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set $start++
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end
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set logging off
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set logging file rgf_rx_reg_dump.txt
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set logging on
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set $start=0
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while $start < $end
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x $rgf_rx_reg+$start*4
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set $start++
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end
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set logging off
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set logging file ahb_reg_dump.txt
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set logging on
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set $start=0
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while $start < $end
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x $ahb_reg+$start*4
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set $start++
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end
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set logging off
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set logging file apb_reg_dump.txt
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set logging on
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set $start=0
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while $start < $end
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x $apb_reg+$start*4
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set $start++
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end
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set logging off
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set logging file clk_reg_dump.txt
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set logging on
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set $start=0
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while $start < $end
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x $clk_reg+$start*4
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set $start++
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end
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set logging off
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# reset fpga
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define resetfpga
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set *0x00100000=0x6f
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set *0x50000004=0xffffffff
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end
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# Run to appstart and load app
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define loadfw
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monitor soft_reset_halt
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disable_watchdog
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load
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set_cpu_freq_150
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set $sp = &__StackTop
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#set $pc = __Vectors[1]
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end
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#dump uart register
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define dump_uart
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p *(struct pl011_regs*)0x44001000
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p *(struct pl011_regs*)0x44005000
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end
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define uart_info
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p g_uart_info
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end
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#dump intc register
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define dump_intc
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p *(struct intc_regs*)0x44004000
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end
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#dump apb register
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define dump_apb
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p *(struct apb_regs*)0x44000000
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end
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#dump gptimer register
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define dump_gptmr
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p *(struct gpmtr_regs*)0x44003000
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end
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define cache_disable
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set *0x02000028 &= ~(0x1e0000)
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set *0x0200002c |= (0x1e0000)
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end
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define map_flash_core
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set *0x4400703c |= 0x30
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set *0x44007098 |= 0x30
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set *0x44007038 |= 0x30
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set *0x44007064 |= 0x30
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set *0x44007068 |= 0x30
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set *0x44007040 |= 0x30
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set *0x4400001c |= 0x4
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set *0x44020010 |= 0x1000
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set *0x44020014 |= 0x1000
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set *0x44020018 |= 0x1000
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set *0x4402001c |= 0x1000
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end
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define map_flash_gpio_ver14
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# config pin 23-28 select FUNCTION0
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set *0x44007080=0
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set *0x44007084=0
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set *0x44007088=0
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set *0x4400708c=0
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set *0x44007090=0
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set *0x44007094=0
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# enable gpio matrix
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set *0x4400001c=0x4
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# config gpio matrix in
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# SFC INID 4-7 => GPIO 25-28
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set *0x44020010=25
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set *0x44020014=26
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set *0x44020018=27
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set *0x4402001c=28
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#config gpio matrix out
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# SFC OUTID 6-11 => GPIO 25-28
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set *0x4402045c=0x6
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set *0x44020460=0x7
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set *0x44020464=0x8
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set *0x44020468=0x9
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set *0x4402046c=10
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set *0x44020470=11
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end
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define map_uart2_gpio_mtx
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set *0x44007040=0
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set *0x44007044=0
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set *0x4400001c=0x4
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set *0x44020024=0x1000
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set *0x4402002c=0x8
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set *0x440200f8=15
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end
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define map_uart2_gpio_ver14
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set *0x44007040=0
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set *0x44007044=0
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set *0x4400001c |= 0x4
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set *0x44020024 |= 0x1000
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set *0x4402002c=0x8
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set *0x44020464=15
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end
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define map_psram_core_def
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set *0x4400001c |= 0x4
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set *0x44020000 |= 0x1000
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set *0x44020004 |= 0x1000
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set *0x44020008 |= 0x1000
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set *0x4402000c |= 0x1000
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end
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define set_cache_buffer_mode
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set *0x5000000c=0x10000
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set *0x50000008=0x00090010
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set *0x50000004=0xe
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end
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define cache_qspi_enable
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set *0x50000004=0x2001A
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set *0x50000008=0x90004
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# modify
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set *0x52000188=0x03057a75
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set *0x5200018c=0x100
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set *0x52000190=0x08180000
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# dual
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#set *0x52000188=0x3b057a75
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#set *0x5200018c=0x102
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#set *0x52000190=0x08180008
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#quad
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#set *0x52000188=0xeb057a75
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#set *0x5200018c=0x115
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#set *0x52000190=0x08060204
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set *0x52000194=0x100
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set *0x52000198=0x08000000
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set *0x5200019c=0x100
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set *0x520001a0=0x08000000
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set *0x520001a4=0x100
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set *0x520001a8=0x08000000
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#set *0x52000130=0x3
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# set cache quad
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#set *0x5200020c=0x102
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set *0x5200020c=0x1102
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set *0x52000208=0x35000000
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set *0x52000204=0x80000000
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set *0x50000004=0x20002
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set *0x50000008=0x9001C
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end
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define enable_emc
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set *0x02000020 |= 0x20
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set *0x02000024 |= 0x20
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set *0x02000024 &= ~(0x20)
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set *0x02000028 |= 0x200
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set *0x0200002c |= 0x200
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set *0x0200002c &= ~(0x200)
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end
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define init_flash
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set *0x61000140=0x2000
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#set *0x61000188=0x03057a75
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#set *0x6100018c=0x100
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#set *0x61000190=0x08180000
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set *0x52000188=0xeb057a75
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set *0x5200018c=0x115
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set *0x52000190=0x08060204
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set *0x61000194=0x100
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set *0x61000198=0x08000000
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set *0x6100019c=0x100
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set *0x610001a0=0x08000000
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set *0x610001a4=0x100
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set *0x610001a8=0x08000000
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end
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define psram_qpi_mode
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set *0x0150020c=0x1102
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set *0x01500210=0x32
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set *0x01500208=0x35000000
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set *0x01500204=0x80000000
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end
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define psram_qpi_mode_low
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set *0x0150020c=0x1102
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set *0x01500210=0x10
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set *0x01500208=0x35000000
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set *0x01500204=0x80000000
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end
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define psram_spi_mode
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set *0x6100020c=0x1000
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set *0x61000208=0xf5000000
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set *0x61000204=0x80000000
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set *0x6100020c=0x0000
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end
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define space_cache
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set $val = $arg0
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set *0x04C00044 = $val
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set *0x04C10044 = $val
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set *0x04C20044 = $val
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set *0x04C30044 = $val
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end
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define enable_cache
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set *0x02000028 = 0x1e0000
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set *0x0200002c &= ~(0x1e0000)
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end
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define cache_cfg_qpi_ver14
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enable_emc
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#init_flash
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psram_qpi_mode
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enable_cache
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space_cache 0x44
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end
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define cache_cfg_qpi_ver14_low
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enable_emc
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#init_flash
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psram_qpi_mode_low
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enable_cache
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space_cache 0x44
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end
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define cache_cfg_spi_ver14
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enable_emc
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psram_spi_mode
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init_flash
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enable_cache
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space_cache 0x44
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end
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define loadfirmware
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monitor soft_reset_halt
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cache_disable
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map_flash_gpio_mtx
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map_psram_core_def
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map_uart2_gpio_mtx
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cache_qspi_enable
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load
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end
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define disable_watchdog
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set *0x02000010 |= 0x100
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set *0x04900010 |= 0x2
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set *0x05c0f080 = 0x57444750
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set *0x05c0f008 = 0
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set *0x05c0f080 = 0
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set *0x0240e080 = 0x57444750
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set *0x0240e008 = 0
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set *0x04980080 = 0x57444750
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set *0x04980008 = 0
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set *0x0240e080 = 0
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set *0x04980080 = 0
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end
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define set_cpu_freq_150
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set *0x44009004=0x100
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set *0x44009000=0x1
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end
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define set_sfc_clk_75
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set *0x61000134=0x10
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end
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define set_smc_clk_75
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set *0x61000210=0x10
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end
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define load_ver14_qpi
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monitor soft_reset_halt
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disable_watchdog
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cache_disable
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if $new == 1
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map_flash_core
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else
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map_flash_gpio_ver14
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end
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map_psram_core_def
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#map_uart2_gpio_ver14
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cache_cfg_qpi_ver14
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load
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set_cpu_freq_150
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#set_sfc_clk_75
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#set_smc_clk_75
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while $a0 != 0x0
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set $a0=0x0
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end
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end
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define load_ver14_spi
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monitor soft_reset_halt
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disable_watchdog
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cache_disable
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if $new == 1
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map_flash_core
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else
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map_flash_gpio_ver14
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end
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map_psram_core_def
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#map_uart2_gpio_ver14
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cache_cfg_spi_ver14
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load
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set $a0=0x0
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end
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define snapshot
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set *0x52000004=0x10101
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set *0x52000008=0x1e007
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end
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define map_jtag_gpio_mtx
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# config pin 00 - 04 select FUCNTION0
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set *0x44007024=0
|
||
|
set *0x44007028=0
|
||
|
set *0x4400702c=0
|
||
|
set *0x44007030=0
|
||
|
set *0x44007034=0
|
||
|
# enable gpio matrix
|
||
|
set *0x4400001c=0x4
|
||
|
#in 44 - 47 => 00 01 03 04
|
||
|
set *0x440200b0=00
|
||
|
set *0x440200b4=01
|
||
|
set *0x440200b8=03
|
||
|
set *0x440200bc=04
|
||
|
#out 2 => 66
|
||
|
set *0x44020408=62
|
||
|
end
|
||
|
|
||
|
define map_jtag0_gpio
|
||
|
#config pin 12-15 45 select FUNCTION0
|
||
|
set *0x44007054 = 0
|
||
|
set *0x44007058 = 0
|
||
|
set *0x4400705c = 0
|
||
|
set *0x44007060 = 0
|
||
|
set *0x440070a0 = 0
|
||
|
# enable gpio matrix
|
||
|
set *0x4400001c=0x4
|
||
|
#in 44 TMS 12
|
||
|
set *0x440200b0=12
|
||
|
#in 45 TCK 13
|
||
|
set *0x440200b4=13
|
||
|
#in 46 TDI 15
|
||
|
set *0x440200b8=15
|
||
|
#in 47 RST 45
|
||
|
set *0x440200bc=45
|
||
|
#out 14 => 62
|
||
|
set *0x44020438=62
|
||
|
end
|
||
|
|
||
|
define print_dump_info
|
||
|
set trace-commands off
|
||
|
set $i = 0
|
||
|
while($i < 10)
|
||
|
set $dump = g_exception_dump.ra[$i]
|
||
|
if ($dump != 0x0)
|
||
|
p/a $dump
|
||
|
end
|
||
|
set $i = $i + 1
|
||
|
end
|
||
|
set trace-commands on
|
||
|
end
|
||
|
|
||
|
define map_dmc_psram
|
||
|
set *0x5522a03c = 0x15501
|
||
|
end
|
||
|
|
||
|
define map_emc_flash_kl2
|
||
|
# 48 - 53
|
||
|
set *0x440070c4 &= ~0x30
|
||
|
set *0x440070c8 &= ~0x30
|
||
|
set *0x440070cc &= ~0x30
|
||
|
set *0x440070d0 &= ~0x30
|
||
|
set *0x440070d4 &= ~0x30
|
||
|
set *0x440070d8 &= ~0x30
|
||
|
set *0x440070c4 |= 0x10
|
||
|
set *0x440070c8 |= 0x10
|
||
|
set *0x440070cc |= 0x10
|
||
|
set *0x440070d0 |= 0x10
|
||
|
set *0x440070d4 |= 0x10
|
||
|
set *0x440070d8 |= 0x10
|
||
|
set *0x440070dc |= 0x10
|
||
|
|
||
|
set *0x4400001c |= 0x4
|
||
|
|
||
|
set *0x44020010 |= 0x1000
|
||
|
set *0x44020014 |= 0x1000
|
||
|
set *0x44020018 |= 0x1000
|
||
|
set *0x4402001c |= 0x1000
|
||
|
end
|
||
|
|
||
|
# reg_write reg lowest_bit bit_num value
|
||
|
define reg_write
|
||
|
set $reg = $arg0
|
||
|
set $low = $arg1
|
||
|
set $cnt = $arg2
|
||
|
set $value = $arg3
|
||
|
set $tmp = *(uint32_t *)$reg
|
||
|
set $mask = 0
|
||
|
while($cnt > 0)
|
||
|
set $cnt--
|
||
|
set $mask = (($mask << 1) + 1)
|
||
|
end
|
||
|
set $mask = $mask << $low
|
||
|
set $tmp &= ~$mask
|
||
|
set $tmp |= (($value << $low) & $mask)
|
||
|
set *(uint32_t *)$reg = $tmp
|
||
|
end
|
||
|
|
||
|
|
||
|
define load_bee_psram
|
||
|
#monitor soft_reset_halt
|
||
|
cache_disable
|
||
|
cache_cfg_qpi_ver14
|
||
|
space_cache 0x1004
|
||
|
load
|
||
|
while $a0 != 0x0
|
||
|
set $a0=0x0
|
||
|
end
|
||
|
end
|
||
|
|
||
|
define load_bee_psram_low
|
||
|
#monitor soft_reset_halt
|
||
|
cache_disable
|
||
|
cache_cfg_qpi_ver14_low
|
||
|
space_cache 0x1004
|
||
|
load
|
||
|
while $a0 != 0x0
|
||
|
set $a0=0x0
|
||
|
end
|
||
|
end
|
||
|
|
||
|
define dvp_enable
|
||
|
set *0x50000008 |= 0x800
|
||
|
set *0x50000004 |= 0x800
|
||
|
set *0x50000004 &= ~0x800
|
||
|
end
|
||
|
|
||
|
define dvp_ram_mode
|
||
|
set *0x52300000 = 0x21f21
|
||
|
set *0x52300054 = 0x3
|
||
|
set *0x52300004 = 0x1cc
|
||
|
set *0x52300008 = 0x1
|
||
|
set *0x52300024 = 720
|
||
|
set *0x52300028 = 1280
|
||
|
set *0x52300060 = 0x1
|
||
|
set *0x52300058 = 0x72105
|
||
|
set *0x523000b4 = 0x72ff
|
||
|
set *0x52300100 = 0x1
|
||
|
end
|
||
|
|
||
|
define dvp_ram_mode_no_force
|
||
|
set *0x52300000 = 0x0
|
||
|
set *0x52300054 = 0x3
|
||
|
set *0x52300004 = 0x1cc
|
||
|
set *0x52300008 = 0x1
|
||
|
set *0x52300024 = 720
|
||
|
set *0x52300028 = 1280
|
||
|
set *0x52300060 = 0x1
|
||
|
set *0x52300058 = 0x72105
|
||
|
set *0x523000b4 = 0x72ff
|
||
|
set *0x52300100 = 0x1
|
||
|
set *0x52300000 = 0x01f01
|
||
|
end
|
||
|
|
||
|
define dvp_ram_mode_crop
|
||
|
# dvp data to psram address
|
||
|
set *0x52300018 = 0x00000
|
||
|
set *0x5230010c = 0x100000
|
||
|
set *0x52300000 = 0x0
|
||
|
set *0x52300054 = 0x0
|
||
|
set *0x52300004 = 0x11cc
|
||
|
|
||
|
#set *0x52300008 = 0x1
|
||
|
#set *0x5230000c = 0xff
|
||
|
#set *0x52300010 = 0x02cf04ff
|
||
|
set *0x52300008 = 0x1
|
||
|
set *0x5230000c = 0x1
|
||
|
set *0x52300010 = 0x02cf0400
|
||
|
|
||
|
set *0x52300014 = 0x04000000
|
||
|
set *0x52300024 = 720
|
||
|
set *0x52300028 = 1280
|
||
|
set *0x52300000 = 0x01f33
|
||
|
end
|
||
|
|
||
|
define dvp_ram_mode_no_crop
|
||
|
# dvp data to psram address
|
||
|
set *0x52300018 = 0x00000
|
||
|
set *0x5230010c = 0x1000000
|
||
|
set *0x52300000 = 0x0
|
||
|
set *0x52300054 = 0x0
|
||
|
set *0x52300004 = 0x11cc
|
||
|
set *0x52300008 = 0x1
|
||
|
set *0x5230000c = 0x1
|
||
|
set *0x52300010 = 0x02cf0400
|
||
|
set *0x52300014 = 0x05000000
|
||
|
set *0x52300024 = 720
|
||
|
set *0x52300028 = 1280
|
||
|
set *0x52300000 = 0x01f31
|
||
|
end
|
||
|
|
||
|
define dvp_bina_mode
|
||
|
set *0x52300000 = 0x021f21
|
||
|
set *0x52300054 = 0x5
|
||
|
set *0x52300004 = 0x1cc
|
||
|
set *0x52300008 = 0x1
|
||
|
#set *0x52300024 = 720
|
||
|
#set *0x52300028 = 1280
|
||
|
set *0x52300024 = 720
|
||
|
set *0x52300028 = 1024
|
||
|
set *0x52300060 = 0x1
|
||
|
set *0x52300058 = 0x72105
|
||
|
set *0x523000b4 = 0x72ff
|
||
|
end
|
||
|
|
||
|
define dvp_bina_mode_no_force
|
||
|
set *0x52300000 = 0x0
|
||
|
set *0x52300054 = 0x5
|
||
|
set *0x52300004 = 0x1cc
|
||
|
set *0x52300008 = 0x1
|
||
|
set *0x52300024 = 720
|
||
|
set *0x52300028 = 1280
|
||
|
set *0x52300060 = 0x1
|
||
|
set *0x52300058 = 0x72105
|
||
|
set *0x523000b4 = 0x72ff
|
||
|
set *0x52300000 = 0x001f21
|
||
|
end
|
||
|
|
||
|
define dvp_bina_mode_auto
|
||
|
set *0x52300000 = 0x0
|
||
|
set *0x52300054 = 0x7
|
||
|
set *0x52300004 = 0x11cc
|
||
|
set *0x52300008 = 0x1
|
||
|
set *0x52300024 = 720
|
||
|
set *0x52300028 = 1280
|
||
|
set *0x52300060 = 0x1
|
||
|
set *0x52300058 = 0x72105
|
||
|
set *0x523000b4 = 0x72ff
|
||
|
set *0x52300000 = 0x001f21
|
||
|
end
|
||
|
# crop 1024 * 720
|
||
|
define dvp_bina_mode_crop
|
||
|
set *0x52300000 = 0x0
|
||
|
# dvp data to psram address
|
||
|
set *0x52300018 = 0x10000
|
||
|
set *0x52300054 = 0x7
|
||
|
set *0x52300004 = 0x11cc
|
||
|
set *0x52300008 = 0x1
|
||
|
set *0x5230000c = 0xff
|
||
|
#set *0x5230000c = 0x0
|
||
|
set *0x52300010 = 0x02d004ff
|
||
|
#set *0x52300010 = 0x02d00400
|
||
|
set *0x52300024 = 720
|
||
|
#set *0x52300028 = 1280
|
||
|
set *0x52300028 = 1024
|
||
|
set *0x52300060 = 0x1
|
||
|
set *0x52300058 = 0x72105
|
||
|
set *0x523000b4 = 0x72ff
|
||
|
set *0x52300000 = 0x001f23
|
||
|
end
|
||
|
|
||
|
define fake_data
|
||
|
set $addr = $arg0
|
||
|
set $size = $arg1
|
||
|
set $offset = $arg2
|
||
|
set $i = 0
|
||
|
while $size > 0
|
||
|
set *$addr = $i
|
||
|
set $i = $i + 0x11111111 + $offset
|
||
|
if ($i == 0xffffffff)
|
||
|
set $i = 0x0
|
||
|
end
|
||
|
set $addr = $addr + 4
|
||
|
set $size = $size - 1
|
||
|
end
|
||
|
end
|
||
|
|
||
|
define clear_cache
|
||
|
set *0x04c00000 |= 0x4
|
||
|
set *0x04c10000 |= 0x4
|
||
|
set *0x04c20000 |= 0x4
|
||
|
set *0x04c30000 |= 0x4
|
||
|
end
|
||
|
|
||
|
define cpu1_enable
|
||
|
set $start_pc = $arg0
|
||
|
set *0x02000124 = $start_pc
|
||
|
set *0x02000028 |= 0x2
|
||
|
set *0x0200002c |= 0x2
|
||
|
set *0x0200002c &= ~0x2
|
||
|
set *0x0200012c |= 0x4
|
||
|
end
|
||
|
|
||
|
define nfc_vm
|
||
|
target remote localhost:3333
|
||
|
set *0x02000104 |= 0x1b
|
||
|
disable_watchdog
|
||
|
end
|
||
|
|
||
|
define vm
|
||
|
target remote localhost:3333
|
||
|
disable_watchdog
|
||
|
end
|
||
|
|
||
|
|
||
|
define bee_vm
|
||
|
vm
|
||
|
monitor reset halt
|
||
|
kill
|
||
|
shell sleep 0.001
|
||
|
vm
|
||
|
end
|
||
|
|
||
|
define bee_target_remote
|
||
|
|
||
|
target remote $arg0
|
||
|
monitor reset halt
|
||
|
kill
|
||
|
shell sleep 0.001
|
||
|
target remote $arg0
|
||
|
disable_watchdog
|
||
|
end
|
||
|
|