kunlun/plc/halphy/hw_common/phy_hw_cmn.c

/****************************************************************************

Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.

This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
be copied by any method or incorporated into another program without
the express written consent of Aerospace C.Power. This Information or any portion
thereof remains the property of Aerospace C.Power. The Information contained herein
is believed to be accurate and Aerospace C.Power assumes no responsibility or
liability for its use in any way and conveys no license or title under
any patent or copyright and makes no representation or warranty that this
Information is free from patent or copyright infringement.

***************************************************************************/

#include "iot_config.h"
#include "os_types.h"
#include "hw_reg_api.h"
#include "phy_rxtd_reg.h"
#include "hw_tonemask.h"
#include "phy_bb.h"
#include "phy_ana.h"
#include "granite_reg.h"
#include "mac_sys_reg.h"
#include "iot_errno_api.h"
#include "iot_io_api.h"
#include "iot_dbglog_api.h"
#include "iot_dbglog_parser.h"
#include "phy_status.h"
#include "os_task.h"
#include "phy_phase.h"

static int phy_rx_rssi_valid(int reg_addr)
{
    int ret = ERR_OK;
#if HW_PLATFORM >= HW_PLATFORM_FPGA
    uint32_t tmp = PHY_RXTD_READ_REG(CFG_BB_PACKET_INF_0_ADDR);
    /*cur_rssi is not 0, means is changing gain*/
    if (0 == REG_FIELD_GET(FREE_RSSI, tmp)) {
        ret = ERR_INVAL;
    }
#endif
    (void)reg_addr;
    return ret;
}

int8_t phy_gain_get_from_agc()
{
#if HW_PLATFORM >= HW_PLATFORM_FPGA
    uint32_t tmp = 0;
    uint8_t gain_entry = 0;
    int16_t  gain_tmp = 0;
    uint8_t timeout = 0;
    uint8_t rodata = 0;
    uint32_t phy_status = 0;

    /* wait rssi != 0 */
    timeout = iot_wait_timeout_fun(phy_rx_rssi_valid, \
        CFG_BB_PACKET_INF_0_ADDR, ERR_OK, PHY_RSSI_VALID_WAIT_MS);
    if (timeout == ERR_TIMEOVER) {
        phy_ana_i2c_read(CFG_ANA_TOP_REG_ADDR, &phy_status, &rodata);
        phy_force_0_access_require();
        /* check force rx abort */
        tmp = RGF_MAC_READ_REG(CFG_PHY_FORCE_0_ADDR);
        if (REG_FIELD_GET(CFG_PHY_RX_ABORT, tmp) != 0) {
            /* clr force */
            REG_FIELD_SET(CFG_PHY_RX_ABORT, tmp, 0);
            REG_FIELD_SET(CFG_PHY_RX_ABORT_FORCE_EN, tmp, 0);
            RGF_MAC_WRITE_REG(CFG_PHY_FORCE_0_ADDR, tmp);
            phy_force_0_access_release();

            /* try again */
            timeout = iot_wait_timeout_fun(phy_rx_rssi_valid, \
                CFG_BB_PACKET_INF_0_ADDR, ERR_OK, PHY_RSSI_VALID_WAIT_MS);
            if (timeout == ERR_TIMEOVER) {
                IOT_ASSERT(0);
            }
        } else if ((phy_status & TOP_EN_RX_MASK) == 0) {
            phy_force_0_access_release();

            /* force enter rx state */
            phy_txrx_ovr_set(1,1);

            /* try again */
            timeout = iot_wait_timeout_fun(phy_rx_rssi_valid, \
                CFG_BB_PACKET_INF_0_ADDR, ERR_OK, PHY_RSSI_VALID_WAIT_MS);
            if (timeout == ERR_TIMEOVER) {
                phy_print_ana_dbg_info();
                IOT_ASSERT(0);
            }
        } else {
            phy_force_0_access_release();
            phy_print_ana_dbg_info();
            IOT_ASSERT(0);
        }
    }

    /*get the valid gain entry*/
    tmp = PHY_RXTD_READ_REG(CFG_BB_PACKET_INF_0_ADDR);
    gain_entry = REG_FIELD_GET(GAIN_TABLE_ENTRY,tmp);

    /* cal gain between gain table1 and table2*/
    if (gain_entry >= PHY_AGC_NB_GAIN_ENTRY_START) {
        gain_tmp = \
            gain_entry - PHY_AGC_GAIN_ENTRY_OFFSET - PHY_AGC_NB_GAIN_ENTRY_START;
    } else {
        gain_tmp = gain_entry - PHY_AGC_GAIN_ENTRY_OFFSET;
    }

#if PHY_DBG_EN
    iot_printf("gain entry:%u, gain:%d\n", gain_entry, gain_tmp);
#endif

    return (int8_t)gain_tmp;
#else
    return 0;
#endif
}

/* load gain table to gain buf */
void phy_gain_tab_load(const uint32_t *table)
{
#if HW_PLATFORM != HW_PLATFORM_SIMU
    uint32_t i=0;

    IOT_ASSERT(table != NULL);

    enable_sw_access_gain_buf(true);
    /* normal band */
    for(i = 0; i < TOTAL_GAIN_NUM; i++)
    {
        SOC_WRITE_REG(BB_GAIN_BASEADDR + (i << 2), *table++);
    }

    /* narrow band */
    for(i=0;i<TOTAL_NB_GAIN_NUM;i++)
    {
        SOC_WRITE_REG(BB_NB_GAIN_BASEADDR + (i << 2), *table++);
    }
    enable_sw_access_gain_buf(false);
#else
    (void)table;
#endif
}

int8_t phy_rxtd_gain_get()
{
    int8_t gain = 0;
    uint32_t tmp = PHY_RXTD_READ_REG(CFG_BB_AGC_GAIN_LEVEL_ADDR);
    gain = (int8_t)REG_FIELD_GET(SW_MAX_GAIN,tmp);

    return gain;
}