74 lines
2.4 KiB
C
74 lines
2.4 KiB
C
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/****************************************************************************
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Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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be copied by any method or incorporated into another program without
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the express written consent of Aerospace C.Power. This Information or any portion
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thereof remains the property of Aerospace C.Power. The Information contained herein
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is believed to be accurate and Aerospace C.Power assumes no responsibility or
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liability for its use in any way and conveys no license or title under
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any patent or copyright and makes no representation or warranty that this
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Information is free from patent or copyright infringement.
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****************************************************************************/
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#include "bb_cpu_timer.h"
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#include "hw_reg_api.h"
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#include "rfplc_reg_base.h"
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#include "rf_mac_reg.h"
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#include "mac_sys_reg.h"
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#include "mac_rf_isr.h"
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extern rf_mac_isr_ctx_t g_rf_mac_isr_1;
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uint32_t bb_cpu_timer_get_timeout_id()
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{
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return RF_MAC_READ_REG(CFG_RF_MAC_COMMON_TIMER_REG_7_ADDR);
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}
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void bb_cpu_timer_clr_timeout_id(uint32_t timer_sts)
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{
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_TIMER_REG_5_ADDR, timer_sts);
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}
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void bb_cpu_timer_enable()
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{
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g_rf_mac_isr_1.isr_timer_mask = RF_MAC_COMMON_TIMER_CLR_CPU1_MASK;
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/* enable all timer */
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_TIMER_REG_1_ADDR,
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g_rf_mac_isr_1.isr_timer_mask);
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_TIMER_REG_9_ADDR,
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g_rf_mac_isr_1.isr_timer_mask);
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}
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void bb_cpu_timer_disable()
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{
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g_rf_mac_isr_1.isr_timer_mask = 0;
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/* disable all common timer */
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_TIMER_REG_1_ADDR, 0);
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_TIMER_REG_9_ADDR, 0);
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/* clear all status */
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_TIMER_REG_5_ADDR,
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RF_MAC_COMMON_TIMER_CLR_CPU1_MASK);
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}
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void bb_cpu_timer_start(uint32_t timer_id)
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{
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_TIMER_REG_3_ADDR, (1 << timer_id));
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}
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void bb_cpu_timer_stop(uint32_t timer_id)
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{
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_TIMER_REG_5_ADDR, (1 << timer_id));
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}
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void bb_cpu_timer_set(uint32_t timer_id, uint32_t time_us)
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{
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IOT_ASSERT(timer_id < BB_CPU_TIMER_MAX_ID &&
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time_us < BB_CPU_TIMER_MAX_TIME_US);
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uint32_t addr_base = CFG_RF_MAC_COMMON_TIMER_REG_42_ADDR;
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RF_MAC_WRITE_REG(addr_base + (timer_id * 4), (time_us * 25));
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}
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