48 lines
1.6 KiB
C
48 lines
1.6 KiB
C
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/****************************************************************************
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*
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* Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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*
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* This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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* be copied by any method or incorporated into another program without
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* the express written consent of Aerospace C.Power. This Information or any portion
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* thereof remains the property of Aerospace C.Power. The Information contained herein
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* is believed to be accurate and Aerospace C.Power assumes no responsibility or
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* liability for its use in any way and conveys no license or title under
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* any patent or copyright and makes no representation or warranty that this
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* Information is free from patent or copyright infringement.
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*
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* ****************************************************************************/
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#include "chip_reg_base.h"
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#include "hw_reg_api.h"
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#include "hw_ada.h"
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#include "clk.h"
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#include "os_mem.h"
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#include "ahb_rf.h"
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#include "gp_timer.h"
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void dtest_platform_ada_pre_init()
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{
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uint32_t tmp = 0;
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#if HW_PLATFORM == HW_PLATFORM_FPGA
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/* FPGA change clk to 75M */
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clk_core_freq_set(CPU_FREQ_75M);
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#else
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/* change clk to 150M */
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clk_core_freq_set(CPU_FREQ_150M);
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#endif
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tmp = AHB_RF_READ_REG(CFG_AHB_REG1_ADDR);
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REG_FIELD_SET(DVP0_EB, tmp, 1);
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REG_FIELD_SET(AI_EB, tmp, 1);
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REG_FIELD_SET(ADA_EB, tmp, 1);
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REG_FIELD_SET(MAC_EB, tmp, 1);
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AHB_RF_WRITE_REG(CFG_AHB_REG1_ADDR, tmp);
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gp_timer_enable(0, 0, 0);
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/* init dtest mem */
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os_mem_init((uint8_t *)0xffffc00,0x400);
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}
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