289 lines
8.1 KiB
C
289 lines
8.1 KiB
C
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/****************************************************************************
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Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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be copied by any method or incorporated into another program without
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the express written consent of Aerospace C.Power. This Information or any portion
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thereof remains the property of Aerospace C.Power. The Information contained herein
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is believed to be accurate and Aerospace C.Power assumes no responsibility or
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liability for its use in any way and conveys no license or title under
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any patent or copyright and makes no representation or warranty that this
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Information is free from patent or copyright infringement.
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****************************************************************************/
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#include "mac_rawdata_hw.h"
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#include "hw_reg_api.h"
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#include "phy_reg.h"
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#include "iot_errno.h"
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#include "mac_tx_hw.h"
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#include "os_types.h"
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#if HW_PLATFORM >= HW_PLATFORM_FPGA
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#include "mac_raw_reg.h"
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#include "mac_sched_hw.h"
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#include "phy_bb.h"
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#include "plc_mpdu_header.h"
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#include "mac_sys_reg.h"
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#include "hw_reg_api.h"
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void IRAM_ATTR iot_raw_write_reg(uint32_t type, uint32_t addr, uint32_t val)
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{
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if(type == RAW_REG_TYPE_MAC){
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RGF_RAW_WRITE_REG(addr,val);
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}else if(type == RAW_REG_TYPE_PHY){
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PHY_WRITE_REG(addr, val);
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}
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}
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uint32_t IRAM_ATTR iot_raw_read_reg(uint32_t type, uint32_t addr)
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{
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uint32_t val = 0;
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if(type == RAW_REG_TYPE_MAC){
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val = RGF_RAW_READ_REG(addr);
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}else if(type == RAW_REG_TYPE_PHY){
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val = PHY_READ_REG(addr);
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}
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return val;
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}
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void mac_rawdata_mode_enable(uint32_t enable)
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{
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/* set mac raw mode */
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iot_raw_write_reg(RAW_REG_TYPE_MAC, CFG_RAW_DATA_MODE_ADDR, enable);
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}
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void phy_rawdata_mode_enable(uint32_t enable)
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{
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/* set bb raw mode */
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iot_raw_write_reg(RAW_REG_TYPE_PHY,CFG_BB_RAW_DATA_MODE_CTRL_ADDR, \
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enable);
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}
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void mac_rawdata_proto_set(uint32_t src_prot)
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{
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/* set mac raw mode proto */
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src_prot &= CFG_SW_TX_PROTO_MASK;
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iot_raw_write_reg(RAW_REG_TYPE_MAC, CFG_SW_TX_PROTO_ADDR, src_prot);
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}
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uint32_t iot_rawdata_hw_enable(uint8_t rawdata_enable)
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{
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/* set mac raw mode */
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mac_rawdata_mode_enable(rawdata_enable);
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/* set bb raw mode */
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phy_rawdata_mode_enable(rawdata_enable);
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return ERR_OK;
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}
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uint32_t iot_rawdata_get_tx_fc_bytes(fc_trans_msg *rawfc)
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{
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uint32_t idx=0;
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#ifdef ENABLE_PRINT
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iot_printf("get_mac_tx_fc\n");
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#endif
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rawfc->org_fc[idx++]= iot_raw_read_reg(RAW_REG_TYPE_MAC,CFG_TX_RAW_FC_0_ADDR);
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rawfc->org_fc[idx++]= iot_raw_read_reg(RAW_REG_TYPE_MAC,CFG_TX_RAW_FC_1_ADDR);
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rawfc->org_fc[idx++]= iot_raw_read_reg(RAW_REG_TYPE_MAC,CFG_TX_RAW_FC_2_ADDR);
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rawfc->org_fc[idx++]= iot_raw_read_reg(RAW_REG_TYPE_MAC,CFG_TX_RAW_FC_3_ADDR);
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return ERR_OK;
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}
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uint32_t iot_rawdata_translate_tx_fc(fc_trans_msg *rawfc, \
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uint32_t src_prot, uint32_t trans_prot)
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{
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/*
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* consider two cases. 1. src_prot and trans_prot are same, but minor
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* version different. 2. src_prot and trans_prot are different.
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* 2nd case should not to hit, focus on case 1 currently.
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*/
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frame_control_t* src_sgfc = NULL;
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frame_control_t* trans_sgfc = NULL;
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spg_frame_control_t* src_spgfc = NULL;
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spg_frame_control_t* trans_spgfc = NULL;
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if(src_prot == trans_prot){
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if(src_prot == PLC_PROTO_TYPE_SG){
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src_sgfc = (frame_control_t*)rawfc->org_fc;
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trans_sgfc = (frame_control_t*)rawfc->trans_fc;
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/* real work should be bits adjustment in same prot family
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* currently just copy
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*/
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os_mem_cpy(trans_sgfc,src_sgfc,(RAW_FC_LEN_DW*sizeof(uint32_t)) );
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}else if (src_prot == PLC_PROTO_TYPE_SPG){
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src_spgfc = (spg_frame_control_t*)rawfc->org_fc;
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trans_spgfc = (spg_frame_control_t*)rawfc->trans_fc;
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/* real work should be bits adjustment in same prot family
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* currently just copy
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*/
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os_mem_cpy(trans_spgfc, src_spgfc,(RAW_FC_LEN_DW*sizeof(uint32_t)));
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}else{
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IOT_ASSERT(0);
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}
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}else{
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IOT_ASSERT(0);
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}
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return ERR_OK;
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}
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uint32_t iot_rawdata_set_translate_tx_fc(fc_trans_msg *rawfc)
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{
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uint32_t idx = 0;
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#ifdef ENABLE_PRINT
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iot_printf("set_mac_tx_fc\n");
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#endif
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/* caculate crc data here */
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// iot_rawdata_set_crc(rawfc);
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/* Set Data */
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iot_raw_write_reg(RAW_REG_TYPE_MAC,CFG_TX_SW_FC_0_ADDR,rawfc->trans_fc[idx++]);
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iot_raw_write_reg(RAW_REG_TYPE_MAC,CFG_TX_SW_FC_1_ADDR,rawfc->trans_fc[idx++]);
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iot_raw_write_reg(RAW_REG_TYPE_MAC,CFG_TX_SW_FC_2_ADDR,rawfc->trans_fc[idx++]);
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iot_raw_write_reg(RAW_REG_TYPE_MAC,CFG_TX_SW_FC_3_ADDR,rawfc->trans_fc[idx++]);
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//iot_rawdata_modify_tx_fc(rawfc);
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/* Valid data */
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iot_raw_write_reg(RAW_REG_TYPE_MAC,CFG_SW_FC_VALID_ADDR, 1);
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#ifdef RAWDATA_TIME_PROFILE_ENABLE
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/* log interrupt trigger time */
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iot_rawdata_mark_timestamp(&rawfc->profile.rawdata_set_translate_fc_ticks);
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#endif
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return ERR_OK;
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}
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void mac_rawdata_sack_tx_isr_disable()
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{
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uint32_t reg_intr_en = 0;
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/* handle mac intr */
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reg_intr_en = iot_raw_read_reg(RAW_REG_TYPE_MAC, CFG_RAW_INT_ENA_ADDR);
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reg_intr_en &= (~MAC_TX_SACK_FC_MASK);
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iot_raw_write_reg(RAW_REG_TYPE_MAC, CFG_RAW_INT_ENA_ADDR, reg_intr_en);
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return;
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}
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void mac_rawdata_sack_tx_isr_enable()
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{
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uint32_t reg_intr_en = 0;
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uint32_t reg_int = 0;
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reg_int = iot_raw_read_reg(RAW_REG_TYPE_MAC, CFG_RAW_INT_PRI3_MASK_ADDR);
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reg_int |= MAC_TX_SACK_FC_MASK;
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iot_raw_write_reg(RAW_REG_TYPE_MAC, CFG_RAW_INT_PRI3_MASK_ADDR, reg_int);
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reg_intr_en = iot_raw_read_reg(RAW_REG_TYPE_MAC, CFG_RAW_INT_ENA_ADDR);
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reg_intr_en |= MAC_TX_SACK_FC_MASK;
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iot_raw_write_reg(RAW_REG_TYPE_MAC, CFG_RAW_INT_ENA_ADDR, reg_intr_en);
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return;
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}
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void mac_rawdata_sack_isr_cfg(uint32_t src_prot)
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{
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/* disable sack tx rawdata isr */
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mac_rawdata_sack_tx_isr_disable();
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/* set rawdata mode */
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mac_rawdata_proto_set(src_prot);
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/* enable sack tx rawdata isr */
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mac_rawdata_sack_tx_isr_enable();
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}
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void mac_rawdata_tx_start_isr_disable()
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{
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uint32_t reg_intr_en = 0;
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/* handle mac intr */
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reg_intr_en = iot_raw_read_reg(RAW_REG_TYPE_MAC, CFG_RAW_INT_ENA_ADDR);
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reg_intr_en &= (~MAC_TX_START_MASK);
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iot_raw_write_reg(RAW_REG_TYPE_MAC, CFG_RAW_INT_ENA_ADDR, reg_intr_en);
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return;
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}
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void mac_rawdata_tx_start_isr_enable()
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{
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uint32_t reg_intr_en = 0;
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uint32_t reg_int = 0;
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reg_int = iot_raw_read_reg(RAW_REG_TYPE_MAC, CFG_RAW_INT_PRI3_MASK_ADDR);
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reg_int |= MAC_TX_START_MASK;
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iot_raw_write_reg(RAW_REG_TYPE_MAC, CFG_RAW_INT_PRI3_MASK_ADDR, reg_int);
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reg_intr_en = iot_raw_read_reg(RAW_REG_TYPE_MAC, CFG_RAW_INT_ENA_ADDR);
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reg_intr_en |= MAC_TX_START_MASK;
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iot_raw_write_reg(RAW_REG_TYPE_MAC, CFG_RAW_INT_ENA_ADDR, reg_intr_en);
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return;
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}
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void mac_rawdata_tx_war_isr_cfg(void)
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{
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/* disable rawdata tx start isr */
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mac_rawdata_tx_start_isr_disable();
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/* enable rawdata tx start isr */
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mac_rawdata_tx_start_isr_enable();
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}
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void IRAM_ATTR mac_rawdata_tx_start_isr_clr(void)
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{
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uint32_t reg_intr_status = 0;
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reg_intr_status = iot_raw_read_reg(RAW_REG_TYPE_MAC, \
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CFG_RAW_INT_CLR_ADDR);
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reg_intr_status |= MAC_TX_START_INT_STATUS;
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iot_raw_write_reg(RAW_REG_TYPE_MAC, \
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CFG_RAW_INT_CLR_ADDR, reg_intr_status);
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}
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#else // HW_PLATFORM >= HW_PLATFORM_FPGA
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void mac_rawdata_sack_isr_cfg(uint32_t src_prot)
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{
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(void)src_prot;
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}
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#endif
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#if CPLC_IOT_CERT_SUPPORT
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void mac_rawdata_send_cert_mpdu(uint32_t hwqid, tx_mpdu_start *mpdu,
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fc_trans_msg *p_msg, void *fc, uint32_t tmi, uint32_t ext_tmi)
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{
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(void)hwqid;
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(void)mpdu;
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(void)p_msg;
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(void)fc;
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(void)tmi;
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(void)ext_tmi;
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}
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#else /* CPLC_IOT_CERT_SUPPORT */
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void mac_rawdata_send_cert_mpdu(uint32_t hwqid, tx_mpdu_start *mpdu,
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fc_trans_msg *p_msg, void *fc, uint32_t tmi, uint32_t ext_tmi)
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{
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(void)hwqid;
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(void)mpdu;
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(void)p_msg;
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(void)fc;
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(void)tmi;
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(void)ext_tmi;
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}
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#endif /* CPLC_IOT_CERT_SUPPORT */
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