92 lines
3.2 KiB
C
92 lines
3.2 KiB
C
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/****************************************************************************
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Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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be copied by any method or incorporated into another program without
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the express written consent of Aerospace C.Power. This Information or any portion
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thereof remains the property of Aerospace C.Power. The Information contained herein
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is believed to be accurate and Aerospace C.Power assumes no responsibility or
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liability for its use in any way and conveys no license or title under
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any patent or copyright and makes no representation or warranty that this
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Information is free from patent or copyright infringement.
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****************************************************************************/
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#ifndef __ATE_MAIN_H
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#define __ATE_MAIN_H
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#include "os_types.h"
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#include "phy_cal.h"
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#pragma pack(push) /* save the pack status */
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#pragma pack(1) /* 1 byte align */
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#define ATE_TONE_3M (41)
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#define PHY_NF_RST_VAL (121)
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#define PHY_NF_RTY_CNT (10)
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#define PMU_ICCAL_NUM (32)
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/* ATE software version */
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#define ATE_SW_VER ("SW_V1.0_20190221")
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#define ERR_BIT(a) (0x00000001<<(a)) // | 0x00000002)
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typedef enum _iot_ftm_result {
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ATE_TEST_OK = 0x01,
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ATE_TEST_FAIL = 0xFF,
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} iot_ftm_result_t;
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typedef enum _iot_ate_flags {
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ATE_FLAG_OK = 0x0, // TEST OK
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ATE_DDR_FAIL_FREQ = 0x1, // swtich cpu freqence failed
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ATE_DDR_FAIL_INIT = 0x2, // ddr training failed
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ATE_DDR_FAIL_BOND = 0x3, // ddr bond test
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ATE_FLASH_FAIL_BOND = 0x4, // flash bond test
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ATE_FLASH_FAIL_ID = 0x5, // flash id failed
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ATE_FLASH_FAIL_INIT = 0x6, // flash init failed
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ATE_FLASH_FAIL_QUAD = 0x7, // flash quad mode failed
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ATE_FLASH_FAIL_ERASE = 0x8, // flash erase failed
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ATE_FLASH_FAIL_PRGM = 0x9, // flash program failed
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ATE_FLASH_FAIL_READ = 0x10, // flash read failed
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} iot_ate_flags;
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/* ate total info structure: start from 0xfff8000 */
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typedef struct _ate_info {
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uint8_t result;
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uint32_t ret_flag;
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uint16_t tx_dc[4];
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uint16_t rx_dc[PHY_GAIN_STEP_MAX]; //PHY_GAIN_STEP_MAX = 85
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int8_t csi_snr[16];
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int8_t csi_amp[16];
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uint8_t rx_band_filter[8];
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uint32_t nf;
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int32_t doffset_avg;//0xfff80e3
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int32_t dx_avg;//0xfff80e7
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int32_t dy_avg;//0xfff80eb
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float vref;//0xfff80ef
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int32_t dc_offset;//0xfff80f3
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int32_t ch1_adc3_v[PMU_ICCAL_NUM]; //PMU_ICCAL_NUM = 32,0xfff80f7
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uint32_t cnt;
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uint8_t sw_version[22];
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uint8_t mac[6];
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uint32_t chip_id;
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uint32_t rsv[4];//0xfff8173
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} ate_info_t;
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typedef struct _ate_loop_back_gain_list {
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int8_t tx_tone_att;
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int8_t tx_factor;
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uint8_t tx_pga_gain;
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uint8_t rx_pgf_gain;
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uint8_t rx_bq_gain;
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uint8_t rx_pga_gain;
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int8_t rx_gain_shift;
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uint8_t rx_lna_gain;
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} ate_loop_back_gain_list_t;
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#pragma pack(pop) /* restore the pack status */
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#endif // !__ATE_MAIN_H
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