101 lines
		
	
	
		
			2.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
		
		
			
		
	
	
			101 lines
		
	
	
		
			2.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
|  | /****************************************************************************
 | ||
|  | 
 | ||
|  | Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED. | ||
|  | 
 | ||
|  | This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT | ||
|  | be copied by any method or incorporated into another program without | ||
|  | the express written consent of Aerospace C.Power. This Information or any portion | ||
|  | thereof remains the property of Aerospace C.Power. The Information contained herein | ||
|  | is believed to be accurate and Aerospace C.Power assumes no responsibility or | ||
|  | liability for its use in any way and conveys no license or title under | ||
|  | any patent or copyright and makes no representation or warranty that this | ||
|  | Information is free from patent or copyright infringement. | ||
|  | 
 | ||
|  | ****************************************************************************/ | ||
|  | #ifndef __ANA_H
 | ||
|  | #define __ANA_H
 | ||
|  | 
 | ||
|  | #ifdef __cplusplus
 | ||
|  | extern "C" { | ||
|  | #endif
 | ||
|  | 
 | ||
|  | #if HW_PLATFORM > HW_PLATFORM_SIMU
 | ||
|  | #include "ana_hw.h"
 | ||
|  | #endif
 | ||
|  | 
 | ||
|  | #define ANA_PLL_CLK_MAX         (4)
 | ||
|  | 
 | ||
|  | typedef struct _ana_pll_para_t{ | ||
|  |     uint8_t clk_id :4, | ||
|  |         pll_n :4; | ||
|  |     uint8_t pll_m; | ||
|  | } ana_pll_para_t; | ||
|  | 
 | ||
|  | extern ana_pll_para_t pll_param_tbl[ANA_PLL_CLK_MAX]; | ||
|  | 
 | ||
|  | /**
 | ||
|  |  *@brief ana_i2c_write. | ||
|  |  * | ||
|  |  *  analog register write by hardware i2c protocol. | ||
|  |  * | ||
|  |  *@param reg_id             [granite regiter index.] | ||
|  |  *@param wdata              [the data will be written to register.] | ||
|  |  *@param mask               [the mask for the written data.] | ||
|  |  *@exception                [none.] | ||
|  |  *@return                   [none.] | ||
|  |  */ | ||
|  | void ana_i2c_write(uint32_t reg_id, uint32_t wdata, uint32_t mask); | ||
|  | 
 | ||
|  | /**
 | ||
|  |  *@brief ana_i2c_read. | ||
|  |  * | ||
|  |  *  analog register read by hardware i2c protocol. | ||
|  |  * | ||
|  |  *@param reg_id             [granite regiter index.] | ||
|  |  *@param rdata              [the data will be read from register.] | ||
|  |  *@param rodata             [the extern read only data.] | ||
|  |  *@exception                [none.] | ||
|  |  *@return                   [none.] | ||
|  |  */ | ||
|  | void ana_i2c_read(uint32_t reg_id, uint32_t *rdata, uint8_t *rodata); | ||
|  | 
 | ||
|  | /**
 | ||
|  |  *@brief ana_i2c_soft_reset. | ||
|  |  * | ||
|  |  *  enable or disable analog i2c soft reset. | ||
|  |  * | ||
|  |  *@param                    [none.] | ||
|  |  *@exception                [none.] | ||
|  |  *@return                   [none.] | ||
|  |  */ | ||
|  | void ana_i2c_soft_reset(); | ||
|  | 
 | ||
|  | /**
 | ||
|  |  *@brief ana_pll_read. | ||
|  |  * | ||
|  |  *  read pll M and N parameters from analog register. | ||
|  |  * | ||
|  |  *@param pll_m              [Feedback 8-bit divider control.] | ||
|  |  *@param pll_n              [Input 4-bit divider control.] | ||
|  |  *@exception                [none.] | ||
|  |  *@return                   [none.] | ||
|  |  */ | ||
|  | void ana_pll_read(uint8_t *pll_m, uint8_t *pll_n); | ||
|  | 
 | ||
|  | /**
 | ||
|  |  *@brief ana_clk_en. | ||
|  |  * | ||
|  |  *  enable or disable analog clk. | ||
|  |  * | ||
|  |  *@param en                 [true for enable or false for disable.] | ||
|  |  *@exception                [none.] | ||
|  |  *@return                   [none.] | ||
|  |  */ | ||
|  | void ana_clk_en(bool_t en); | ||
|  | 
 | ||
|  | #ifdef __cplusplus
 | ||
|  | } | ||
|  | #endif
 | ||
|  | 
 | ||
|  | #endif  //__ANA_H
 |