kunlun/driver/src/hw3/ana.c

/****************************************************************************

Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.

This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
be copied by any method or incorporated into another program without
the express written consent of Aerospace C.Power. This Information or any portion
thereof remains the property of Aerospace C.Power. The Information contained herein
is believed to be accurate and Aerospace C.Power assumes no responsibility or
liability for its use in any way and conveys no license or title under
any patent or copyright and makes no representation or warranty that this
Information is free from patent or copyright infringement.

***************************************************************************/
#include "os_types.h"
#include "hw_reg_api.h"
#include "ana.h"
#include "ana_dig_wrap_rf.h"

/* val : Loopmode, 0 - MDLL, 1 - PLL. */
void IRAM_ATTR ana_mdll_loopmode_set(uint32_t val)
{
    uint32_t data;

    val = val ? 1 : 0;
    data = DTOP_ANA_INF_READ_REG(CFG_ANA_DIG_REG_CFG18_ADDR);
    REG_FIELD_SET(D_MDLL_LOOPMODE, data, val);
    DTOP_ANA_INF_WRITE_REG(CFG_ANA_DIG_REG_CFG18_ADDR, data);
}

void ana_dcdc_vref_code_set(uint8_t val)
{
    uint32_t temp;

    temp = DTOP_ANA_INF_READ_REG(CFG_ANA_DIG_REG_CFG20_ADDR);
    REG_FIELD_SET(D_VREF_TUNE_DCDC, temp, val);
    DTOP_ANA_INF_WRITE_REG(CFG_ANA_DIG_REG_CFG20_ADDR, temp);
}

uint8_t ana_dcdc_vref_code_get()
{
    uint32_t temp;

    temp = DTOP_ANA_INF_READ_REG(CFG_ANA_DIG_REG_CFG20_ADDR);

    return (REG_FIELD_GET(D_VREF_TUNE_DCDC, temp));
}

void ana_ldo_trim_code_set(uint8_t value)
{
    uint32_t temp;

    temp = DTOP_ANA_INF_READ_REG(CFG_ANA_DIG_REG_CFG21_ADDR);
    REG_FIELD_SET(FLASH_LDO_OUT_TRIM, temp, value);
    DTOP_ANA_INF_WRITE_REG(CFG_ANA_DIG_REG_CFG21_ADDR, temp);
}

uint8_t ana_ldo_trim_code_get(void)
{
    uint32_t temp;

    temp = DTOP_ANA_INF_READ_REG(CFG_ANA_DIG_REG_CFG21_ADDR);

    return (REG_FIELD_GET(FLASH_LDO_OUT_TRIM, temp));
}

void ana_vbg_trim_code_set(uint8_t val)
{
    uint32_t temp;

    temp = DTOP_ANA_INF_READ_REG(CFG_ANA_DIG_REG_CFG17_ADDR);
    REG_FIELD_SET(D_BG_VBG_CNTL, temp, val);
    DTOP_ANA_INF_WRITE_REG(CFG_ANA_DIG_REG_CFG17_ADDR, temp);
}

uint8_t ana_vbg_trim_code_get()
{
    uint32_t temp;

    temp = DTOP_ANA_INF_READ_REG(CFG_ANA_DIG_REG_CFG17_ADDR);

    return (REG_FIELD_GET(D_BG_VBG_CNTL, temp));
}

void ana_iccal_trim_code_set(uint8_t val)
{
    uint32_t temp;

    temp = DTOP_ANA_INF_READ_REG(CFG_ANA_DIG_REG_CFG17_ADDR);
    REG_FIELD_SET(D_BG_ICCAL, temp, val);
    DTOP_ANA_INF_WRITE_REG(CFG_ANA_DIG_REG_CFG17_ADDR, temp);
}

uint8_t ana_iccal_trim_code_get()
{
    uint32_t temp;

    temp = DTOP_ANA_INF_READ_REG(CFG_ANA_DIG_REG_CFG17_ADDR);

    return (REG_FIELD_GET(D_BG_ICCAL, temp));
}

void ana_mdll_ldo_trim_code_set(uint8_t val)
{
    uint32_t temp;

    temp = DTOP_ANA_INF_READ_REG(CFG_ANA_DIG_REG_CFG18_ADDR);
    REG_FIELD_SET(D_MDLL_LDOVREF_TRIM, temp, val);
    DTOP_ANA_INF_WRITE_REG(CFG_ANA_DIG_REG_CFG18_ADDR, temp);
}

uint8_t ana_mdll_ldo_trim_code_get()
{
    uint32_t temp;

    temp = DTOP_ANA_INF_READ_REG(CFG_ANA_DIG_REG_CFG18_ADDR);

    return (REG_FIELD_GET(D_MDLL_LDOVREF_TRIM, temp));
}