282 lines
9.1 KiB
C
282 lines
9.1 KiB
C
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/****************************************************************************
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Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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be copied by any method or incorporated into another program without
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the express written consent of Aerospace C.Power. This Information or any portion
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thereof remains the property of Aerospace C.Power. The Information contained herein
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is believed to be accurate and Aerospace C.Power assumes no responsibility or
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liability for its use in any way and conveys no license or title under
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any patent or copyright and makes no representation or warranty that this
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Information is free from patent or copyright infringement.
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****************************************************************************/
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#ifndef MAC_DESC_ENGINE_H
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#define MAC_DESC_ENGINE_H
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#include "os_types.h"
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#include "iot_mem_pool.h"
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#include "command_list.h"
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#include "plc_protocol.h"
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#include "plc_const.h"
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#include "mac_peer.h"
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#include "mac_rf_hwq_mgr.h"
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#include "hw_war.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define PLC_ROAM_PEER_RESV 16
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#define PLC_SELF_PEER_RESV 3
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/* mac tei bitmap size in the view of peer type occupy peer size */
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#define PLC_MAC_TEI_BITMAP_OCCUPY (MAC_TEI_MAP_BYTE_LEN \
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/ sizeof(mac_peer_t))
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/* the param constrols how many peers could be directly conncted */
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#if PLC_SUPPORT_CCO_ROLE
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/* CCo */
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#if RUN_IN_PSRAM
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#if (IOT_PSRAM_SIZE >= 4)
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#define PLC_MAC_PEER_POOL_SIZE PLC_TEI_MAX_NUM
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/* rx pb desc should responding to the sub peer number */
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#define PLC_RX_PB_POOL_SIZE (PLC_MAC_PEER_POOL_SIZE * 2)
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/* cco stream peer:stream 1:8 */
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#define PLC_MAC_STREAM_POOL_SIZE (PLC_MAC_PEER_POOL_SIZE * 8)
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#else /* (IOT_PSRAM_SIZE >= 4) */
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#define PLC_MAC_PEER_POOL_SIZE PLC_TEI_MAX_NUM
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/* rx pb desc should responding to the sub peer number */
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#define PLC_RX_PB_POOL_SIZE (PLC_MAC_PEER_POOL_SIZE * 2)
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/* cco stream peer:stream 1:6 */
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#define PLC_MAC_STREAM_POOL_SIZE (PLC_MAC_PEER_POOL_SIZE * 6)
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#endif /* (IOT_PSRAM_SIZE >= 4) */
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#else /* RUN_IN_PSRAM */
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#define PLC_MAC_PEER_POOL_SIZE PLC_TEI_MAX_NUM
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/* rx pb desc should responding to the sub peer number */
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#define PLC_RX_PB_POOL_SIZE (PLC_MAC_PEER_POOL_SIZE * 1)
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/* cco stream peer:stream 1:3 */
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#define PLC_MAC_STREAM_POOL_SIZE (PLC_MAC_PEER_POOL_SIZE * 3)
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#endif /* RUN_IN_PSRAM */
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#else /* PLC_SUPPORT_CCO_ROLE */
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/* PCO */
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#define PLC_MAC_PEER_POOL_SIZE (PLC_PCO_MAX_D_SUB_STA \
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+ PLC_ROAM_PEER_RESV \
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+ PLC_SELF_PEER_RESV \
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- PLC_MAC_TEI_BITMAP_OCCUPY)
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/* rx pb desc should responding to the sub peer number */
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#define PLC_RX_PB_POOL_SIZE (PLC_MAC_PEER_POOL_SIZE)
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/* sta stream peer:stream 1:2.5 */
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#define PLC_MAC_STREAM_POOL_SIZE (PLC_MAC_PEER_POOL_SIZE * 5 / 2)
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#endif /* PLC_SUPPORT_CCO_ROLE */
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/* SWQ depth related to buf num */
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#define PLC_MAC_MSDU_FRAME_POOL_SIZE min(PLC_SMALL_TX_BUF_COUNT, \
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PLC_SHORT_TX_BUF_COUNT)
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/* token total cnt : 3/4 of SWQ depth buf num */
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#define PLC_MAC_SWQ_DEPTH (PLC_MAC_MSDU_FRAME_POOL_SIZE - \
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(PLC_MAC_MSDU_FRAME_POOL_SIZE >> 2))
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/* msdu in hwq : should be less than tx buf num
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* use half of tx buf temply
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*/
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#define PLC_MAC_MSDU_POOL_SIZE (PLC_MAC_MSDU_FRAME_POOL_SIZE / 2)
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/* tx_mpdu desc num in hwq:
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* need consider the swq depth, set to each msdu one mpdu temply */
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#define PLC_TX_MPDU_POOL_SIZE (PLC_MAC_MSDU_POOL_SIZE / 2 * 3)
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/* contains tx mpdu start desc in the msdu desc */
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#define PLC_TX_MPDU_START_POOL_SIZE \
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(PLC_TX_MPDU_POOL_SIZE - PLC_MAC_MSDU_POOL_SIZE)
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#define PLC_TX_MPDU_END_POOL_SIZE PLC_TX_MPDU_POOL_SIZE
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#define PLC_TX_PB_POOL_SIZE (PLC_TX_MPDU_POOL_SIZE * 2)
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/* the amount left for 3phase tx beacon */
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#define PLC_TX_DUMMY_LEFT 3
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#define PLC_SCHED_CMD_LIST_POOL_SIZE HW_SCHED_QUEUE_DEPTH
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#define PLC_TX_DUMMY_POOL_SIZE (MAC_QUE_NUM + PLC_TX_DUMMY_LEFT)
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/* number of bound CSMA tokens */
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#define PLC_MAC_CSMA_TOKEN_NUM (PLC_MAC_SWQ_DEPTH - \
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PLC_TDMA_TOKEN_NUM - \
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PLC_BCSMA_TOKEN_NUM)
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/* rf config */
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#if HPLC_RF_DEV_SUPPORT
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/* SWQ depth related to buf num */
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#define RF_MAC_MSDU_FRAME_POOL_SIZE min(RF_SMALL_TX_BUF_COUNT, \
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RF_SHORT_TX_BUF_COUNT)
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/* msdu in hwq : should be less than tx buf num
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* use half of tx buf temply
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*/
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#define RF_MAC_MSDU_POOL_SIZE (RF_MAC_MSDU_FRAME_POOL_SIZE / 2)
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/* tx_mpdu desc num in hwq:
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* need consider the swq depth, set to each msdu one mpdu temply */
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#define RF_TX_MPDU_POOL_SIZE (RF_MAC_MSDU_POOL_SIZE / 2 * 3)
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/* contains tx mpdu start desc in the msdu desc */
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#define RF_TX_MPDU_START_POOL_SIZE \
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(RF_TX_MPDU_POOL_SIZE - RF_MAC_MSDU_POOL_SIZE)
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#define RF_TX_MPDU_END_POOL_SIZE RF_TX_MPDU_POOL_SIZE
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#define RF_TX_PB_POOL_SIZE RF_TX_MPDU_POOL_SIZE
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#define RF_SCHED_CMD_LIST_POOL_SIZE HW_SCHED_QUEUE_DEPTH
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#define RF_TX_DUMMY_POOL_SIZE (RF_TX_MPDU_POOL_SIZE / 2)
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#define RF_MAC_STREAM_POOL_SIZE PLC_MAC_STREAM_POOL_SIZE
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#else /* HPLC_RF_DEV_SUPPORT */
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/* SWQ depth related to buf num */
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#define RF_MAC_MSDU_FRAME_POOL_SIZE 0
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/* msdu in hwq */
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#define RF_MAC_MSDU_POOL_SIZE 0
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/* tx_mpdu desc num in hwq */
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#define RF_TX_MPDU_POOL_SIZE 0
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#define RF_TX_MPDU_START_POOL_SIZE 0
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#define RF_TX_MPDU_END_POOL_SIZE 0
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#define RF_TX_PB_POOL_SIZE 0
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#define RF_SCHED_CMD_LIST_POOL_SIZE 0
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#define RF_TX_DUMMY_POOL_SIZE 0
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#define RF_MAC_STREAM_POOL_SIZE 0
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#endif /* HPLC_RF_DEV_SUPPORT */
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#if ENA_RF_ONLY_ONE_CSMA_HWQ
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/* rf csma beacon num */
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#define RF_MAC_CSMA_BCN_NUM 0
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#else
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/* rf csma beacon num */
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#define RF_MAC_CSMA_BCN_NUM 1
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#endif
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#define RF_MAC_PEER_POOL_SIZE 0 /* rf peer reuse plc peer */
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#define RF_RX_PB_POOL_SIZE 0 /* rf only one pb */
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/* token total cnt : 3/4 of SWQ depth buf num */
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#define RF_MAC_SWQ_DEPTH (RF_MAC_MSDU_FRAME_POOL_SIZE - \
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(RF_MAC_MSDU_FRAME_POOL_SIZE >> 2))
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#define RF_MAC_CSMA_TOKEN_NUM (RF_MAC_SWQ_DEPTH - \
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RF_TDMA_TOKEN_NUM - \
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RF_BCSMA_TOKEN_NUM - \
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RF_MAC_CSMA_BCN_NUM)
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typedef enum _mac_desc_pool_type {
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PLC_MAC_MSDU_POOL,
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PLC_MAC_PEER_POOL,
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PLC_MAC_STREAM_POOL,
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PLC_TX_MPDU_START_POOL,
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PLC_TX_MPDU_END_POOL,
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PLC_TX_PB_START_POOL,
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PLC_RX_PB_DESC_POOL,
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PLC_SCHED_CMD_LIST_POOL,
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PLC_TX_DUMMY_NODE_POOL,
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PLC_MAC_MSDU_FRAME_POOL,
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MAX_PLC_DESC_POOL_NUM
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} mac_desc_pool_type_t;
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typedef struct _mac_desc_pool_cfg {
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/* mac_desc_pool_type_t desc_type; */
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uint32_t desc_num;
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uint32_t desc_size;
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} mac_desc_pool_cfg_t;
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typedef struct _mac_desc_cfg {
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uint32_t mac_desc_num[MAX_PLC_DESC_POOL_NUM];
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} mac_desc_cfg_t;
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typedef struct _mac_desc_engine {
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iot_mem_pool_t mem_pool[MAX_PLC_DESC_POOL_NUM];
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uint32_t used[MAX_PLC_DESC_POOL_NUM];
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os_mutex_h mutex[MAX_PLC_DESC_POOL_NUM];
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#if PLC_MEM_ALLOC_STAT > 1
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uint32_t desc_req_cnt;
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#endif
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uint32_t free_num_min[MAX_PLC_DESC_POOL_NUM];
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} mac_desc_engine_t;
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extern mac_desc_engine_t g_mac_desc_eng;
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/* init the global mac desc node
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* return 0 if successful
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*/
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uint32_t mac_desc_engine_init(
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mac_desc_engine_t *desc_eng, \
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mac_desc_pool_cfg_t *cfg
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);
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/* dump mac desc info
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* desc_ptr (OUT) - the desc gotten if return 0
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*/
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void mac_desc_info_dump(mac_desc_engine_t *desc_eng);
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/* dump mac desc info to flash immediately
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* desc_ptr (OUT) - the desc gotten if return 0
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*/
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void mac_desc_info_dump_force(mac_desc_engine_t *desc_eng);
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/* alloc a desc as requested type
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* return 0 if success
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* desc_ptr (OUT) - the desc gotten if return 0
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*/
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uint32_t mac_desc_get(mac_desc_engine_t *desc_eng, \
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mac_desc_pool_type_t desc_type, \
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void **desc_ptr
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);
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/* free a desc as requested type
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* return 0 if success, other for error
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*/
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uint32_t mac_desc_free(mac_desc_engine_t *desc_eng, \
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mac_desc_pool_type_t desc_type, void *desc_ptr);
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/**
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*@brief mac_check_peer_stream_desc mac check peer stream cnt
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*@return void
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*/
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void mac_check_peer_stream_desc();
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/* Flow control for msdu sending */
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enum {
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CSMA0_TOKEN_BUCKET_IDX,
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CSMA1_TOKEN_BUCKET_IDX,
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CSMA2_TOKEN_BUCKET_IDX,
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CSMA3_TOKEN_BUCKET_IDX,
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BCSMA_TOKEN_BUCKET_IDX,
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TDMA_TOKEN_BUCKET_IDX ,
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TOKEN_BUCKET_IDX_MAX,
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};
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typedef uint16_t token_num_t;
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extern token_num_t g_mac_token_bucket[TOKEN_BUCKET_IDX_MAX];
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#if HPLC_RF_DEV_SUPPORT
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extern token_num_t g_rf_mac_token_bucket[TOKEN_BUCKET_IDX_MAX];
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#endif
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extern void mac_token_bucket_init();
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#ifdef __cplusplus
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}
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#endif
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#endif // !MAC_DESC_ENGINE_H
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