kunlun/plc/halmac/inc/hw_zc_cmn.h

/****************************************************************************

Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.

This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
be copied by any method or incorporated into another program without
the express written consent of Aerospace C.Power. This Information or any portion
thereof remains the property of Aerospace C.Power. The Information contained herein
is believed to be accurate and Aerospace C.Power assumes no responsibility or
liability for its use in any way and conveys no license or title under
any patent or copyright and makes no representation or warranty that this
Information is free from patent or copyright infringement.

****************************************************************************/
#ifndef _HW_ZC_CMN_H_
#define _HW_ZC_CMN_H_

#include "os_types.h"
#include "gpio_mtx.h"

#ifdef __cplusplus
extern "C" {
#endif

/* indicate choose witch zc block in chip to use */
#define MAC_ZC_HW_LOGIC_KL2                 0
#define MAC_ZC_HW_LOGIC_KL1                 1

/* mac zc hw detect id module define */
#define MAC_ZC_HW_DETECT0                   0
#define MAC_ZC_HW_DETECT1                   1
#define MAC_ZC_HW_DETECT2                   2
#define MAC_ZC_HW_DETECT_CNT                3

/* mac zc hw capturer id module define */
#define MAC_ZC_HW_CAP0                      0
#define MAC_ZC_HW_CAP1                      1
#define MAC_ZC_HW_CAP2                      2
#define MAC_ZC_HW_CAP_ALL                   3
#define MAC_ZC_HW_CAP_CNT                   3
#define MAC_ZC_HW_BITMAP_CAP0               (1 << MAC_ZC_HW_CAP0)
#define MAC_ZC_HW_BITMAP_CAP1               (1 << MAC_ZC_HW_CAP1)
#define MAC_ZC_HW_BITMAP_CAP2               (1 << MAC_ZC_HW_CAP2)
#define MAC_ZC_HW_BITMAP_CAP_ALL            ((1 << MAC_ZC_HW_CAP_CNT) - 1)

/* define mac zc hw gen module input source signal.
 * 1 - internal: the zc gen module input signals is the chip internal ac track's
 *      output signal.
 * 0 - the zc gen module input signal is the cap0's output signal.
 */
#define MAC_ZC_HW_GEN_SELIN_CAP0            0
#define MAC_ZC_HW_GEN_SELIN_INTERNAL        1

/* the threshold number of zc points before INT generation */
#define MAC_ZC_HW_INT_NUM_MAX               7

/* the 22 bit of debug reg is collect edge */
#define MAC_DBG_REG_CAP_EDGE_BIT            22 //set dbg reg = 0x400

/* mtx gpio/signal module signal input source select */
/* select mtx input is zc gpio */
#define MTX_HW_SIG_SEL_INPUT_ZC             0
/* select mtx input is low level voltage */
#define MTX_HW_SIG_SEL_INPUT_LOW            1
/* select mtx input is high level voltage */
#define MTX_HW_SIG_SEL_INPUT_HIGH           2

/* mac zc hw set capture edge */
#define MAC_ZC_HW_CAP_EDGE_RISE             0
#define MAC_ZC_HW_CAP_EDGE_FALL             1

/* mac zc hw ZC_GEN_OFFSET reg offset value */
#define MAC_ZC_HW_GEN_OFFSET_RIGHT          0
#define MAC_ZC_HW_GEN_OFFSET_LEFT           1

/* the zc gen hw bound square wave dur, unit ntb */
#define MAC_ZC_HW_GEN_BOUND_DUR_NTB         150000

/* the value cfg for HW produce right square wave, should between 1 and
 *  1/2 period, unit ntb
 */
#define MAC_ZC_HW_VIBRATE_PROTECT_NTB       300000

/* the interval between two zc big than this, treat as diff period collect,
 * unit ntb
 */
#define MAC_ZC_HW_DEBOUNCE_NTB              100000

/* the cap hw update zc to register protection time(then generate the cap's
 * interrupt). so sw must be delay to r/w the cap's register.unit ntb */
#define MAC_ZC_HW_CAP_INT_PROTECT_NTB       25000

/* how long time ahead to switch gpio before real zc(5ms). unit ntb */
#define MAC_ZC_SW_GPIO_AHEAD_NTB            125000

/* when finish the training, delay cnt for calculating average period */
#define MAC_ZC_TRAIN_SYSTIC_CNT             32

/* 1/2 training count */
#define MAC_ZC_TRAIN_SYSTIC_MARGIN_CNT      (MAC_ZC_TRAIN_SYSTIC_CNT >> 1)

/* when training for zc low/upper bound int, any phase collect this value
 * consecutive valid data, means this phase is valid.
 */
#define MAC_ZC_TRAIN_BOUND_CONS_CNT         32

/* 1/4 tranining count */
#define MAC_ZC_TRAIN_BOUND_MARGIN_CNT       (MAC_ZC_TRAIN_BOUND_CONS_CNT >> 2)

/* train timer timeout define start { */
/* train for hw zc init ac track ready.  unit 1ms */
#define MAC_ZC_TRAIN_AC_TRACK_TIME_MS       8

/* train for hw zc generator to select sw mtx ready, unit 1ms */
#define MAC_ZC_TRAIN_GEN_SW_MTX_TIME_MS     320

/* train for hw zc generator to select hw mtx ready, unit 1ms */
#define MAC_ZC_TRAIN_GEN_HW_MTX_TIME_MS     100
/* train for hw zc generator to select zc_capx input,
 * wait upper/low bound interrupt time
 */
#define MAC_ZC_TRAIN_BOUND_INT_WAIT_MS      100

/* train for generator interrupt timeout  */
#define MAC_ZC_TRAIN_GEN_INTR_TIME_MS       960

/* train for use the timer to force tigger timeout */
#define MAC_ZC_TRAIN_FORCE_TIME_MS          5

/* total zc train timeout, unit 1ms */
#define MAC_ZC_TRAIN_TIMEOUT_MS             25000

/* system daemon period, unit 1ms */
#define MAC_ZC_SYS_DAEMON_PERIOD_MS         (60 * 1000)

/* system daemon error timeout, unit 1ms */
#define MAC_ZC_SYS_DAEMON_TIMEOUT_MS        (420 * 1000)

/* mac zc system connect relationship */
typedef struct _mac_zc_hw_map_info {
    /* default chip gpio */
    uint8_t     gpio;
    /* extend chip gpio */
    uint8_t     gpio_ext;
    /* mutx signal */
    uint8_t     signal;
    /* mac zc cap id: 0/1/2 */
    uint8_t     cap_id;
    /* mac zc phase id */
    uint8_t     phase_id;
} mac_zc_hw_map_info_t;

/* get ntb middle value */
#define mac_zc_get_ntb_mid(earlier, later) \
    ((uint32_t)(later - earlier)/2 + earlier)

/*
 * @brief           set hw capture period
 *
 * @param is_half_period:  is half period capture zc
 *                  0 : set zc hw full period capture
 *                  others: set zc hw half period capture
 *
 * @retval:         none
 */
void mac_zc_hw_cap_set_period(uint8_t is_half_period);

/*
 * @brief           set hw capture timestamp interval
 *
 * @param cap_interval_cnt:  capture inverval period count
 *                  (cap_interval_cnt + 1) time zc capture once timestamp
 *
 * @retval:         none
 */
void mac_zc_hw_cap_set_interval(uint16_t cap_interval_cnt);

/*
 * @brief           set generate zc hw capture interrupt interval
 *
 * @param cap_interval_cnt:  generate interrupt inverval count.
 *                  (int_num + 1) time zc capture timestamp generate once
 *                  zc_cap_int interrupt
 *
 * @retval:         none
 */
void mac_zc_hw_cap_set_watermark(uint8_t depth);

/*
 * @brief           get generate zc hw capture interrupt interval config
 *
 * @retval:         generate interrupt inverval count.
 *                  (int_num + 1) time zc capture timestamp generate once
 *                  zc_cap_int interrupt
 */
uint32_t mac_zc_hw_cap_get_watermark(void);

/*
 * @brief           set hw capture edge
 *
 * @param is_fall_edge:  set is the fall edge capture
 *                  0 : set zc hw fall edge  capture
 *                  others: set zc hw rising edge capture
 *
 * @retval:         none
 */
void mac_zc_hw_cap_set_edge(uint8_t is_fall_edge);

/*
 * @brief           get hw capture edge config
 *
 * @retval:         is the fall edge capture.
 *                  0 : zc hw fall edge  capture
 *                  others: zc hw rising edge capture
 */
uint8_t mac_zc_hw_cap_get_edge(void);

/*
 * @brief           enable/disable zc hw captures
 *
 * @param cap_bitmap:
 *                  set capture id bitmap, bit0 - cap0, bit1 - cap1, bit2 - cap2
 * @param enable:   0 : disable this capture hw
 *                  others: enable this capture hw
 *
 * @retval:         none
 */
void mac_zc_hw_capx_enable(uint8_t cap_bitmap, uint8_t enable);

/*
 * @brief           trigger hw capture zc timestamp
 *
 * @param cap_id:   set capture id bitmap, bit0 - cap0, bit1 - cap1 ...
 *                  see MAC_ZC_HW_CAPx
 *
 * @retval:         none
 */
void mac_zc_hw_capx_trig(uint8_t cap_bitmap);

/*
 * @brief           WAR: sw trigger gen cap for reset
 *
 * @param signal_id:    target gen connected signal
 * @param cap_edge:     current capx caption edge, see MAC_ZC_HW_CAP_EDGE_XXX
 *
 * @retval:         none
 */
void mac_zc_hw_capx_reset_trig(uint8_t signal_id, uint8_t cap_edge);

/*
 * @brief           set zc generator block input source detect
 *
 * @param zc_gen_phase_sel:   detect id
 *                  see MAC_ZC_HW_DETECTx
 *
 * @retval:         none
 */
void mac_zc_hw_gen_set_phase_sel_mtx(uint8_t zc_gen_phase_sel);

/*
 * @brief           get zc generator block input source detect
 *
 * @retval:         detect id
 *                  see MAC_ZC_HW_DETECTx
 */
uint32_t mac_zc_hw_gen_get_phase_sel_mtx(void);

/*
 * @brief           set zc generator block input source from hw_cap0 or sw
 *
 * @param zc_gen_sel:  see MAC_ZC_HW_CFG_GEN_SEL_XX
 *
 * @retval:         none
 */
void mac_zc_hw_gen_set_gen_sel_mtx(uint8_t zc_gen_sel);

/*
 * @brief           set zc generator block produce square wave period
 *
 * @param is_half_period:   is half zc period produce square wave
 *                  0: half zc period produce square wave
 *                  others: full period produce square wave
 *
 * @retval:         none
 */
void mac_zc_hw_gen_set_ctrl_period(uint8_t is_half_period);

/*
 * @brief           set zc hw gen block produce square wave duration ntb
 *
 * @param dur_ntb:  duration ntb
 *
 * @retval:         none
 */
void mac_zc_hw_gen_set_ctrl_dur(uint32_t dur_ntb);

/*
 * @brief           set zc generator block produce square wave offset
 *
 * @param offset_ntb:   produce square wave offset zc
 * @param offset_lr:    left or right offset
 *                  see MAC_ZC_HW_GEN_OFFSET_XXX
 *
 * @retval:         none
 */
void mac_zc_hw_gen_set_offset(uint32_t offset_ntb, uint8_t offset_lr);

/*
 * @brief           set zc lct track block produce square wave offset
 *
 * @param dur_ntb:  vibrate protect duration ntb
 *
 * @retval:         none
 */
void mac_zc_hw_set_vibrate_protect_dur(uint32_t dur_ntb);

/*
 * @brief           ac track block trigger
 *
 * @retval:         none
 */
void mac_zc_hw_ac_track_trig(void);

/*
 * @brief           get hw current capture edge from debug bus
 *
 * @retval:         capture edge, see MAC_ZC_HW_CAP_EDGE_XXX
 */
uint8_t mac_zc_hw_get_curr_cap_edge(void);

/*
 * @brief           get hw capture's zc timestamp buffer base address
 *
 * @param cap_id:   capture id, see MAC_ZC_HW_CAPx
 *
 * @retval:         timestamp buffer base address
 */
uint32_t* mac_zc_hw_get_ts_base_addr(uint8_t cap_id);

/*
 * @brief           get hw capture's period
 *
 * @param cap_id:   capture id, see MAC_ZC_HW_CAPx
 *
 * @retval:         capture's period ntb
 */
uint32_t mac_zc_hw_get_zc_period(uint8_t cap_id);

/*
 * @brief           fix gpio to signal connect map
 *
 * @param gpio:     chip gpio id
 * @param signal:   chip signal id
 *
 * @retval:         none
 */
void mac_zc_hw_fix_map_gpio2sig(uint8_t gpio, uint8_t signal);

/*
 * @brief           get target cap's last collect zc ts
 *
 * @param cap_id:   capture id, see MAC_ZC_HW_CAPx
 *
 * @retval:         get zc ts
 */
uint32_t mac_zc_hw_get_last_zc_ts(uint8_t cap_id);

/*
 * @brief           load default hw phase map info
 * @param phase_map:phase map ctxt
 * @param phase_id: mac zc phase id, see MAC_ZC_PHASE_XXX
 *
 * @retval:         none
 */
void mac_zc_hw_load_phase_map_def(mac_zc_hw_map_info_t *phase_map,
    uint8_t phase_id);

#ifdef __cplusplus
}
#endif

#endif //_MAC_ZC_HW_H_