kunlun/plc/halmac/hw/inc/desc/command_list.h

/****************************************************************************

Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.

This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
be copied by any method or incorporated into another program without
the express written consent of Aerospace C.Power. This Information or any portion
thereof remains the property of Aerospace C.Power. The Information contained herein
is believed to be accurate and Aerospace C.Power assumes no responsibility or
liability for its use in any way and conveys no license or title under
any patent or copyright and makes no representation or warranty that this
Information is free from patent or copyright infringement.

****************************************************************************/

#ifndef COMMAND_LIST_H
#define COMMAND_LIST_H

/* os shim includes */
#include "os_types.h"

/* hw related defines */
#include "hw_desc.h"

/* plc public includes */
#include "plc_fr.h"

#ifdef __cplusplus
extern "C" {
#endif

#define RX_MODE_SR    0
#define RX_MODE_QR    1
#define RX_MODE_XR    2
#define RX_MODE_SR_QR 3
#define RX_MODE_QR_XR 4
#define RX_MODE_FSK   5

/* pack for the structures in the whole file */
#pragma pack(push)	/* save the pack status */
#pragma pack(1)		/* 1 byte align */

typedef struct _hw_sched_cmd_e {
    /* schedule command end offset. unit is 1ms. */
    uint32_t    end_t       :15,
    /* reserved for future */
                rsvd        :15,
    /* flag to mark if command is rescursive, must be 0 */
                r_flag      :1,
    /* flag to mark if command contain start offset, must be 0 */
                s_flag      :1;
} hw_sched_cmd_e_t;

typedef struct _hw_sched_cmd_se {
    /* schedule command end offset. unit is 1ms. */
    uint32_t    end_t       :15,
    /* shcedule command start offset. unit is 1ms. */
                start_t     :15,
    /* flag to mark if command is rescursive */
                r_flag      :1,
    /* flag to mark if command contain start offset, must be 1 */
                s_flag      :1;
} hw_sched_cmd_se_t;

typedef struct _hw_sched_cmd_r {
    /* schedule command end offset. unit is 1ms. */
    uint32_t    end_t       :15,
    /* reserved for future */
                rsvd        :13,
    /* flag to mark if command is recursive last command */
                re_flag     :1,
    /* flag to mark if command is recursive first command */
                rf_flag     :1,
    /* flag to mark if command is rescursive, must be 1 */
                r_flag      :1,
    /* flag to mark if command contain start offset, must be 0 */
                s_flag      :1;
} hw_sched_cmd_r_t;

typedef struct _hw_sched_cmd {
    union {
        struct {
            /* time slot info of the command */
            union _time_info {
                hw_sched_cmd_e_t    e;
                hw_sched_cmd_se_t   se;
                hw_sched_cmd_r_t    r;
            } t_info;
            /* tx queue enable bitmap */
            uint32_t tx_q_en_bm      :24,
            /* 1 - HW to generate interrupt before this command slot, default 0 */
                     req_int         :1,
            /* 1 - BB stop tx/rx this command slot, default 0 */
                     idle_bit        :1,
            /* set rx rate mode, default 0
             * 0 - SR only
             * 1 - QR only
             * 2 - XR only
             * 3 - SR and QR
             * 4 - QR and XR
             * 5 - FSK
             */
                     rx_rate_mode    :3,
            /* flag to mark if narrow band is enabled. if enabled, HW will work in
             * narrow band mode for this command slot. Otherwise, HW will work in wide
             * band mode.
             */
                     nb_flag         :1,
            /* phase info for this command slot. WH will work in appointed phase.
             * The value definition is aligned with SG spec. See PLC_PHASE_XXX macro.
             * 1 - phase A
             * 2 - phase B
             * 3 - phase C
             */
                     phase           :2;
        };
        struct {
            /* tx queue enable bitmap */
            uint32_t rf_tx_q_en_bm : 8,
                     resv0         : 24;
            /* schedule command end offset. unit is 1ms. */
            uint32_t rf_end_t;
        };
    };
} hw_sched_cmd_t;

#if (PLC_SUPPORT_CCO_ROLE)

#if RUN_IN_PSRAM

/* the maximum count of commands in each command list */
#define HW_SCHED_CMD_MAX_CNT    1000

#else /* RUN_IN_PSRAM */

/* the maximum count of commands in each command list */
#define HW_SCHED_CMD_MAX_CNT    50

#endif /* RUN_IN_PSRAM */

#else /* (PLC_SUPPORT_CCO_ROLE) */

#if RUN_IN_PSRAM

/* the maximum count of commands in each command list */
#define HW_SCHED_CMD_MAX_CNT    500

#else /* RUN_IN_PSRAM */

/* the maximum count of commands in each command list */
#define HW_SCHED_CMD_MAX_CNT    400

#endif /* RUN_IN_PSRAM */

#endif /* (PLC_SUPPORT_CCO_ROLE) */

#if (HW_PLATFORM == HW_PLATFORM_SIMU)

/* simulator platform has no such limitation */
#define HW_SHCED_CMD_DEPTH      HW_SCHED_CMD_MAX_CNT

#else /* HW_PLATFORM == HW_PLATFORM_SIMU */

/* define number of command that HW can accept in one push. currently HW
 * just support limited number of command in one push. For long command list
 * case, SW need to push multiple times.
 */
#define HW_SHCED_CMD_DEPTH      127

#endif

/* define number of command list that HW can accept simultaneously. currently
 * HW just support PING-PONG, so the queue depth is 2.
 */
#define HW_SCHED_QUEUE_DEPTH    2

typedef struct _hw_sched_cmd_list {
    uint32_t alloc_ntb; /* alloc list ntb time*/
    uint32_t start_ntb;
    /* start ntb higher */
    uint32_t start_ntb_h;
    /* next start index to be put into HW scheduler, this is used by SW only */
    uint32_t next_idx;
    /* total number of command in the list, this is used by SW only */
    uint32_t total_cnt    : 29,
    /* flag to mark if current command list include recursive command */
             recursive    : 1,
    /* 1:mac_sched_cco_set, 2:mac_sched_sta_set , 3:mac_sched_set_csma_only */
             caller       : 2;
    hw_sched_cmd_t cmd[HW_SCHED_CMD_MAX_CNT];
} hw_sched_cmd_list_t;

/* get the phase of this command */
#define hw_sched_cmd_get_phase(_cmd) \
    (((hw_sched_cmd_t*)(_cmd))->phase)

/* set the phase of this commmand */
#define hw_sched_cmd_set_phase(_cmd, _plc_phase) \
    do { \
        ((hw_sched_cmd_t*)(_cmd))->phase = \
            PLC_PHASE_TO_HW_PHASE(_plc_phase); \
    } while(0)

#pragma pack(pop)	/* restore the pack status */


#ifdef __cplusplus
}
#endif

#endif /* COMMAND_LIST_H */