103 lines
3.8 KiB
C
103 lines
3.8 KiB
C
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/****************************************************************************
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Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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be copied by any method or incorporated into another program without
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the express written consent of Aerospace C.Power. This Information or any portion
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thereof remains the property of Aerospace C.Power. The Information contained herein
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is believed to be accurate and Aerospace C.Power assumes no responsibility or
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liability for its use in any way and conveys no license or title under
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any patent or copyright and makes no representation or warranty that this
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Information is free from patent or copyright infringement.
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****************************************************************************/
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#include "mac_sys_reg.h"
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#include "hw_reg_api.h"
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#include "os_types.h"
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#include "os_mem_api.h"
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#include "plc_protocol.h"
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#include "iot_config_api.h"
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#include "iot_io_api.h"
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#include "mac_zc_hw.h"
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#include "gpio_mtx_reg.h"
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#include "gpio_mtx.h"
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#include "hw_zc_cmn.h"
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void mac_zc_hw_logic_sel(uint8_t chip_hw_logic_id)
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{
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(void)chip_hw_logic_id;
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}
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/* WAR: sw trigger gen cap for reset */
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void mac_zc_hw_capx_reset_trig(uint8_t signal_id, uint8_t cap_edge)
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{
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#if (HW_PLATFORM >= HW_PLATFORM_FPGA) //gpio drive not check simulator
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uint32_t cap_depth;
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/* backup reg setting */
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cap_depth = mac_zc_hw_cap_get_watermark();
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/* set zc int num 0 for zc save ptr reset */
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mac_zc_hw_cap_set_watermark(0);
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uint32_t reg = CFG_SIG0_IN_CFG_ADDR + (signal_id << 2);
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if (MAC_ZC_HW_CAP_EDGE_RISE == cap_edge) {
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/* set signal input: low -> high to reset cap */
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gpio_mtx_sig_in_set_def(reg, MTX_HW_SIG_SEL_INPUT_LOW);
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gpio_mtx_sig_in_set_def(reg, MTX_HW_SIG_SEL_INPUT_HIGH);
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} else {
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/* set signal input: high -> low to reset cap */
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gpio_mtx_sig_in_set_def(reg, MTX_HW_SIG_SEL_INPUT_HIGH);
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gpio_mtx_sig_in_set_def(reg, MTX_HW_SIG_SEL_INPUT_LOW);
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}
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gpio_mtx_sig_in_set_def(reg, MTX_HW_SIG_SEL_INPUT_ZC);
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/* restore mac zc int num config */
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mac_zc_hw_cap_set_watermark((uint8_t)cap_depth);
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#else
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(void)signal_id;
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(void)cap_edge;
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#endif
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}
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uint32_t mac_zc_hw_get_cap_data(uint32_t *buf, uint8_t cap_id, uint32_t buf_sz)
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{
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#if (HW_PLATFORM >= HW_PLATFORM_FPGA)
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IOT_ASSERT(buf && cap_id < MAC_ZC_HW_CAP_CNT && buf_sz > 0);
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os_mem_cpy(buf, mac_zc_hw_get_ts_base_addr(cap_id), buf_sz);
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return buf_sz;
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#else
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(void)buf;
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(void)cap_id;
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(void)buf_sz;
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return 0;
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#endif
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}
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/* init zc hw */
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void mac_zc_hw_init(uint8_t is_half_collect, uint8_t cap_edge)
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{
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/* choose use KL1's zc block */
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mac_zc_hw_logic_sel(MAC_ZC_HW_LOGIC_KL1);
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/* set mac zc hw capture period: half or full period capture */
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mac_zc_hw_cap_set_period(is_half_collect);
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/* set mac zc hw capture edge: rise or fall edge capture */
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mac_zc_hw_cap_set_edge(cap_edge);
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/* set mac zc hw N+1 period interval capture zc timestamp */
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/* set 0 to let sample every period (0+1=1) */
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mac_zc_hw_cap_set_interval(0);
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/* set mac zc hw N+1 cnt capture generate interrupt */
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mac_zc_hw_cap_set_watermark(MAC_ZC_HW_INT_NUM_MAX);
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/* set mac zc hw gen offset. not offset */
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mac_zc_hw_gen_set_offset(0, MAC_ZC_HW_GEN_OFFSET_RIGHT);
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/* set mac zc hw ctrl vibrate protect duration ntb */
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mac_zc_hw_set_vibrate_protect_dur(MAC_ZC_HW_VIBRATE_PROTECT_NTB);
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/* set mac zc hw cap0 input select mtx: detect0 */
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mac_zc_hw_gen_set_phase_sel_mtx(MAC_ZC_HW_DETECT0);
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/* set mac zc hw gen period: half or full period */
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mac_zc_hw_gen_set_ctrl_period(is_half_collect);
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/* set mac zc hw gen duration */
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mac_zc_hw_gen_set_ctrl_dur(MAC_ZC_HW_GEN_BOUND_DUR_NTB);
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}
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