413 lines
11 KiB
C
413 lines
11 KiB
C
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/****************************************************************************
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Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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be copied by any method or incorporated into another program without
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the express written consent of Aerospace C.Power. This Information or any portion
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thereof remains the property of Aerospace C.Power. The Information contained herein
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is believed to be accurate and Aerospace C.Power assumes no responsibility or
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liability for its use in any way and conveys no license or title under
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any patent or copyright and makes no representation or warranty that this
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Information is free from patent or copyright infringement.
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****************************************************************************/
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/* os shim includes */
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#include "iot_config.h"
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#include "os_types.h"
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/* plc public api includes */
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#include "plc_fr.h"
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#include "plc_const.h"
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#include "iot_bitops.h"
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/* driver includes */
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#include "iot_irq.h"
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/* mac module internal includes */
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#include "mac.h"
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#include "mac_dsr.h"
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#include "mac_rf_isr.h"
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#include "mac_reset.h"
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#include "mac_pdev.h"
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#if HW_PLATFORM != HW_PLATFORM_SIMU
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#include "rfplc_reg_base.h"
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#include "hw_reg_api.h"
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#include "mac_sys_reg.h"
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#include "rf_mac_reg.h"
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#include "mac_int.h"
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#include "mac_rf_common_hw.h"
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#include "mac_rf_timer.h"
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#include "mac_rf_sched_hw.h"
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#endif
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#if (HW_PLATFORM == HW_PLATFORM_SIMU || HPLC_RF_DEV_SUPPORT == 0)
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void mac_rf_hw_isr_enable(uint8_t id)
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{
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(void)id;
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}
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void mac_rf_sw_isr_enable(uint8_t id)
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{
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(void)id;
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}
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void mac_rf_hw_isr_disable(uint8_t id)
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{
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(void)id;
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}
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void mac_rf_sw_isr_disable(uint8_t id)
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{
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(void)id;
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}
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void mac_rf_set_sw_irq_to_bbcpu(uint8_t id)
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{
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(void)id;
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}
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void mac_rf_isr_start()
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{
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}
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void mac_rf_dsr_isr_start()
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{
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}
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dsr_notification_func_t mac_rf_get_dsr_callback()
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{
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return NULL;
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}
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void mac_rf_isr_init(dsr_notification_func_t callback)
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{
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(void)callback;
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}
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#else /* HW_PLATFORM == HW_PLATFORM_SIMU */
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/* global mac isr context */
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rf_mac_isr_ctx_t g_rf_mac_isr_0;
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rf_mac_isr_ctx_t *p_rf_mac_isr_0 = &g_rf_mac_isr_0;
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uint8_t IRAM_ATTR mac_rf_isr_get_dsr_id(uint32_t isr_id)
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{
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uint32_t dsr_id = MAC_DSR_MAX_ID;
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if (isr_id == RF_MAC_SW_ISR_TX_MPDU_COMPLETE) {
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dsr_id = MAC_DSR_MPDU_TX_COMP_ID;
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} else if (isr_id == RF_MAC_SW_ISR_RX_MPDU_COMPLETE) {
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dsr_id = MAC_DSR_MPDU_RX_ID;
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}
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return dsr_id;
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}
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uint32_t IRAM_ATTR mac_rf_get_hw_interrupt_sts()
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{
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return RF_MAC_READ_REG(CFG_RF_MAC_COMMON_INT_REG_6_ADDR);
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}
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void IRAM_ATTR mac_rf_clear_hw_interrupt(uint32_t irq_sts)
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{
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_4_ADDR, irq_sts);
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}
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static uint32_t IRAM_ATTR mac_rf_get_sw_interrupt_sts()
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{
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return RF_MAC_READ_REG(CFG_RF_MAC_COMMON_INT_REG_26_ADDR);
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}
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static void IRAM_ATTR mac_rf_clear_sw_interrupt(uint32_t irq_sts)
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{
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_24_ADDR, irq_sts);
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}
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/* get share intrrupt status, sw interrupt */
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uint32_t mac_rf_get_share_interrupt_sts()
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{
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return RF_MAC_READ_REG(CFG_RF_MAC_COMMON_INT_REG_16_ADDR);
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}
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/* clear common intrrupt status, sw interrupt */
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void mac_rf_clear_share_interrupt(uint32_t irq_sts)
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{
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_14_ADDR, irq_sts);
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}
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static void IRAM_ATTR mac_rf_dsr_isr_stop()
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{
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/* disable soc irq */
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iot_interrupt_mask(p_rf_mac_isr_0->isr_hw_h);
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iot_interrupt_mask(p_rf_mac_isr_0->isr_sw_h);
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}
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static uint32_t IRAM_ATTR mac_rf_isr_handler(uint32_t vector,
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iot_addrword_t data)
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{
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uint8_t i, j, tmp;
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uint32_t sw_int_sts, hw_int_sts;
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uint8_t dsr[32], cnt;
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(void)vector;
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(void)data;
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/* get sw interrupt status */
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sw_int_sts = mac_rf_get_sw_interrupt_sts();
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mac_rf_clear_sw_interrupt(sw_int_sts);
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/* get hw interrupt status */
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hw_int_sts = mac_rf_get_hw_interrupt_sts();
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mac_rf_clear_hw_interrupt(hw_int_sts);
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/* sw isr handle */
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i = 0;
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cnt = 0;
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while (sw_int_sts) {
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tmp = sw_int_sts & 0xFF;
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while (tmp) {
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j = iot_bitops_fls(tmp) - 1;
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tmp &= ~(0x1 << j);
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dsr[cnt] = mac_rf_isr_get_dsr_id(i + j);
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cnt++;
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}
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sw_int_sts >>= 8;
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i += 8;
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}
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if (cnt) {
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dsr[cnt] = MAC_RF_DSR_ISR_SYNC_ID;
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cnt++;
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p_rf_mac_isr_0->rf_dsr_callback(dsr, cnt);
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mac_rf_dsr_isr_stop();
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}
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return 0;
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}
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static uint32_t IRAM_ATTR mac_rf_timer_isr_handler(uint32_t vector,
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iot_addrword_t data)
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{
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uint32_t timer_int_sts, cmdlist_id;
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(void)vector;
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(void)data;
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/* get timer interrupt status */
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timer_int_sts = mac_rf_timer_get_timeout_ids();
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mac_rf_timer_clr_timeout_ids(timer_int_sts);
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cmdlist_id = RF_MAC_SW_ISR_CMDLIST_BBCPU_DONE - RF_MAC_SW_INT_MAX;
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/* handle cmdlist cpu done */
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if (timer_int_sts & (1 << cmdlist_id)) {
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/* clear sw int status */
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timer_int_sts &= ~(1 << cmdlist_id);
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mac_rf_handle_cmdlist_done();
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}
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#if HPLC_RF_ASYNC_TX
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uint32_t set_pcs_id = RF_MAC_SW_ISR_SET_HPLC_PCS - RF_MAC_SW_INT_MAX;
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/* handle set hplc to pcs */
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if (timer_int_sts & (1 << set_pcs_id)) {
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/* clear sw int status */
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timer_int_sts &= ~(1 << set_pcs_id);
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/* get hplc pcs status */
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if (mac_rf_get_hplc_pcs_reg()) {
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/* set pcs busy */
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mac_set_pcs_busy_from_isr(1, 1);
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/* set pcs status */
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mac_rf_set_hplc_pcs_sts_reg(1);
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} else {
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/* free pcs busy */
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mac_set_pcs_busy_from_isr(0, 0);
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}
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}
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#endif
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return 0;
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}
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static void mac_rf_hw_isr_reset(void)
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{
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/* disable all mac interrupt */
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p_rf_mac_isr_0->isr_hw_mask = 0;
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_8_ADDR,
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p_rf_mac_isr_0->isr_hw_mask);
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_0_ADDR,
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p_rf_mac_isr_0->isr_hw_mask);
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/* clean up all pending interrupt */
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_4_ADDR,
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RF_MAC_COMMON_IRQ_SW_CLR_CPU1_MASK);
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}
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static void mac_rf_sw_isr_reset(void)
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{
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/* sw interrupt */
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/* disable all mac interrupt */
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p_rf_mac_isr_0->isr_sw_mask = 0;
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_28_ADDR,
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p_rf_mac_isr_0->isr_sw_mask);
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_20_ADDR,
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p_rf_mac_isr_0->isr_sw_mask);
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/* clean up all pending interrupt */
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_24_ADDR,
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RF_MAC_COM_SHARE_IRQ_SW_CLR_CPU1_MASK);
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/* timer interrupt */
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p_rf_mac_isr_0->isr_timer_mask = 0;
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mac_rf_timer_disable_all();
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}
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static void mac_rf_share_isr_reset(void)
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{
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/* disable all mac interrupt */
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_18_ADDR, 0);
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_10_ADDR, 0);
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/* clean up all pending interrupt */
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_14_ADDR,
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RF_MAC_COMMON_SHARE_IRQ_SW_CLR_CPU1_MASK);
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}
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static void mac_rf_share_isr_enable_all(void)
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{
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/* enable all mac interrupt */
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_18_ADDR,
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RF_MAC_COMMON_SHARE_IRQ_MASK_CPU1_MASK);
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_10_ADDR,
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RF_MAC_COMMON_SHARE_IRQ_SW_EN_CPU1_MASK);
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}
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void mac_rf_hw_isr_enable(uint8_t id)
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{
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uint32_t int_mask;
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int_mask = 1 << id;
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if (!(p_rf_mac_isr_0->isr_hw_mask & int_mask)) {
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p_rf_mac_isr_0->isr_hw_mask |= int_mask;
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_8_ADDR,
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p_rf_mac_isr_0->isr_hw_mask);
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_0_ADDR,
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p_rf_mac_isr_0->isr_hw_mask);
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}
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}
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void mac_rf_sw_isr_enable(uint8_t id)
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{
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uint32_t int_mask;
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if (id < RF_MAC_SW_INT_MAX) {
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int_mask = 1 << id;
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if (!(p_rf_mac_isr_0->isr_sw_mask & int_mask)) {
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p_rf_mac_isr_0->isr_sw_mask |= int_mask;
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_28_ADDR,
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p_rf_mac_isr_0->isr_sw_mask);
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_20_ADDR,
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p_rf_mac_isr_0->isr_sw_mask);
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}
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} else {
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IOT_ASSERT(id < RF_MAC_SW2_INT_MAX);
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int_mask = 1 << (id - RF_MAC_SW_INT_MAX);
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if (!(p_rf_mac_isr_0->isr_timer_mask & int_mask)) {
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p_rf_mac_isr_0->isr_timer_mask |= int_mask;
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mac_rf_timer_enable(p_rf_mac_isr_0->isr_timer_mask);
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}
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}
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}
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void mac_rf_hw_isr_disable(uint8_t id)
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{
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uint32_t int_mask;
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int_mask = 1 << id;
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if (p_rf_mac_isr_0->isr_hw_mask & int_mask) {
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p_rf_mac_isr_0->isr_hw_mask &= ~int_mask;
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_8_ADDR,
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p_rf_mac_isr_0->isr_hw_mask);
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_0_ADDR,
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p_rf_mac_isr_0->isr_hw_mask);
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}
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}
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void mac_rf_sw_isr_disable(uint8_t id)
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{
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uint32_t int_mask;
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if (id < RF_MAC_SW_INT_MAX) {
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int_mask = 1 << id;
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if (p_rf_mac_isr_0->isr_sw_mask & int_mask) {
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p_rf_mac_isr_0->isr_sw_mask &= ~int_mask;
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_28_ADDR,
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p_rf_mac_isr_0->isr_sw_mask);
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RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_20_ADDR,
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p_rf_mac_isr_0->isr_sw_mask);
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||
|
|
}
|
||
|
|
} else {
|
||
|
|
IOT_ASSERT(id < RF_MAC_SW2_INT_MAX);
|
||
|
|
int_mask = 1 << (id - RF_MAC_SW_INT_MAX);
|
||
|
|
if (p_rf_mac_isr_0->isr_timer_mask & int_mask) {
|
||
|
|
p_rf_mac_isr_0->isr_timer_mask &= ~int_mask;
|
||
|
|
mac_rf_timer_enable(p_rf_mac_isr_0->isr_timer_mask);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void mac_rf_set_sw_irq_to_bbcpu(uint8_t id)
|
||
|
|
{
|
||
|
|
IOT_ASSERT(id < RF_MAC_SW_INT_MAX);
|
||
|
|
RF_MAC_WRITE_REG(CFG_RF_MAC_COMMON_INT_REG_23_ADDR, (1 << id));
|
||
|
|
}
|
||
|
|
|
||
|
|
void mac_rf_dsr_isr_start()
|
||
|
|
{
|
||
|
|
/* enable soc irq */
|
||
|
|
iot_interrupt_unmask(p_rf_mac_isr_0->isr_hw_h);
|
||
|
|
iot_interrupt_unmask(p_rf_mac_isr_0->isr_sw_h);
|
||
|
|
}
|
||
|
|
|
||
|
|
void mac_rf_isr_start()
|
||
|
|
{
|
||
|
|
/* enable soc irq */
|
||
|
|
iot_interrupt_unmask(p_rf_mac_isr_0->isr_hw_h);
|
||
|
|
iot_interrupt_unmask(p_rf_mac_isr_0->isr_sw_h);
|
||
|
|
iot_interrupt_unmask(p_rf_mac_isr_0->isr_timer_h);
|
||
|
|
}
|
||
|
|
|
||
|
|
dsr_notification_func_t mac_rf_get_dsr_callback()
|
||
|
|
{
|
||
|
|
return p_rf_mac_isr_0->rf_dsr_callback;
|
||
|
|
}
|
||
|
|
|
||
|
|
void mac_rf_isr_init(dsr_notification_func_t callback)
|
||
|
|
{
|
||
|
|
os_mem_set(p_rf_mac_isr_0, 0, sizeof(*p_rf_mac_isr_0));
|
||
|
|
|
||
|
|
p_rf_mac_isr_0->rf_dsr_callback = callback;
|
||
|
|
|
||
|
|
mac_rf_hw_isr_reset();
|
||
|
|
mac_rf_sw_isr_reset();
|
||
|
|
mac_rf_share_isr_reset();
|
||
|
|
/* enable all share int */
|
||
|
|
mac_rf_share_isr_enable_all();
|
||
|
|
|
||
|
|
/* allocate soc irq resource */
|
||
|
|
p_rf_mac_isr_0->isr_hw_h = iot_interrupt_create(HAL_VECTOR_RFMAC_INT0,
|
||
|
|
HAL_INTR_PRI_7, (iot_addrword_t)NULL, mac_rf_isr_handler);
|
||
|
|
p_rf_mac_isr_0->isr_sw_h = iot_interrupt_create(HAL_VECTOR_RFMAC_INT0,
|
||
|
|
HAL_INTR_PRI_7, (iot_addrword_t)NULL, mac_rf_isr_handler);
|
||
|
|
|
||
|
|
/* attach soc irq resource */
|
||
|
|
iot_interrupt_attach(p_rf_mac_isr_0->isr_hw_h);
|
||
|
|
iot_interrupt_attach(p_rf_mac_isr_0->isr_sw_h);
|
||
|
|
|
||
|
|
/* timer irq need isr handle */
|
||
|
|
p_rf_mac_isr_0->isr_timer_h =
|
||
|
|
iot_interrupt_create(HAL_VECTOR_RFMAC_TIMEOUT_INT0, HAL_INTR_PRI_6,
|
||
|
|
(iot_addrword_t)NULL, mac_rf_timer_isr_handler);
|
||
|
|
|
||
|
|
iot_interrupt_attach(p_rf_mac_isr_0->isr_timer_h);
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif /* HW_PLATFORM == HW_PLATFORM_SIMU */
|