84 lines
2.5 KiB
C
84 lines
2.5 KiB
C
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/****************************************************************************
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Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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be copied by any method or incorporated into another program without
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the express written consent of Aerospace C.Power. This Information or any portion
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thereof remains the property of Aerospace C.Power. The Information contained herein
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is believed to be accurate and Aerospace C.Power assumes no responsibility or
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liability for its use in any way and conveys no license or title under
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any patent or copyright and makes no representation or warranty that this
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Information is free from patent or copyright infringement.
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****************************************************************************/
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#ifndef HW_DESC_H
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#define HW_DESC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define DESC_TYPE_TX_MPDU_START 0
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#define DESC_TYPE_TX_MSDU_START 1
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#define DESC_TYPE_TX_STREAM_START 2
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#define DESC_TYPE_TX_DUMMY 3
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#define HW_DESC_TX_PORT_PLC 0
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#define HW_DESC_TX_PORT_EOC 1
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#define HW_DESC_TX_PORT_WIRELESS 2
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#define HW_DESC_TX_PB_MOD_BPSK 0
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#define HW_DESC_TX_PB_MOD_QPSK 1
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#define HW_DESC_TX_PB_MOD_16QAM 2
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/*
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* PHASE DESC used for HW MAC/BB TX/RX
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*/
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#define HW_DESC_PHASE_A 0
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#define HW_DESC_PHASE_B 1
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#define HW_DESC_PHASE_C 2
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#define HW_DESC_PHASE_RESV 3
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#define HW_DESC_PHASE_ALL HW_DESC_PHASE_RESV
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#define HW_DESC_TX_PHASE_ALL HW_DESC_PHASE_RESV
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#define HW_DESC_TX_PHASE_A HW_DESC_PHASE_A
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#define HW_DESC_TX_PHASE_B HW_DESC_PHASE_B
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#define HW_DESC_TX_PHASE_C HW_DESC_PHASE_C
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#define PLC_PHASE_TO_HW_PHASE(_plc_phase) (_plc_phase)
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//((_plc_phase) == PLC_PHASE_ALL)?HW_DESC_PHASE_RESV:((_plc_phase) - 1)
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/* rate mode related
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*/
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#define HW_DESC_RATE_MODE_SR 0
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#define HW_DESC_RATE_MODE_QR 1
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#define HW_DESC_RATE_MODE_XR 2
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#define HW_DESC_RATE_MODE_RV 3
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/* PB related
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*/
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#define HW_DESC_PB_SIZE_520 0
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#define HW_DESC_PB_SIZE_264 1
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#define HW_DESC_PB_SIZE_136 2
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#define HW_DESC_PB_SIZE_72 3
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#define HW_DESC_PB_SIZE_16 4
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/* GP PPDU mode
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*/
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#define HW_DESC_PPDU_MODE_HYBRID_1FCSYM 0
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#define HW_DESC_PPDU_MODE_HYBRID_2FCSYM 1
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#define HW_DESC_PPDU_MODE_AVONLY_1FCSYM 2
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#define HW_DESC_PPDU_MODE_AVONLY_2FCSYM 3
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#ifdef __cplusplus
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}
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#endif
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#endif // !HW_DESC_H
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