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kunlun/dtest/bee_i2c_test/bee_i2c_test.c

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2024-09-28 14:24:04 +08:00
/****************************************************************************
*
* Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
*
* This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics Ltd and MAY NOT
* be copied by any method or incorporated into another program without
* the express written consent of Aerospace C.Power. This Information or any portion
* thereof remains the property of Aerospace C.Power. The Information contained herein
* is believed to be accurate and Aerospace C.Power assumes no responsibility or
* liability for its use in any way and conveys no license or title under
* any patent or copyright and makes no representation or warranty that this
* Information is free from patent or copyright infringement.
*
* ****************************************************************************/
/* os shim includes */
#include "os_types.h"
#include "os_task.h"
#include "os_utils.h"
#include "iot_errno_api.h"
/* common includes */
#include "iot_io.h"
#include "iot_bitops.h"
#include "iot_config.h"
/* driver includes */
#include "iot_clock.h"
#include "iot_uart.h"
#include "iot_i2c_api.h"
#include "iot_gpio_api.h"
#include "i2c_hw.h"
/* cli includes */
#include "iot_cli.h"
#include "iot_uart_h.h"
/* debug includes*/
#include "dbg_io.h"
#include "hw_reg_api.h"
#include "gpio_mtx.h"
#include "i2c_reg.h"
extern void nfc_write_access_write(uint8_t cmd, uint8_t addr, uint8_t val);
extern uint8_t nfc_write_access_read();
#define I2C_S_READ (1 << 0)
#define I2C_S_WRITE (1 << 1)
#define I2C_S_FILE (1 << 2)
#define I2C_S_ALL (I2C_S_READ | I2C_S_WRITE)
#define TEST_CASE I2C_S_ALL //(I2C_S_FILE)
os_task_h test_init_handle;
extern int platform_init();
uint8_t test_dev_addr = 0x28;//0x50;//0x1b;
uint8_t i2c_test_data[] = {0x18, 0x57, 0x16};
iot_i2c_module_cfg_t g_cfg = {0};
/********************ctrl external ADC************************/
//-----------------------------------
#define CFG_BT_SPI_EN_ADDR 0x0000
#define SW_AFC_WRITE_DONE_OFFSET 5
#define SW_AFC_WRITE_DONE_MASK 0x00000020
#define SW_ADDA_WRITE_DONE_OFFSET 4
#define SW_ADDA_WRITE_DONE_MASK 0x00000010
#define SW_RF_WRITE_DONE_OFFSET 3
#define SW_RF_WRITE_DONE_MASK 0x00000008
#define SW_AFC_WRITE_START_OFFSET 2
#define SW_AFC_WRITE_START_MASK 0x00000004
#define SW_ADDA_WRITE_START_OFFSET 1
#define SW_ADDA_WRITE_START_MASK 0x00000002
#define SW_RF_WRITE_START_OFFSET 0
#define SW_RF_WRITE_START_MASK 0x00000001
#define CFG_BT_WRITE_ADDA_SPI_DATA_ADDR 0x0008
#define SW_ADDA_SPI_DATA_OFFSET 0
#define SW_ADDA_SPI_DATA_MASK 0xFFFFFFFF
#define APB_ANA_READ_REG(addr) SOC_READ_REG(0x03400000 + addr)
#define APB_ANA_WRITE_REG(addr,value) SOC_WRITE_REG(0x03400000 + addr,value)
void write_rf_ad_spi(uint32_t adress, uint32_t data)
{
uint32_t regv;
uint32_t tmp;
uint32_t spi_read;
regv = (adress<<8)|data;
APB_ANA_WRITE_REG(CFG_BT_WRITE_ADDA_SPI_DATA_ADDR,regv);
tmp = APB_ANA_READ_REG(CFG_BT_SPI_EN_ADDR);
REG_FIELD_SET(SW_ADDA_WRITE_START,tmp,1);
APB_ANA_WRITE_REG(CFG_BT_SPI_EN_ADDR,tmp);
spi_read = APB_ANA_READ_REG(CFG_BT_SPI_EN_ADDR);
spi_read = spi_read&SW_ADDA_WRITE_DONE_MASK;
while(spi_read != SW_ADDA_WRITE_DONE_MASK)
{
spi_read = APB_ANA_READ_REG(CFG_BT_SPI_EN_ADDR);
spi_read = spi_read&SW_ADDA_WRITE_DONE_MASK;
}
}
void DAC_change_ad()
{
write_rf_ad_spi(0x14,2);
iot_delay_us(30);
}
void DAC_change_da()
{
write_rf_ad_spi(0x14,0xa);
iot_delay_us(30);
}
void DAC_init()
{
uint32_t r=0;
r |= iot_gpio_open_as_output(50); //44
r |= iot_gpio_open_as_output(51); //46
r |= iot_gpio_open_as_output(49); //39
r |= iot_gpio_value_set(50, 0);//50 44
r |= iot_gpio_value_set(51, 0);//51 46
r |= iot_gpio_value_set(49, 1); //49 39
iot_delay_us(10000);
r |= iot_gpio_value_set(49, 0); //49 39
iot_delay_us(10000);
r |= iot_gpio_value_set(49, 1); //49 39
iot_delay_us(10000);
write_rf_ad_spi(1,0);
iot_delay_us(30);
write_rf_ad_spi(0x14,0xa);
iot_delay_us(30);
write_rf_ad_spi(0x13,0x0);
iot_delay_us(30);
write_rf_ad_spi(0x10,0x40);
iot_delay_us(30);
write_rf_ad_spi(0xd, 0x40);
iot_delay_us(30);
DAC_change_ad();
iot_printf("\nDAC inited!!\n");
SOC_WRITE_REG(0x05d80108,0x3);
}
/********************************************/
int gpio_rst_test(uint8_t gpio)
{
uint8_t r = ERR_FAIL;
r = iot_gpio_open_as_output(gpio);
if(r != 0)
{
iot_printf("\ngpio_set_direction failed!\n");
}
if (0 != iot_gpio_value_set(gpio, 1)) {
iot_printf("\n WRITE 1 FAILED\n");
r = ERR_FAIL;
} else {
os_delay(1000);
if (0 != iot_gpio_value_set(gpio, 0)) {
iot_printf("\n WRITE 0 FAILED\n");
r = ERR_FAIL;
} else {
r = ERR_OK;
}
os_delay(1000);
if (0 != iot_gpio_value_set(gpio, 1)) {
iot_printf("\n WRITE 1 FAILED\n");
r = ERR_FAIL;
} else {
r = ERR_OK;
}
}
// iot_gpio_close(gpio);
return r;
}
int i2c_write_command(uint8_t addr, uint8_t reg1, uint8_t reg2, uint8_t val)
{
uint8_t ret = 0;
char buf[4] = {0};
buf[0] = reg1;
buf[1] = reg2;
buf[2] = val;
ret = iot_i2c_write(g_cfg.port, addr, buf, 3);
os_delay(10);
// todo : receive buffer from rdata fifo
return ret;
}
int i2c_write_file(uint8_t addr, uint8_t reg, uint8_t *data, uint8_t len)
{
uint8_t ret = 0;
char buf[33] = {0};
buf[0] = reg;
os_mem_cpy(buf+1, data, len);
ret = iot_i2c_write(g_cfg.port, addr, buf, len+1);
os_delay(10);
// todo : receive buffer from rdata fifo
return ret;
}
int i2c_read_file(uint8_t addr, uint8_t reg, uint8_t *data, uint8_t len)
{
uint8_t ret = 0;
char buf[33] = {0};
buf[0] = reg;
ret = iot_i2c_write(g_cfg.port, addr, buf, 1);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
return ret;
}
os_delay(10);
ret = iot_i2c_read(g_cfg.port, addr, (char *)data, len);
//if slave wdata fifo is not empty, the master will receive nak at the end
if (ret) {
iot_printf("i2c_read_command get value error\n");
return ret;
}
return ret;
}
int i2c_read_command(uint8_t addr, uint16_t reg, uint8_t *data, uint8_t len)
{
uint8_t ret = 0;
char buf[4] = {0};
buf[0] = reg >> 8;
buf[1] = reg & 0xff;
ret = iot_i2c_write(g_cfg.port, addr, buf, 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
return ret;
}
// todo : if write match write pattern, put buffer info wdata fifo
os_delay(10);
ret = iot_i2c_read(g_cfg.port, addr, (char *)data, len);
//if slave wdata fifo is not empty, the master will receive nak at the end
if (ret) {
iot_printf("i2c_read_command get value error\n");
return ret;
}
return ret;
}
/**************************************************************************************
* RC522 Command
**************************************************************************************/
#define PCD_IDLE (0x00) // ȡ<><C8A1><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>
#define PCD_AUTHENT (0x0E) // <20><>֤<EFBFBD><D6A4>Կ
#define PCD_RECEIVE (0x08) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define PCD_TRANSMIT (0x04) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define PCD_TRANSCEIVE (0x0C) // <20><><EFBFBD>Ͳ<EFBFBD><CDB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define PCD_RESETPHASE (0x0F) // <20><>λ
#define PCD_CALCCRC (0x03) // CRC<52><43><EFBFBD><EFBFBD>
/**************************************************************************************
* Mifare One Card Command
**************************************************************************************/
#define PICC_REQIDL (0x26) // Ѱ<><D1B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
#define PICC_REQALL (0x52) // Ѱ<><D1B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD>
#define PICC_ANTICOLL1 (0x93) // <20><><EFBFBD><EFBFBD>ײ
#define PICC_ANTICOLL2 (0x95) // <20><><EFBFBD><EFBFBD>ײ
#define PICC_AUTHENT1A (0x60) // <20><>֤A<D6A4><41>Կ
#define PICC_AUTHENT1B (0x61) // <20><>֤B<D6A4><42>Կ
#define PICC_READ (0x30) // <20><><EFBFBD><EFBFBD>
#define PICC_WRITE (0xA0) // д<><D0B4>
#define PICC_DECREMENT (0xC0) // <20>ۿ<EFBFBD>
#define PICC_INCREMENT (0xC1) // <20><>ֵ
#define PICC_RESTORE (0xC2) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD><DDB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define PICC_TRANSFER (0xB0) // <20><><EFBFBD>滺<EFBFBD><E6BBBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define PICC_HALT (0x50) // <20><><EFBFBD><EFBFBD>
/**************************************************************************************
* Register Definition
**************************************************************************************/
// PAGE 0
#define RFU00 (0x00)
#define CommandReg (0x01)
#define ComIEnReg (0x02)
#define DivlEnReg (0x03)
#define ComIrqReg (0x04)
#define DivIrqReg (0x05)
#define ErrorReg (0x06)
#define Status1Reg (0x07)
#define Status2Reg (0x08)
#define FIFODataReg (0x09)
#define FIFOLevelReg (0x0A)
#define WaterLevelReg (0x0B)
#define ControlReg (0x0C)
#define BitFramingReg (0x0D)
#define CollReg (0x0E)
#define RFU0F (0x0F)
// PAGE 1
#define RFU10 (0x10)
#define ModeReg (0x11)
#define TxModeReg (0x12)
#define RxModeReg (0x13)
#define TxControlReg (0x14)
#define TxASKReg (0x15)
#define TxSelReg (0x16)
#define RxSelReg (0x17)
#define RxThresholdReg (0x18)
#define DemodReg (0x19)
#define RFU1A (0x1A)
#define RFU1B (0x1B)
#define MifareReg (0x1C)
#define RFU1D (0x1D)
#define TypeBReg (0x1E)
#define SerialSpeedReg (0x1F)
// PAGE 2
#define RFU20 (0x20)
#define CRCResultRegM (0x21)
#define CRCResultRegL (0x22)
#define RFU23 (0x23)
#define ModWidthReg (0x24)
#define RFU25 (0x25)
#define RFCfgReg (0x26)
#define GsNReg (0x27)
#define CWGsPReg (0x28)
#define ModGsPReg (0x29)
#define TModeReg (0x2A)
#define TPrescalerReg (0x2B)
#define TReloadRegH (0x2C)
#define TReloadRegL (0x2D)
#define TCounterValueRegH (0x2E)
#define TCounterValueRegL (0x2F)
// PAGE 3
#define RFU30 (0x30)
#define TestSel1Reg (0x31)
#define TestSel2Reg (0x32)
#define TestPinEnReg (0x33)
#define TestPinValueReg (0x34)
#define TestBusReg (0x35)
#define AutoTestReg (0x36)
#define VersionReg (0x37)
#define AnalogTestReg (0x38)
#define TestDAC1Reg (0x39)
#define TestDAC2Reg (0x3A)
#define TestADCReg (0x3B)
#define RFU3C (0x3C)
#define RFU3D (0x3D)
#define RFU3E (0x3E)
#define RFU3F (0x3F)
#define RC_ISO14443_A 0
#define RC_ISO14443_B 1
static uint8_t ReadReg(uint8_t addr)
{
uint8_t ret;
char buff[64]= {0};
char value;
value=addr;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
if (ret) {
iot_printf("i2c_read_command write addr errori 22222\n");
// return ret;
}
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
//if slave wdata fifo is not empty, the master will receive nak at the end
if (ret) {
iot_printf("i2c_read_command get value error\n");
// return ret;
}
os_delay(5);
return buff[0];
//return (uint8_t)(0xff & nfc_write_access_read(addr));
}
static void WriteReg(uint8_t addr,uint8_t v)
{
uint8_t ret;
i2c_test_data[0]=addr;
i2c_test_data[1]=v;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
}
nfc_write_access_write(0, addr, v);
os_delay(5);
}
static void ClearBitMask(uint8_t addr,uint8_t v)
{
WriteReg(addr,ReadReg(addr) & (~v));
}
static void SetBitMask(uint8_t addr,uint8_t v)
{
WriteReg(addr,ReadReg(addr) | v);
}
void DUMP_532()
{/*
int i;
for(i=1;i<0x3b;i++)
{
iot_printf("REG-1:%02X,val:%02X %X\r\n",i,ReadReg(i), nfc_write_access_read(i));
}
*/
}
static uint8_t RC_PcdCmd(uint8_t cmd, uint8_t *pIn, uint8_t inLen, uint8_t *pOut, uint8_t *pOutLen)
{
uint8_t status = 0;
uint8_t irqEn = 0x00;
//uint8_t waitFor = 0x00;
uint8_t lastBits;
uint8_t n;
uint32_t i;
switch (cmd)
{
case PCD_AUTHENT :
irqEn = 0x12;
// waitFor = 0x10;
break;
case PCD_TRANSCEIVE:
irqEn = 0x20;//0x77
//waitFor = 0x30;
break;
default: break;
}
iot_printf("\n fir ComIrqReg:0x%x\r\n", ReadReg(ComIrqReg));
WriteReg(ComIEnReg, irqEn | 0x80);
ClearBitMask(ComIrqReg, 0x80);
// WriteReg(CommandReg, PCD_IDLE);
SetBitMask(FIFOLevelReg, 0x80);
for (i=0; i<inLen; i++)
{
WriteReg(FIFODataReg, pIn[i]);
}
WriteReg(CommandReg, cmd);
iot_printf("mid ComIrqReg:0x%x\r\n", ReadReg(ComIrqReg));
DUMP_532();
if (cmd == PCD_TRANSCEIVE)
{
SetBitMask(BitFramingReg,0x80);
}
i = 2000;
i=10; // <20><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>Ƶ<EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>M1<4D><31><EFBFBD><EFBFBD><EFBFBD>ȴ<EFBFBD>ʱ<EFBFBD><CAB1>25ms
do
{
n = ReadReg(ComIrqReg);
iot_printf("%d ComIrqReg:0x%x\r\n", i, n);
i--;
os_delay(5);
} while((i>0) && ((n & 0x60)!=0x60));//while ((i!=0) && !(n&0x01) && !(n&waitFor));
ClearBitMask(BitFramingReg, 0x80);
/* for(int i = 0 ; i < 0x40 ; i ++)
{
regbuff[i] = ReadReg(i);
}*/
iot_printf("\r\n........AFTER SEND.........\r\n");
DUMP_532();
if (1)//(i != 0)
{
iot_printf("ErrorReg:0x%x\r\n",ReadReg(ErrorReg));
if (!(ReadReg(ErrorReg) & 0x1B))
{
status = 0;
if (n & irqEn & 0x01)
{
status = 1;
}
if (cmd == PCD_TRANSCEIVE)
{
iot_printf("cmd: 0x%x\r\n",cmd);
n = ReadReg(FIFOLevelReg);
iot_printf("FIFO_LEVEL: 0x%x\r\n",n);
lastBits = ReadReg(ControlReg) & 0x07;
iot_printf("lastBits: 0x%x\r\n",lastBits);
*pOutLen = (lastBits) ? ((n-1)*8 + lastBits) : (n*8);
if (n > 18)
{
n = 18;
}
for (i=0; i<n; i++)
{
pOut[i] = ReadReg(FIFODataReg);
iot_printf("Got it!!!!!!0x%x 0x%x\r\n", pOut[i], nfc_write_access_read(FIFODataReg));
}
}
}
else
{
status = 1;
}
}
SetBitMask(ControlReg, 0x80); // stop timer now
WriteReg(CommandReg, PCD_IDLE);
return status;
}
static void RC_Antenna(uint8_t mode)
{
if (mode == 1)
{
SetBitMask(TxControlReg, 0x03); // <20><><EFBFBD>߿<EFBFBD>
}
else
{
ClearBitMask(TxControlReg, 0x03); // <20><><EFBFBD>߹<EFBFBD>
}
}
void RC_PcdISOType(uint8_t type)
{
switch (type)
{
case RC_ISO14443_A:
{
ClearBitMask(Status2Reg, 0x08); //
WriteReg(ModeReg, 0x3D);
WriteReg(TReloadRegL, 30);
WriteReg(TReloadRegH, 0);
WriteReg(TModeReg, 0x8D);
WriteReg(TPrescalerReg, 0x3E);
WriteReg(TxASKReg, 0x40);
// ------------------------- <20><><EFBFBD>Ͳ<EFBFBD><CDB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ------------------------------
// ------------------------- <20><><EFBFBD>ղ<EFBFBD><D5B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ------------------------------
WriteReg(RFCfgReg, 0x7F);
WriteReg(RxSelReg, 0x86);
// ------------------------- <20><><EFBFBD>߿<EFBFBD><DFBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ------------------------------
//RC_Antenna(0);
//RC_DelayMs(1);
RC_Antenna(1);
break;
}
case RC_ISO14443_B:
{
ClearBitMask(Status2Reg, 0x08);
WriteReg(ModeReg, 0x3F); // For 0xFFFF crc
WriteReg(TReloadRegL, 30);
WriteReg(TReloadRegH, 0);
WriteReg(TModeReg, 0x8D);
WriteReg(TPrescalerReg, 0x3E);
WriteReg(TxASKReg, 0); // Force 100ASK = 0
// ------------------------- <20><><EFBFBD>Ͳ<EFBFBD><CDB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ------------------------------
WriteReg(GsNReg, 0xfa);//0xfa // TX<54><58><EFBFBD><EFBFBD>絼<EFBFBD><E7B5BC><EFBFBD><EFBFBD>
WriteReg(CWGsPReg, 0x3F);
WriteReg(ModGsPReg, 0x06);//0x06 //0x2a /*modulate deepth*/
//WriteReg(ModGsPReg, 0x1A); // <20><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>RegModGsp,, TYPEB ModConductance 0x1A
WriteReg(TxModeReg, 0x83); //0x83 // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,106kbps,14443B
WriteReg(BitFramingReg, 0x00); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,0x13->2.95us RegTypeBFraming ,,TYPEB
WriteReg(AutoTestReg, 0x00);
WriteReg(TypeBReg, 0x01);//0xc0
WriteReg(ModWidthReg,0x26); //0x68
// WriteReg(DemodReg, 0x5D);
WriteReg(CollReg, 0xa0);
WriteReg(RFCfgReg, 0x70);//0x48
WriteReg(DivlEnReg, 0x80);
// ------------------------- <20><><EFBFBD>ղ<EFBFBD><D5B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ------------------------------
// <20>Ͷ<EFBFBD>λΪ<CEBB><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>棬
// 00,10,20,30,40,50,60,70
// 18,23,18,23,33,38,43,48dB
//WriteReg(RFCfgReg, 0x78); //0x70
//WriteReg(RFCfgReg, 0x70);// 0x59 RegRxControl1//73,
WriteReg(RxModeReg, 0x83); //0x83 // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,,106kbps,14443B
WriteReg(RxThresholdReg, 0x65);//0x84 //0x75); // <20><><EFBFBD><EFBFBD>λ-><3E><>С<EFBFBD>ź<EFBFBD>ǿ<EFBFBD>ȣ<EFBFBD><C8A3><EFBFBD><EFBFBD><EFBFBD>λ-><3E><>ͻ<EFBFBD><CDBB>С<EFBFBD>ź<EFBFBD>ǿ<EFBFBD><C7BF>,<2C><><EFBFBD>0xF7
WriteReg(WaterLevelReg, 0x10);
// ------------------------- TYPEB<45><42><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>趨 -------------------------
iot_printf("+RxSelReg:0x%x\r\n",ReadReg(RxSelReg));
// ClearBitMask(RxSelReg,0x3F); // TR0
// SetBitMask(RxSelReg, 0x06);
iot_printf("-RxSelReg:0x%x\r\n",ReadReg(RxSelReg));
// ClearBitMask(TxModeReg, 0x80); // <20><>CRC,<2C><><EFBFBD><EFBFBD>żУ<C5BC><D0A3>
// ClearBitMask(RxModeReg, 0x80);
ClearBitMask(Status2Reg, 0x08); // MFCrypto1On =0
WriteReg(AnalogTestReg,0x68);
WriteReg(TestDAC2Reg,0x03);
WriteReg(0x2a,0x80);
WriteReg(0x2b,0x00);
WriteReg(0x2c,0x4f);
WriteReg(0x2d,0x00);
WriteReg(0x32,0x07);
WriteReg(0x33,0x00);
WriteReg(0x35,0x00);
WriteReg(0x36,0x40);
WriteReg(0x37,0x00);
WriteReg(0x38,0x00);
WriteReg(0x39,0x00);
WriteReg(0x3a,0x00);
// SetBitMask(TxSelReg, 0x17);
uint8_t ret;
i2c_test_data[0]=TxSelReg;
i2c_test_data[1]=0x27;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
}
i2c_test_data[0]=RxSelReg;
i2c_test_data[1]=0x86;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
}
nfc_write_access_write(0, TxSelReg, 0x04);
nfc_write_access_write(0, RxSelReg, 0x86);
iot_printf("TxModeReg:0x%x RxModeReg:0x%x Status2Reg:0x%x\r\n",ReadReg(TxModeReg),ReadReg(RxModeReg),ReadReg(Status2Reg));
// ------------------------- <20><><EFBFBD>߿<EFBFBD><DFBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ------------------------------
//RC_Antenna(0);
//RC_DelayMs(1);
RC_Antenna(1);
/*ClearBitMask(Status2Reg,0x08);
WriteReg(ModeReg,0x2F);
WriteReg(TReloadRegL,30);
WriteReg(TReloadRegH,0);
WriteReg(TModeReg,0x8D);//
WriteReg(TPrescalerReg,0x3E);
WriteReg(TxASKReg,0);
WriteReg(GsNReg,0xF8);
WriteReg(CWGsPReg,0x3F);
WriteReg(ModGsPReg,0x0D);
WriteReg(TxModeReg,0x03);
WriteReg(BitFramingReg,0);//
WriteReg(AutoTestReg,0);
WriteReg(RFCfgReg,0x73);
WriteReg(RxModeReg,0x03);
WriteReg(RxThresholdReg,0x75);
ClearBitMask(RxSelReg,0x3F);
SetBitMask(RxSelReg,0x08);
ClearBitMask(TxModeReg,0x80);
ClearBitMask(RxModeReg,0x80);
ClearBitMask(Status2Reg,0x08);//
RC_Antenna(1);
WriteReg(TxASKReg, 0x00);
WriteReg(ControlReg, 0x10);
WriteReg(TxModeReg, 0x03);
WriteReg(RxModeReg, 0x0B);
WriteReg(TypeBReg, 0x03);
WriteReg(DemodReg, 0x4D);
WriteReg(GsNReg, 0xFF);
WriteReg(CWGsPReg, 0x3F);
WriteReg(ModGsPReg, 0x18);
WriteReg(RxThresholdReg, 0x4D);
WriteReg(ModWidthReg,0x68);
RC_Antenna(1);*/
break;
}
}
}
uint8_t RCRequestTypeB(void)
{
uint8_t status;
uint8_t len;
uint8_t buf[18] = {0};
buf[0] = 0x05;
buf[1] = 0x00;
buf[2] = 0x08;
//buf[3] = 0x71; // crc
//buf[4] = 0xFF;
//RC_CalulateCRC(buf, 3, &buf[3]);
status = RC_PcdCmd(PCD_TRANSCEIVE, buf, 3, buf, &len); //5 // <20>жϻ<D0B6>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>buf<75>Ƿ<EFBFBD>Ϊ"50,00,...."
iot_printf("%s: len:%d buff: 0x%x 0x%x 0x%x",__func__, len, buf[0], buf[1], buf[2]);
return status;
}
/**************************************************************************************
* FunctionName : RCATTRIBTypeB()
* Description : <EFBFBD><EFBFBD>TypeB<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ATTRIBָ<EFBFBD><EFBFBD>
* EntryParameter : None
* ReturnValue : <EFBFBD>ɹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>MI_OK
**************************************************************************************/
uint8_t RCATTRIBTypeB(void)
{
uint8_t status;
uint8_t len;
uint8_t buf[18] = {0};
buf[ 0] = 0x1D; // 1d 00 00 00 00 00 08 01 08
buf[ 1] = 0x00; // PUPI
buf[ 2] = 0x00;
buf[ 3] = 0x00;
buf[ 4] = 0x00;
buf[ 5] = 0x00;
buf[ 6] = 0x08;
buf[ 7] = 0x01;
buf[ 8] = 0x08;
buf[ 9] = 0xF3; // crc
buf[10] = 0x10;
//RC_CalulateCRC(buf, 9, &buf[9]);
status = RC_PcdCmd(PCD_TRANSCEIVE, buf, 11, buf, &len); // <20>жϻ<D0B6>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>buf<75>Ƿ<EFBFBD>Ϊ"08"
return status;
}
/**************************************************************************************
* FunctionName : RCGetUIDTypeB()
* Description : <EFBFBD><EFBFBD>ȡUID
* EntryParameter : pUID - <EFBFBD><EFBFBD><EFBFBD><EFBFBD>UID
* ReturnValue : <EFBFBD>ɹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>MI_OK
**************************************************************************************/
uint8_t RCGetUIDTypeB(uint8_t *pUID)
{
uint8_t status;
uint8_t len;
uint8_t buf[18] = {0};
buf[0] = 0x00;
buf[1] = 0x36;
buf[2] = 0x00;
buf[3] = 0x00;
buf[4] = 0x08;
buf[5] = 0x57; // crc
buf[6] = 0x44;
//RC_CalulateCRC(buf, 5, &buf[5]);
status = RC_PcdCmd(PCD_TRANSCEIVE, buf, 7, buf, &len); // <20>жϻ<D0B6>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>ΪUID "....9000"
if (status == 0)
{
os_mem_cpy(pUID, buf, 10);
}
return status;
}
void i2c_test_task()
{
// gpio reset
gpio_rst_test(24); //52
iot_printf("rst finished!!\n");
// i2c master init
g_cfg.port = IOT_I2C_PORT_0;
g_cfg.nack_wait_num = 1;
g_cfg.baud = 400;//300
g_cfg.gpio.scl = 25; //53
g_cfg.gpio.sda = 26; //54
iot_i2c_module_init(&g_cfg);
int ret = 0;
char value;
char buff[64]= {0};
int i;
while(0) //typeB wake up only for MFRC523
{
DAC_init();
WriteReg(CommandReg, PCD_RESETPHASE);
os_delay(1000);//100
RC_PcdISOType(RC_ISO14443_B);
while(1)
{
RCRequestTypeB();
}
// RCATTRIBTypeB();
// RCGetUIDTypeB((uint8_t *)buff);
iot_printf("%x %x %x %x %x %x %x %x %x %x\r\n",buff[0],buff[1],buff[2],buff[3],buff[4],buff[5],buff[6],buff[7],buff[8],buff[9]);
for(int i = 0 ; i < 16000 ; i ++);
os_delay(100);
}
#if 0
i2c_test_data[0]=0x01;
i2c_test_data[1]=0x0f;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
}
i2c_test_data[0]=0x13;
i2c_test_data[1]=0x00;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
}
i2c_test_data[0]=0x14;
i2c_test_data[1]=0x83;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
}
i2c_test_data[0]=0x26;
i2c_test_data[1]=0x78;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
}
i2c_test_data[0]=0x01;
i2c_test_data[1]=0x08;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
}
#endif
///////////////////////////////////////////////////////////////////////////////////////////
DAC_init();
i2c_test_data[0]=0x01;
i2c_test_data[1]=0x0f;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,1,0xf);
os_delay(1000);
i2c_test_data[0]=0x02;
i2c_test_data[1]=0x60;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0x02,0x60);
i2c_test_data[0]=0x16;
i2c_test_data[1]=0x27;//0x27
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0x16,0x04);
iot_printf("cfg inter tx src\r\n");
while(1) //typeA wake up for nfc + MFRC523
{
i2c_test_data[0]=0x0c;
i2c_test_data[1]=0x90;//0x27
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0x0c,0x90);
#if 1
value=0x4;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
if (ret) {
iot_printf("i2c_read_command write addr errori 22222\n");
// return ret;
}
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
//if slave wdata fifo is not empty, the master will receive nak at the end
if (ret) {
iot_printf("i2c_read_command get value error\n");
// return ret;
}
iot_printf("\nBef: irq stat 0x%x------0x%x\r\n",buff[0], nfc_write_access_read(value));
#endif
#if 0
i2c_test_data[0]=0x01;
i2c_test_data[1]=0x0f;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,1,0xf);
os_delay(1000);
#endif
i2c_test_data[0]=0x04;
i2c_test_data[1]=(buff[0]&0x7f);
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0x04,(nfc_write_access_read(value)&0x7f));
iot_printf("Clean intr......\r\n\n");
value=0x4;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
if (ret) {
iot_printf("i2c_read_command write addr errori 22222\n");
// return ret;
}
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
//if slave wdata fifo is not empty, the master will receive nak at the end
if (ret) {
iot_printf("i2c_read_command get value error\n");
// return ret;
}
iot_printf("AFT0000: irq stat 0x%x------0x%x\r\n",buff[0], nfc_write_access_read(value));
i2c_test_data[0]=0x01;
i2c_test_data[1]=0x20;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0x01,0x20);
os_delay(1000);
#if 0
i2c_test_data[0]=0x01;
i2c_test_data[1]=0x20;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0x01,0x20);
#endif
iot_printf("\n\n...................................\n");
i2c_test_data[0]=0x0a;
i2c_test_data[1]=0x80;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0x0a,0x80);
iot_printf("Clean FIFO......\r\n\n");
#if 1
#if 0 /////////////////////////2
i2c_test_data[0]=0x02;
i2c_test_data[1]=0x60;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0x02,0x60);
#endif
i2c_test_data[0]=0x03;
i2c_test_data[1]=0x80;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0x03,0x80);
value=0x4;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
if (ret) {
iot_printf("i2c_read_command write addr errori 22222\n");
// return ret;
}
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
//if slave wdata fifo is not empty, the master will receive nak at the end
if (ret) {
iot_printf("i2c_read_command get value error\n");
// return ret;
}
iot_printf("AFT: irq stat 0x%x------0x%x\r\n",buff[0], nfc_write_access_read(value));
#endif
buff[0]=0x09; buff[1]=0x52;
ret = iot_i2c_write(0, test_dev_addr, buff, 2);//16
if (ret) {
iot_printf("i2c_read_command write addr error.\n");
// return ret;
}
nfc_write_access_write(0,0x09,0x52);
iot_printf("config fifo\r\n");
value=0x0a;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
if (ret) {
iot_printf("i2c_read_command write addr errori 22222\n");
// return ret;
}
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
//if slave wdata fifo is not empty, the master will receive nak at the end
if (ret) {
iot_printf("i2c_read_command get value error\n");
// return ret;
}
iot_printf("tx fifo num: 0x%x------0x%x\r\n",buff[0], nfc_write_access_read(value));
i2c_test_data[0]=0x12;
i2c_test_data[1]=0x00;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0x12,0x00);
iot_printf("config tx speed\r\n");
i2c_test_data[0]=0x14;
i2c_test_data[1]=0xa3;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0x14,0xa3);
iot_printf("ctrl tx1 tx2\r\n");
#if 1 //////////////3
i2c_test_data[0]=0x16;
i2c_test_data[1]=0x27;//0x27
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0x16,0x04);
iot_printf("cfg inter tx src\r\n");
#endif
i2c_test_data[0]=0x15;
i2c_test_data[1]=0x40;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0x15,0x40);
i2c_test_data[0]=0x17;
i2c_test_data[1]=0x84; //0x84
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0x17,0x84);//0x84
i2c_test_data[0]=0x18;
i2c_test_data[1]=0x7f;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0x18,0x7f);
i2c_test_data[0]=0x27;
i2c_test_data[1]=0x88;//0xf0
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0x27,0x88);//0xf0
i2c_test_data[0]=0x28;
i2c_test_data[1]=0x3f;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0x28,0x3f);
iot_printf("cfg ant p no wrk ratio\r\n");
i2c_test_data[0]=0x29;
i2c_test_data[1]=0x00;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0x29,0x00);
iot_printf("cfg ant p wrk ratio\r\n");
i2c_test_data[0]=0x13;
i2c_test_data[1]=0;//0x04;//0x00
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0x13,0);//0x04);//0x00
i2c_test_data[0]=0x26;
i2c_test_data[1]=0x78;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0x26,0x78);
i=0;
while(i<10)
buff[i++]=0;
buff[20]=0;
os_delay(10);
i2c_test_data[0]=0x01;
i2c_test_data[1]=0x0c;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0x1,0xc);
// nfc_write_access_write(0,0xd,0x87);
// os_delay(10);
i2c_test_data[0]=0x0d;
i2c_test_data[1]=0x87; //0x80
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
nfc_write_access_write(0,0xd,0x87);
os_delay(10);//500
#if 0
i=0;
while(i<30)
{
value=0x4;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
if (ret) {
iot_printf("i2c_read_command write addr errori 22222\n");
// return ret;
}
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
//if slave wdata fifo is not empty, the master will receive nak at the end
if (ret) {
iot_printf("i2c_read_command get value error\n");
// return ret;
}
if(buff[0]& 0x20)
break;
iot_printf("%d: irq stat 0x%x\r\n", i, buff[0]);
os_delay(500);
i++;
buff[0]=0x09; buff[1]=0x52;
ret = iot_i2c_write(0, test_dev_addr, buff, 2);//16
if (ret) {
iot_printf("i2c_read_command write addr error.\n");
// return ret;
}
os_delay(10);
i2c_test_data[0]=0x01;
i2c_test_data[1]=0x0c;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
os_delay(10);
i2c_test_data[0]=0x0d;
i2c_test_data[1]=0x80;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
os_delay(500);
}
#endif
value = 0x0a;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
if (ret) {
iot_printf("i2c_read_command write addr errori 22222\n");
// return ret;
}
ret = iot_i2c_read(0, test_dev_addr, (char *)(&buff[20]), 1);
//if slave wdata fifo is not empty, the master will receive nak at the end
if (ret) {
iot_printf("i2c_read_command get value error\n");
}
iot_printf("RX fifo num : %x------0x%x\n",buff[20], nfc_write_access_read(value));
// ret
#if 1
value = 0x09;
os_delay(10);//1000
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
if (ret) {
iot_printf("i2c_read_command write addr errori 22222\n");
// return ret;
}
ret = iot_i2c_read(0, test_dev_addr, buff, 10);
//if slave wdata fifo is not empty, the master will receive nak at the end
if (ret) {
iot_printf("i2c_read_command get value error\n");
// return ret;
}
i=0;
while(i<5)
iot_printf(" 0x%x ------ 0x%x\r\n",buff[i++], nfc_write_access_read(value));
#endif
// os_delay(100);
}
///////////////////////////////////////////////////////////////////////////////////////////
while(1) //typeA wake up only for MFRC523
{
#if 1
value=0x4;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
if (ret) {
iot_printf("i2c_read_command write addr errori 22222\n");
// return ret;
}
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
//if slave wdata fifo is not empty, the master will receive nak at the end
if (ret) {
iot_printf("i2c_read_command get value error\n");
// return ret;
}
iot_printf("\nBef: irq stat 0x%x\r\n",buff[0]);
#endif
i2c_test_data[0]=0x01;
i2c_test_data[1]=0x0f;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
iot_printf("\n\n.....................................................................\n");
i2c_test_data[0]=0x0a;
i2c_test_data[1]=0x80;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
iot_printf("Clean FIFO......\r\n\n");
#if 1
i2c_test_data[0]=0x02;
i2c_test_data[1]=0x60;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
i2c_test_data[0]=0x03;
i2c_test_data[1]=0x80;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
value=0x4;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
if (ret) {
iot_printf("i2c_read_command write addr errori 22222\n");
// return ret;
}
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
//if slave wdata fifo is not empty, the master will receive nak at the end
if (ret) {
iot_printf("i2c_read_command get value error\n");
// return ret;
}
iot_printf("AFT: irq stat 0x%x\r\n",buff[0]);
#endif
buff[0]=0x09; buff[1]=0x52;
ret = iot_i2c_write(0, test_dev_addr, buff, 2);//16
if (ret) {
iot_printf("i2c_read_command write addr error.\n");
// return ret;
}
iot_printf("config fifo\r\n");
value=0x0a;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
if (ret) {
iot_printf("i2c_read_command write addr errori 22222\n");
// return ret;
}
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
//if slave wdata fifo is not empty, the master will receive nak at the end
if (ret) {
iot_printf("i2c_read_command get value error\n");
// return ret;
}
iot_printf("tx fifo num: %x\r\n",buff[0]);
i2c_test_data[0]=0x12;
i2c_test_data[1]=0x00;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
iot_printf("config tx speed\r\n");
i2c_test_data[0]=0x14;
i2c_test_data[1]=0xa3;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
iot_printf("ctrl tx1 tx2\r\n");
i2c_test_data[0]=0x16;
i2c_test_data[1]=0x17;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
iot_printf("cfg inter tx src\r\n");
i2c_test_data[0]=0x15;
i2c_test_data[1]=0x40;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
i2c_test_data[0]=0x17;
i2c_test_data[1]=0x84;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
i2c_test_data[0]=0x18;
i2c_test_data[1]=0x7f;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
i2c_test_data[0]=0x27;
i2c_test_data[1]=0xf0;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
i2c_test_data[0]=0x28;
i2c_test_data[1]=0x3f;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
iot_printf("cfg ant p no wrk ratio\r\n");
i2c_test_data[0]=0x29;
i2c_test_data[1]=0x00;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
iot_printf("cfg ant p wrk ratio\r\n");
i2c_test_data[0]=0x13;
i2c_test_data[1]=0x00;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
i2c_test_data[0]=0x26;
i2c_test_data[1]=0x78;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
i=0;
while(i<10)
buff[i++]=0;
buff[20]=0;
os_delay(10);
i2c_test_data[0]=0x01;
i2c_test_data[1]=0x0c;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
iot_printf(".");
os_delay(10);
i2c_test_data[0]=0x0d;
i2c_test_data[1]=0x87; //0x80
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
iot_printf(".\n");
os_delay(500);
#if 0
i=0;
while(i<30)
{
value=0x4;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
if (ret) {
iot_printf("i2c_read_command write addr errori 22222\n");
// return ret;
}
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
//if slave wdata fifo is not empty, the master will receive nak at the end
if (ret) {
iot_printf("i2c_read_command get value error\n");
// return ret;
}
if(buff[0]& 0x20)
break;
iot_printf("%d: irq stat 0x%x\r\n", i, buff[0]);
os_delay(500);
i++;
buff[0]=0x09; buff[1]=0x52;
ret = iot_i2c_write(0, test_dev_addr, buff, 2);//16
if (ret) {
iot_printf("i2c_read_command write addr error.\n");
// return ret;
}
os_delay(10);
i2c_test_data[0]=0x01;
i2c_test_data[1]=0x0c;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
os_delay(10);
i2c_test_data[0]=0x0d;
i2c_test_data[1]=0x80;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
os_delay(500);
}
#endif
value = 0x0a;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
if (ret) {
iot_printf("i2c_read_command write addr errori 22222\n");
// return ret;
}
ret = iot_i2c_read(0, test_dev_addr, (char *)(&buff[20]), 1);
//if slave wdata fifo is not empty, the master will receive nak at the end
if (ret) {
iot_printf("i2c_read_command get value error\n");
}
iot_printf("RX fifo num : %x\n",buff[20]);
// ret
#if 1
value = 0x09;
os_delay(1000);
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
if (ret) {
iot_printf("i2c_read_command write addr errori 22222\n");
// return ret;
}
ret = iot_i2c_read(0, test_dev_addr, buff, 10);
//if slave wdata fifo is not empty, the master will receive nak at the end
if (ret) {
iot_printf("i2c_read_command get value error\n");
// return ret;
}
i=0;
while(i<10)
iot_printf(" 0x%x ",buff[i++]);
#endif
os_delay(100);
}
while(1)
{
#if 0
i2c_test_data[0]=0x01;
i2c_test_data[1]=0x0f;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
#if 1
//os_delay(50);
buff[0]=0x09;
ret = iot_i2c_write(0, test_dev_addr, buff, 26);
if (ret) {
iot_printf("i2c_read_command write addr error.\n");
// return ret;
}
//os_delay(50);
#endif
i2c_test_data[0]=0x01;
i2c_test_data[1]=0x01;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error..\n");
// return ret;
}
//os_delay(50);
i2c_test_data[0]=0x36;
i2c_test_data[1]=0x09;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error...\n");
// return ret;
}
//os_delay(50);
i2c_test_data[0]=0x09;
i2c_test_data[1]=0x00;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error....\n");
// return ret;
}
//os_delay(50);
i2c_test_data[0]=0x01;
i2c_test_data[1]=0x03;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error.....\n");
// return ret;
}
//os_delay(50);
value=0x09;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
if (ret) {
iot_printf("i2c_read_command write addr errori ......\n");
// return ret;
}
//os_delay(50);
ret = iot_i2c_read(0, test_dev_addr, buff, 64);
if (ret) {
iot_printf("i2c_read_command get value error.......\n");
// return ret;
}
i =0;
while(i<64)
iot_printf("0x%x ",buff[i++]);
iot_printf("\r\n");
#endif
i2c_test_data[0]=0x01;
i2c_test_data[1]=0x0f;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
iot_printf("RESET\r\n");
//os_delay(50);
buff[0]=0x09; buff[1]=0x00; buff[2]=0xd3;buff[3]=0x0f;buff[4]=0xaa;buff[5]=0x33;buff[6]=0xaa;buff[7]=0x33;
buff[8]=0xaa;buff[9]=0x33;buff[10]=0xaa;buff[11]=0x33;buff[12]=0xaa;buff[13]=0x33;buff[14]=0xaa;buff[15]=0x33;
ret = iot_i2c_write(0, test_dev_addr, buff, 16);
if (ret) {
iot_printf("i2c_read_command write addr error.\n");
// return ret;
}
iot_printf("config fifo\r\n");
i2c_test_data[0]=0x12;
i2c_test_data[1]=0x00;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
iot_printf("config tx speed\r\n");
i2c_test_data[0]=0x14;
i2c_test_data[1]=0x83;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
iot_printf("ctrl tx1 tx2\r\n");
i2c_test_data[0]=0x16;
i2c_test_data[1]=0x10;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
iot_printf("cfg inter tx src\r\n");
i2c_test_data[0]=0x27;
i2c_test_data[1]=0xf0;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
iot_printf("cfg ant N ratio\r\n");
i2c_test_data[0]=0x28;
i2c_test_data[1]=0x3f;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
iot_printf("cfg ant p no wrk ratio\r\n");
i2c_test_data[0]=0x29;
i2c_test_data[1]=0x00;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
iot_printf("cfg ant p wrk ratio\r\n");
i2c_test_data[0]=0x01;
i2c_test_data[1]=0x04;
ret = iot_i2c_write(0, test_dev_addr, (char *)(&i2c_test_data[0]), 2);
if (ret) {
iot_printf("i2c_read_command write addr error\n");
// return ret;
}
iot_printf("send fifo\r\n");
}
// todo : if write match write pattern, put buffer info wdata fifo
while(1) //do a nfc module regs test
{
value=0x18;
os_delay(100);
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
if (ret) {
iot_printf("i2c_read_command write addr errori 22222\n");
// return ret;
}
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
//if slave wdata fifo is not empty, the master will receive nak at the end
if (ret) {
iot_printf("i2c_read_command get value error\n");
// return ret;
}
iot_printf("1, 0x%x,0x%x,0x%x,0x%x,\r\n",buff[0],buff[1],buff[2],buff[3]);
value=0x26;
os_delay(100);
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
if (ret) {
iot_printf("i2c_read_command write addr errori 22222\n");
// return ret;
}
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
//if slave wdata fifo is not empty, the master will receive nak at the end
if (ret) {
iot_printf("i2c_read_command get value error\n");
// return ret;
}
iot_printf("2, 0x%x,0x%x,0x%x,0x%x\r\n",buff[0],buff[1],buff[2],buff[3]);
value = 0x24;
os_delay(100);
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
if (ret) {
iot_printf("i2c_read_command write addr errori 22222\n");
// return ret;
}
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
//if slave wdata fifo is not empty, the master will receive nak at the end
if (ret) {
iot_printf("i2c_read_command get value error\n");
// return ret;
}
iot_printf("3,0x%x,0x%x,0x%x,0x%x\r\n",buff[0],buff[1],buff[2],buff[3]);
value = 0x37;
os_delay(100);
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
if (ret) {
iot_printf("i2c_read_command write addr errori 22222\n");
// return ret;
}
ret = iot_i2c_read(0, test_dev_addr, buff, 1);
//if slave wdata fifo is not empty, the master will receive nak at the end
if (ret) {
iot_printf("i2c_read_command get value error\n");
// return ret;
}
iot_printf("version reg: 0x%x\r\n",buff[0]);
value = 0x09;
os_delay(100);
ret = iot_i2c_write(0, test_dev_addr, (char *)(&value), 1);
if (ret) {
iot_printf("i2c_read_command write addr errori 22222\n");
// return ret;
}
ret = iot_i2c_read(0, test_dev_addr, buff, 64);
//if slave wdata fifo is not empty, the master will receive nak at the end
if (ret) {
iot_printf("i2c_read_command get value error\n");
// return ret;
}
i=0;
while(i<64)
iot_printf(" 0x%x ",buff[i++]);
iot_printf("\r\n");
}
// send i2c command
while(1) {
#if TEST_CASE & I2C_S_WRITE
do {
int ret = 0;
ret = i2c_write_command(test_dev_addr, i2c_test_data[0],
i2c_test_data[1], i2c_test_data[2]);
if (ret) {
iot_printf("write regs error[%d]\n", ret);
} else {
iot_printf("write successful, \n");
}
} while(0);
#endif
#if TEST_CASE & I2C_S_READ
do {
uint8_t val = 0xaa;
if(i2c_read_command(test_dev_addr, 0xaa55, &val, 1)) {
iot_printf("read error\n");
} else {
iot_printf("read value: %02x\n", val);
}
} while(0);
#endif
#if TEST_CASE & I2C_S_FILE // test pmu rom code
// command control
// write reg
#define I2C_REG_CTRL (0x23)
#define I2C_REG_TRANS (0x45)
// read reg
#define I2C_REG_RLEN (0x67)
// reg control segment
#define I2C_CTRL_START (0x11)
#define I2C_CTRL_BOOT (0x33)
do {
int ret = 0;
uint8_t test_val = 0x22;
ret = i2c_write_file(test_dev_addr, I2C_REG_CTRL, &test_val, 1);
iot_printf("send stop command\n");
// send start trans reg
uint8_t start_val = I2C_CTRL_START;
ret = i2c_write_file(test_dev_addr, I2C_REG_CTRL, &start_val, 1);
iot_printf("send start command\n");
// send code
uint8_t *p = pmu_test_bin;
uint8_t step = 4;
uint32_t cnt = pmu_test_bin_len / step;
uint32_t left = pmu_test_bin_len % step;
for(uint32_t i = 0; i < cnt; i++) {
ret = i2c_write_file(test_dev_addr, I2C_REG_TRANS, p+i*step, step);
if (ret) {
iot_printf("write regs error[%d]\n");
} else {
iot_printf("write successful,i =%d\n", i);
}
}
if (left > 0) {
ret = i2c_write_file(test_dev_addr, I2C_REG_TRANS, p+cnt*step, left);
if (ret) {
iot_printf("write regs error[%d]\n");
} else {
iot_printf("write left successful, left: %d\n", left);
}
}
// read written length command
uint32_t len = 0;
ret = i2c_read_file(test_dev_addr, I2C_REG_RLEN, (uint8_t *)&len, 2);
if (ret) {
iot_printf("read regs error\n");
} else {
iot_printf("read successful\n");
iot_printf("len: %x\n", len);
}
// send boot command
uint8_t boot_val = I2C_CTRL_BOOT;
ret = i2c_write_file(test_dev_addr, I2C_REG_CTRL, &boot_val, 1);
if (ret) {
iot_printf("write regs error\n");
} else {
iot_printf("write successful\n");
}
iot_printf("send boot command\n");
while(1) {
os_delay(1000);
iot_printf(".............\n");
}
while(1);
} while(0);
#endif
}
}
void i2c_test_task_init()
{
os_task_h handle;
handle = os_create_task(i2c_test_task, NULL, 6);
if(handle != NULL) {
// iot_printf("task create successfully...\n");
}
}
void i2c_test_init()
{
/* init common modules */
iot_bitops_init();
/* init os related modules and utilities */
// os_utils_init();
/* gpio matrix enable */
gpio_mtx_enable();
/*init uart module*/
//iot_uart_init(1);
i2c_test_task_init();
}
void i2c_init_task(void *arg)
{
// iot_printf("task 1 entry....\n");
for(;;) {
i2c_test_init();
os_delete_task(test_init_handle);
}
}
int32_t i2c_task_init()
{
/* start plc lib task */
test_init_handle = os_create_task(i2c_init_task, NULL, 9);
//create the tasks;
if(test_init_handle != NULL) {
// iot_printf("task 1 init successfully...\n");
}
return 0;
}
int32_t i2c_task_start()
{
os_start_kernel();
return 0;
}
int32_t iot_platform_init()
{
platform_init();
system_clock_init();
// system_uart_init();
dbg_uart_init();
return 0;
}
int32_t iot_module_init(void)
{
//platform intialization;
iot_platform_init();
//create all the tasks;
i2c_task_init();
// iot_printf("starting...\n");
return 0;
}
int main(void)
{
//module init;
iot_module_init();
//module start;
i2c_task_start();
return 0;
}
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