kunlun/inc/driver/iot_system.h

/****************************************************************************

Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.

This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
be copied by any method or incorporated into another program without
the express written consent of Aerospace C.Power. This Information or any portion
thereof remains the property of Aerospace C.Power. The Information contained herein
is believed to be accurate and Aerospace C.Power assumes no responsibility or
liability for its use in any way and conveys no license or title under
any patent or copyright and makes no representation or warranty that this
Information is free from patent or copyright infringement.

****************************************************************************/
#ifndef IOT_SYSTEM_H
#define IOT_SYSTEM_H

#include "iot_system_api.h"

#ifdef __cplusplus
extern "C" {
#endif

/*************************** chip id type *************************************/
#define IOT_CHIP_ID_UNKNOWN 0
#define IOT_CHIP_ID_HT_WQ   1
#define IOT_CHIP_ID_MT      2
#define IOT_CHIP_ID_FLX     3
#define IOT_CHIP_ID_QJ      4
#define IOT_CHIP_ID_SPE     5
#define IOT_CHIP_ID_GX      6
#define IOT_CHIP_ID_DT      7
#define IOT_CHIP_ID_YP      8
#define IOT_CHIP_ID_WTZ     9
#define IOT_CHIP_ID_TCE     10

/*************************** kunlun1 chip id **********************************/
/* HZ k48 */
#define CHIP_ID_HZ_K48V1A     0x0003 //HZ3011
#define CHIP_ID_HZ_K48V2A     0x0103 //HZ3011
#define CHIP_ID_HZ_K48V3A     0x0203 //HZ3011
/* HZ k68 */
#define CHIP_ID_HZ_K68V1A     0x0001 //HZ3001
#define CHIP_ID_HZ_K68V2A     0x0101 //HZ3001
#define CHIP_ID_HZ_K68V3A     0x0201 //HZ3001
/* WQ k48 */
#define CHIP_ID_WQ_K48V3A     0x0213 //WQ3011
#define CHIP_ID_WQ_K48V3A2    0x0223 //WQ3012
#define CHIP_ID_WQ_K48V3A3    0x0233 //WQ3013
#define CHIP_ID_WQ_K48V2A     0x0113 //WQ3011
#define CHIP_ID_WQ_K48V2A2    0x0123 //WQ3012
/* WQ k68 */
#define CHIP_ID_WQ_K68V3A     0x0211 //WQ3001
#define CHIP_ID_WQ_K68V3A2    0x0221 //WQ3001
/* MT k68 */
#define CHIP_ID_MT_K68V1B     0x0009 //MT8201
#define CHIP_ID_MT_K68V1BB    0x0005 //MT8201
#define CHIP_ID_MT_K68V2B     0x0109 //MT8201
#define CHIP_ID_MT_K68V2BB    0x0105 //MT8201
#define CHIP_ID_MT_K68V3B     0x0209 //MT8201
#define CHIP_ID_MT_K68V3BB    0x0205 //MT8201
#define CHIP_ID_MT_K68V3A     0x020d //MT8201
/*
 * FLX6610/FLX6611 regarded as HTZD chip from now on.
 */
#define CHIP_ID_FLX_K68       0x0301 //FLX6610
#define CHIP_ID_FLX_K48       0x0303 //FLX6611

/*************************** kunlun2 chip id **********************************/
// AI package
#define CHIP_ID_WQ5007_REVA   0x0011 //Kunlun2's K3D revA
#define CHIP_ID_WQ5007_REVB   0x0012 //Kunlun2 K3D revB
#define CHIP_ID_WQ5106_REVB   0x0052 //Kunlun2 AUDIO revB
#define CHIP_ID_TQAI01_REVB   0x0092 //Kunlun2 TQAI01 revB
#define CHIP_ID_ASK1001_REVB  0x00d2 //Kunlun2 ask1001 revB
// plc package
#define CHIP_ID_WQ3021_REVA   0x0811 //Kunlun2's PLC revA
#define CHIP_ID_WQ3021_REVB   0x0812 //Kunlun2's PLC revB
#define CHIP_ID_WQ3021_REVC   0x0912 //Kunlun2's PLC revC
#define CHIP_ID_WQ3021_REVD   0x0892 //Kunlun2's PLC revD

/*************************** kunlun3 chip id **********************************/
/*  | chid_id[15:12]    | chip_id[11:8] | chip_id[7:4]  | chip_id[3:0]  |
 *  | project[3:0]      | wafer[3:0]    | mark[3:0]     | sip[3:0]      |
 * sip[3:3]->rf-in, sip[2:2]->pa-in, sip[1:1]->psram-in, sip[0:0]->flash-in
 */
/* WQ3031_V1A, k48, QFN6*6, internal pa */
#define CHIP_ID_WQ3031_V1A    0x1005    //WQ3031
/* HZ3201_V1A, k76, QFN9*9, internal psram */
#define CHIP_ID_HZ3201_V1A    0x1003    //HZ3201
/* HZ3211_V1A, k76, QFN9*9 */
#define CHIP_ID_HZ3211_V1A    0x1001    //HZ3211
/* HZ3201, RF, k76, QFN9*9 */
#define CHIP_ID_HZ3201_RF_V1A 0x100B    //HZ3201RF
/* HZ3211, RF, k76, QFN9*9 */
#define CHIP_ID_HZ3211_RF_V1A 0x100D    //HZ3211RF
/* QJ5580D_V1A, k76, QFN9*9 */
#define CHIP_ID_QJ5580D_V1A   0x1013    //QJ5580D
/* QJ5582D_V1A, k76, QFN9*9 */
#define CHIP_ID_QJ5582D_V1A   0x1011    //QJ5582D
/* FLX6711, k76, QFN9*9 */
#define CHIP_ID_FLX6711_V1A   0x1021    //FLX6711
/* FLX6710, k76, QFN9*9 */
#define CHIP_ID_FLX6710_V1A   0x1023    //FLX6710
/* SPE7303, k76, QFN9*9 */
#define CHIP_ID_SPE7303_V1A   0x1033    //SPE7303
/* SPE7301, k76, QFN9*9 */
#define CHIP_ID_SPE7301_V1A   0x1031    //SPE7301
/* GX2001, k76, QFN9*9 */
#define CHIP_ID_GX2001_V1A    0x1043    //GX2001
/* GX2011, k76, QFN9*9 */
#define CHIP_ID_GX2011_V1A    0x1041    //GX2011
/* HZ5202, k76, QFN9*9 */
#define CHIP_ID_HZ5202_V1A    0x1057    //HZ5202
/* DT0530, k76, QFN9*9 */
#define CHIP_ID_DT0530_V1A    0x1063    //DT0530
/* DT0531, k76, QFN9*9 */
#define CHIP_ID_DT0531_V1A    0x1061    //DT0531
/* YP8801, k76, QFN9*9 */
#define CHIP_ID_YP8801_V1A    0x1073    //YP8801
/* YP8811, k76, QFN9*9 */
#define CHIP_ID_YP8811_V1A    0x1071    //YP8811
/* WTZ31C, k76, QFN9*9 */
#define CHIP_ID_WTZ31C_V1A    0x1083    //WTZ31C
/* WTZ31S, k76, QFN9*9 */
#define CHIP_ID_WTZ31S_V1A    0x1081    //WTZ31S
/* TCE3202, k76, QFN9*9 */
#define CHIP_ID_TCE3202_V1A   0x1093    //TCE3202
/* TCE3201, k76, QFN9*9 */
#define CHIP_ID_TCE3201_V1A   0x1091    //TCE3201

/* control transfer instuction */
#define RISCV32_INST_SET_JAL        0x6f
#define RISCV32_INST_SET_JALR       0x67
#define RISCV32_INST_SET_LUI        0x37
#define RISCV32_INST_SET_AUIPC      0x17
#define RISCV32_INST_SET_C_JR       0x4
#define RISCV32_INST_SET_C_JR_OP    0x2
#define RISCV32_INST_SET_C_JALR     0x4
#define RISCV32_INST_SET_C_JALR_OP  0x2

/* firmware run mode */
#define MM_MODE                 0
#define FTM_MODE                1
#define MP_MODE                 2

/* cpu status flag */
#define CPU_FLAG_RUNNING        1
#define CPU_FLAG_INVALID        2

/* chip reset reason */
#define PWR_RESET_FLAG        0x0
#define SOFT_RESET_FLAG       0xA5
#define WDT_RESET_FLAG        0x5A
/* watchdog flag: msb=1;  power on flag: msb=0; */
#define RST_REASON_WDG_FLAG         (0x80000000)
#define RST_REASON_SOFT_TYPE_GET(r) ((uint8_t)((r) & 0xFF))
#define RST_REASON_IS_WDG_TYPE(r)   \
    ((((r) & RST_REASON_WDG_FLAG) == RST_REASON_WDG_FLAG) ? 1 : 0)

// global address mapping
extern uint32_t _start;         // start address
extern uint32_t _etext;         // text end address
extern uint32_t _data;          // data start address
extern uint32_t _sp;            // data end address
extern uint32_t _iram_start;    // iram start address
extern uint32_t _iram_end;      // iram end address
extern uint32_t _flash_end;     // flash end address

// trap saved registers
typedef struct {
    uint32_t ra;
    uint32_t sp;
    uint32_t gp;
    uint32_t tp;
    uint32_t t0_2[3];
    uint32_t t6;
    uint32_t s1;
    uint32_t a0_7[8];
    uint32_t s2_11[10];
    uint32_t t3_4[2];
    uint32_t t5;
    uint32_t fp;
} saved_registers;

typedef struct {
    unsigned char  file[32];
    uint32_t line;
}assert_failed_info;

typedef struct {
    uint32_t count;
    uint32_t crash:1,
        assert_failed:1,
        flags:6,
        resv:24;
    uint32_t mepc;
    uint32_t mcause;
    saved_registers *trap_frame;
    assert_failed_info assert_info;
}cpu_state;

typedef struct _exception_cb {
    void (* handler)(uintptr_t mcause, uintptr_t epc, saved_registers *reg);
    int32_t (* full_dump)();
} exception_cb_t;

extern cpu_state g_cpu1_state;

void iot_iram_cache_legal_check();

uint32_t iot_chip_id_check();

uint8_t iot_sys_reset_ctrl();

uint32_t iot_cpu1_count_get();
uint32_t iot_cpu1_crash_get();
void iot_cpu1_crash_dump();

/**
 * @brief   iot_chip_get_xor_value() - get chip xor value.
 * @return  xor value, see - IOT_XOR_VALUE_XXX.
 */
uint8_t iot_chip_get_xor_value();

/**
 * @brief iot_chip_get_mac_addr - get mac address in chip.
 * @param mac: pointer of mac address buffer.
 * @return 0: succeed, 0xffffffff: failed.
 */
uint32_t iot_chip_get_mac_addr(uint8_t *mac);

/**
 * @brief iot_chip_get_chip_info: get internal chip id information.
 * @return chip id;
 */
uint32_t iot_chip_get_chip_info();

/**
 * @brief iot_chip_get_chip_subid_info: get internal chip sub id information.
 * @return chip sub id, 0 : invalid;
 */
uint32_t iot_chip_get_chip_subid_info();

/**
 * @brief iot_chip_efuse_check: get internal chip efuse check information.
 * @return chip efuse check result.
 *  0x00: check succeed; other: the corresponding item fails to be verified.
 *      bit 0: chip id check result;
 *      bit 1: mac address check result;
 *      bit 2: ate calibration check result;
 *      bit 3: sadc meter check result.
 */
uint8_t iot_chip_efuse_check();

/**
 * @brief iot_chip_check_lic: check license status.
 * @return 1->internal pa, 0->external pa.
 */
uint8_t iot_chip_check_lic();

/**
 * @brief iot_system_get_fw_boot_param - get firmware boot parameter.
 * @param param: pointer of parameter that sbl load firmware.
 * @return none.
 */
void iot_system_get_fw_boot_param(void *param);

/**
 * @brief iot_system_get_rst_flag_reg - get rest flag in register set by hardware.
 * @return reset flag.
 */
uint32_t iot_system_get_rst_flag_reg();
#ifdef __cplusplus
}
#endif

#endif //IOT_SYSTEM_H