diff --git a/bb_cpu/startup/init_2.c b/bb_cpu/startup/init_2.c index 3b25060..3148900 100644 --- a/bb_cpu/startup/init_2.c +++ b/bb_cpu/startup/init_2.c @@ -191,7 +191,12 @@ void exception_handler_2(uintptr_t mcause, uintptr_t epc, saved_registers *reg) //disble global interrupt; __asm volatile ( "csrc mstatus,8" ); + // 在mbadaddr寄存器写入值 gcc 15 中这个寄存器名称改了 + #if __GNUC__ <= 10 __asm volatile ( "csrr %0, mbadaddr" : "=r"(mbadaddr)); + #else + __asm volatile ( "csrr %0, mtval" : "=r"(mbadaddr)); + #endif switch(mcause) { case 0x0: diff --git a/build/makefile.cfg b/build/makefile.cfg index f20be6f..5f1e507 100644 --- a/build/makefile.cfg +++ b/build/makefile.cfg @@ -30,7 +30,13 @@ else RISCV_VER = riscv3 else CC = riscv64-unknown-elf-gcc - ISA = rv32imc + gcc_version=$(shell (${CC} -dumpversion | awk -F. '{print $1}')) + # $(info "gcc version is " ${gcc_version}) + ifeq ($(gcc_version), 15.0.0) + ISA = rv32imc_zicsr + else + ISA = rv32imc + endif ABI = ilp32 RISCV_VER = riscv endif diff --git a/driver/src/hw/wdg.c b/driver/src/hw/wdg.c index 4a8469d..d396bf8 100644 --- a/driver/src/hw/wdg.c +++ b/driver/src/hw/wdg.c @@ -195,7 +195,12 @@ uint32_t IRAM_ATTR wdg_handler(uint32_t vector, iot_addrword_t data) uintptr_t mbadaddr = 0, mepc = 0, mcause = 0; mbadaddr = 0xdeadfeed; __asm volatile ( "csrc mstatus, 8" ); + // 在mbadaddr寄存器写入值 gcc 15 中这个寄存器名称改了 + #if __GNUC__ <= 10 __asm volatile ( "csrw mbadaddr, %0" :: "r"(mbadaddr) ); + #else + __asm volatile ( "csrw mtval, %0" :: "r"(mbadaddr) ); + #endif __asm volatile ( "csrr %0, mepc" : "=r"(mepc) ); __asm volatile ( "csrr %0, mcause" : "=r"(mcause) ); iot_sprintf(buf, "mcause: 0x%08x, mepc: 0x%08x, mbadaddr: 0x%08x\n", @@ -266,7 +271,12 @@ uint32_t wdg_handler_1(uint32_t vector, iot_addrword_t data) print_cache_error_msg(buf); uint32_t mbadaddr = 0, mepc = 0, mcause = 0; __asm volatile ( "csrc mstatus, 8" ); - __asm volatile ( "csrr %0, mbadaddr" : "=r"(mbadaddr) ); + // 在mbadaddr寄存器写入值 gcc 15 中这个寄存器名称改了 + #if __GNUC__ <= 10 + __asm volatile ( "csrr %0, mbadaddr" : "=r"(mbadaddr)); + #else + __asm volatile ( "csrr %0, mtval" : "=r"(mbadaddr)); + #endif __asm volatile ( "csrr %0, mepc" : "=r"(mepc) ); __asm volatile ( "csrr %0, mcause" : "=r"(mcause) ); iot_sprintf(buf, "mcause: 0x%08x, mepc: 0x%08x, mbadaddr: 0x%08x\n", diff --git a/driver/src/hw3/wdg.c b/driver/src/hw3/wdg.c index d10220e..3a39d60 100644 --- a/driver/src/hw3/wdg.c +++ b/driver/src/hw3/wdg.c @@ -211,7 +211,12 @@ uint32_t IRAM_ATTR wdg_timeout_handler(uint32_t vector, iot_addrword_t data) uintptr_t mbadaddr = 0, mepc = 0, mcause = 0; mbadaddr = 0xdeadfeed; __asm volatile ( "csrc mstatus, 8" ); + // 在mbadaddr寄存器写入值 gcc 15 中这个寄存器名称改了 + #if __GNUC__ <= 10 __asm volatile ( "csrw mbadaddr, %0" :: "r"(mbadaddr) ); + #else + __asm volatile ( "csrw mtval, %0" :: "r"(mbadaddr) ); + #endif __asm volatile ( "csrr %0, mepc" : "=r"(mepc) ); __asm volatile ( "csrr %0, mcause" : "=r"(mcause) ); iot_sprintf(buf, "mcause: 0x%08x, mepc: 0x%08x, mbadaddr: 0x%08x\n", diff --git a/mfgtool/io_lib/src/iot_printf.c b/mfgtool/io_lib/src/iot_printf.c index 50b3086..26b06f5 100644 --- a/mfgtool/io_lib/src/iot_printf.c +++ b/mfgtool/io_lib/src/iot_printf.c @@ -14,7 +14,7 @@ Information is free from patent or copyright infringement. ****************************************************************************/ /* os shim includes */ #include - +#include "stdint.h" #include "strformat.h" static StrFormatResult write_str(void *user_data, const char *data, unsigned int len) diff --git a/sec_cpu/startup/init_3.c b/sec_cpu/startup/init_3.c index 71ed67e..908622e 100644 --- a/sec_cpu/startup/init_3.c +++ b/sec_cpu/startup/init_3.c @@ -178,7 +178,12 @@ void exception_handler_3(uintptr_t mcause, uintptr_t epc, saved_registers *reg) //disble global interrupt; __asm volatile ( "csrc mstatus,8" ); + // 在mbadaddr寄存器写入值 gcc 15 中这个寄存器名称改了 + #if __GNUC__ <= 10 __asm volatile ( "csrr %0, mbadaddr" : "=r"(mbadaddr)); + #else + __asm volatile ( "csrr %0, mtval" : "=r"(mbadaddr)); + #endif switch(mcause) { case 0x0: diff --git a/startup/riscv/src/exception.c b/startup/riscv/src/exception.c index 85ace27..6cfdb73 100644 --- a/startup/riscv/src/exception.c +++ b/startup/riscv/src/exception.c @@ -441,7 +441,11 @@ void exception_handler(uintptr_t mcause, uintptr_t epc, saved_registers *reg) //disble global interrupt; __asm volatile ( "csrc mstatus,8" ); + #if __GNUC__ <= 10 __asm volatile ( "csrr %0, mbadaddr" : "=r"(mbadaddr)); + #else + __asm volatile ( "csrr %0, mtval" : "=r"(mbadaddr)); + #endif switch(mcause) { case 0x0: diff --git a/startup/riscv3/src/exception.c b/startup/riscv3/src/exception.c index d7cdeb7..f8d6679 100644 --- a/startup/riscv3/src/exception.c +++ b/startup/riscv3/src/exception.c @@ -461,7 +461,11 @@ void IRAM_ATTR exception_handler(uintptr_t mcause, uintptr_t epc, saved_register //disble global interrupt; __asm volatile ( "csrc mstatus,8" ); + #if __GNUC__ <= 10 __asm volatile ( "csrr %0, mbadaddr" : "=r"(mbadaddr)); + #else + __asm volatile ( "csrr %0, mtval" : "=r"(mbadaddr)); + #endif asm volatile ( "csrr %0, mcause" : "=r"(curr_mcause)); asm volatile ( "csrr %0, mip" : "=r"(curr_mip));