build.gn 可以编译 链接失败

This commit is contained in:
2025-01-16 19:52:28 +08:00
parent 639024a1a6
commit 83882c7ac2
7 changed files with 33 additions and 7 deletions

View File

@@ -83,12 +83,10 @@ typedef struct _clk_div_gp_t {
uint32_t g_cpu_freq = 150000000;
#define IRAM_ATTR2 __attribute__((section(".iram")))
/*
* Clock source selecte & div for each IP, refrence to clk_frq_group.
*/
static clk_div_gp_t IRAM_ATTR2 clk_div_group[CLK_FRQ_GP_IDX_MAX] =
static clk_div_gp_t IRAM_ATTR clk_div_group[CLK_FRQ_GP_IDX_MAX] =
{
/* Core_sel APB_sel sfc_div smc_div apb_div rsv[3] */
{0, 0, 0, 0, 0, {0}}, /* disable plc */
@@ -101,7 +99,7 @@ static clk_div_gp_t IRAM_ATTR2 clk_div_group[CLK_FRQ_GP_IDX_MAX] =
static void IRAM_ATTR2 clk_system_calibration(void)
static void IRAM_ATTR clk_system_calibration(void)
{
if (!scratch_p_get_clk_calibration()) {
ana_mdll_loopmode_set(0);
@@ -113,7 +111,7 @@ static void IRAM_ATTR2 clk_system_calibration(void)
ana_mdll_loopmode_set(1);
}
static void IRAM_ATTR2 clk_system_set_all_xtal(void)
static void IRAM_ATTR clk_system_set_all_xtal(void)
{
/* APB/AHB select xtal 25M, APB div = 0. */
ahb_clk_clock_set(0, 0, 0);
@@ -128,7 +126,7 @@ static void IRAM_ATTR2 clk_system_set_all_xtal(void)
ahb_clk_mpll_set(0, 0);
}
static void IRAM_ATTR2 clk_system_set_all_pll(uint32_t index)
static void IRAM_ATTR clk_system_set_all_pll(uint32_t index)
{
/* Do calibration. */
clk_system_calibration();