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sbl/inc/hw3/sbl_boot_hw.h

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+/****************************************************************************
+
+Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
+
+This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
+be copied by any method or incorporated into another program without
+the express written consent of Aerospace C.Power. This Information or any portion
+thereof remains the property of Aerospace C.Power. The Information contained herein
+is believed to be accurate and Aerospace C.Power assumes no responsibility or
+liability for its use in any way and conveys no license or title under
+any patent or copyright and makes no representation or warranty that this
+Information is free from patent or copyright infringement.
+
+****************************************************************************/
+#ifndef SBL_BOOT_HW_H
+#define SBL_BOOT_HW_H
+
+#include "chip_reg_base.h"
+#include "iot_mem_org.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*address mapping. */
+#define RAM_BASE_ADDRESS             (AHB_RAM0_BASEADDR)
+#define RAM_END_ADDRESS              (AHB_RAM3_ENDADDR)
+#define REG_BASE_ADDRESS             (APB_REG_LITE_BASEADDR)
+#define REG_END_ADDRESS              (ICACHE2_SMC_RAM_BASEADDR - 1)
+
+//LZMA decompress address
+#define LZMA_BUF_ADDR        MEM_CFG_DECOMPRESS_RAM
+#define LZMA_BUF_SIZE        MEM_CFG_DECOMPRESS_RAM_SIZE
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //SBL_BOOT_HW_H