/* os shim includes */
#include "os_types.h"
#include "dbg_io.h"
#include "iot_io.h"


#define SOC_READ_REG(addr)          ((volatile uint32_t)*((volatile uint32_t*)(addr)))
#define SOC_WRITE_REG(addr, value)  (*((volatile uint32_t*)(addr)) = (value))
#define SOC_READ_REG_16(addr)          ((volatile uint16_t)*((volatile uint16_t*)(addr)))
#define SOC_WRITE_REG_16(addr, value)  (*((volatile uint16_t*)(addr)) = (value))

#define SEC_GLB_RF_BASE             0x05b80000
#define SEC_RAM_REMAP               0x20

void bt_remap_test(void)
{
    uint8_t duty = 0,time=0;
    uint32_t tmp;
    dbg_uart_init();
    /*BT_RAM_REMAP: bit1~bit0: 0b10 Default*/
    /*bit0=0: 0x04010000~0x04017fff*/
    /*bit0=1: 0x060f8000~0x060fffff*/

    /*bit1=0: 0x04018000~0x0401ffff*/
    /*bit1=1: 0x06118000~0x0611ffff*/

    while(1)
    {
       tmp = SOC_READ_REG(SEC_GLB_RF_BASE+SEC_RAM_REMAP);
       iot_printf("bt_ram_remap:0x%x\r\n", tmp);

        for(duty = 0; duty <= 10; duty ++)
        {
            SOC_WRITE_REG(0x060f8000+duty*4, 0x12345678+duty);
            SOC_WRITE_REG_16(0x04010000+duty*2, 0xabcd+duty);
        }
        iot_printf("0x060f8000: ");
        for(duty = 0; duty <= 10; duty ++)
        {
            iot_printf("0x%x ",SOC_READ_REG(0x060f8000+duty*4));
        }
        iot_printf("\r\n0x04010000: ");
        for(duty = 0; duty <= 10; duty ++)
        {
            iot_printf("0x%x ",SOC_READ_REG_16(0x04010000+duty*2));
        }

       for(duty = 0; duty <= 10; duty ++)
        {
            SOC_WRITE_REG(0x06118000+duty*4, 0x87654321+duty);
            SOC_WRITE_REG_16(0x04018000+duty*2, 0xdcba+duty);
        }
        iot_printf("\r\n0x06118000: ");
        for(duty = 0; duty <= 10; duty ++)
        {
            iot_printf("0x%x ",SOC_READ_REG(0x06118000+duty*4));
        }
        iot_printf("\r\n0x04018000: ");
        for(duty = 0; duty <= 10; duty ++)
        {
            iot_printf("0x%x ",SOC_READ_REG_16(0x04018000+duty*2));
        }

        iot_printf("\r\n------------------------------------------------------------------\r\n");
        if(time==0)
          {tmp |= 0x3;time=1;}
        else if(time==1)
          {tmp &= 0xfffffffc;time=2;}
        else if(time==2)
          {tmp &= 0xfffffffc; tmp |= 0x1; time=3;}
        else if(time==3)
          {tmp &= 0xfffffffc; tmp |= 0x2; time=4;}
        else if(time==4)
          break;

        SOC_WRITE_REG(SEC_GLB_RF_BASE+SEC_RAM_REMAP, tmp);
     }
}

int main(void) {
    bt_remap_test();
    return 0;
}