/****************************************************************************

Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.

This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
be copied by any method or incorporated into another program without
the express written consent of Aerospace C.Power. This Information or any portion
thereof remains the property of Aerospace C.Power. The Information contained herein
is believed to be accurate and Aerospace C.Power assumes no responsibility or
liability for its use in any way and conveys no license or title under
any patent or copyright and makes no representation or warranty that this
Information is free from patent or copyright infringement.

****************************************************************************/

#ifndef _BB_CPU_MAC_ISR_H_
#define _BB_CPU_MAC_ISR_H_

/* os shim includes */
#include "os_types.h"
#include "mac_rf_isr.h"

#ifdef __cplusplus
extern "C" {
#endif

/* bb cpu to mac */
/* the reason of cpu1 trigger mac is tx done */
#define BB_CPU_TRIGGER_MAC_TX_DONE                     0
/* the reason of cpu1 trigger mac is rx done */
#define BB_CPU_TRIGGER_MAC_RX_DONE                     1
/* the reason of bb cpu trigger mac is need rx sack */
#define BB_CPU_TRIGGER_MAC_NEED_RX_SACK                2
/* the reason of bb cpu trigger mac is reset complete */
#define BB_CPU_TRIGGER_MAC_STOP_SCHE_COMPLETE          3
/* the reason of bb cpu trigger mac is rx abort complete */
#define BB_CPU_TRIGGER_MAC_RX_ABORT_COMPLETE           4
/* the reason of bb cpu trigger mac is backoff timeout, bbcpu is ready */
#define BB_CPU_TRIGGER_MAC_BBCPU_IS_READY              5
/* the reason of bb cpu trigger mac is tx abort complete */
#define BB_CPU_TRIGGER_MAC_TX_ABORT_COMPLETE           6
/* the reason of bb cpu trigger mac is cmdlist done complete */
#define BB_CPU_TRIGGER_MAC_CMSLIST_DONE                7
/* the reason of bb cpu trigger mac rx sack done */
#define BB_CPU_TRIGGER_MAC_RX_SACK_DONE                8

/**
* @brief bb_cpu_mac_isr_init() - initialize bb cpu mac isr interrupt.
*
* @param        none
*
* @return       none
*/
void bb_cpu_mac_isr_init(void);

/**
* @brief bb_cpu_mac_isr_start() - start bb cpu mac isr interrupt.
*
* @param        none
*
* @return       none
*/
void bb_cpu_mac_isr_start(void);

/**
* @brief bb_cpu_mac_isr_stop() - stop bb cpu mac isr interrupt.
*
* @param        none
*
* @return       none
*/
void bb_cpu_mac_isr_stop(void);

/**
* @brief bb_cpu_mac_isr_enable() - init enable isr.
*
* @param        none
*
* @return       none
*/
void bb_cpu_mac_isr_enable();

/**
* @brief bb_cpu_mac_set_sw_irq_to_maincpu()    - set sw irq to maincpu.
*
* @param id                         - irq id.
*
* @return       none
*/
void bb_cpu_mac_set_sw_irq_to_maincpu(uint8_t id);

/**
* @brief bb_cpu_mac_set_share_irq_to_maincpu() - set share irq to maincpu.
*
* @param id                         - irq id.
*
* @return       none
*/
void bb_cpu_mac_set_share_irq_to_maincpu(uint8_t id);

#ifdef __cplusplus
}
#endif

#endif // _BB_CPU_MAC_ISR_H_