/** * \file timing_alt.h * * \brief Portable interface to the CPU cycle counter * * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved * SPDX-License-Identifier: Apache-2.0 * * Licensed under the Apache License, Version 2.0 (the "License"); you may * not use this file except in compliance with the License. * You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * This file is part of mbed TLS (https://tls.mbed.org) */ #ifndef MBEDTLS_TIMING_ALT_H #define MBEDTLS_TIMING_ALT_H #if !defined(MBEDTLS_CONFIG_FILE) #include "mbedtls/config.h" #else #include MBEDTLS_CONFIG_FILE #endif #if defined(MBEDTLS_TIMING_ALT) /* Iotelic timing implementation */ #include "encoding.h" #include #ifdef __cplusplus extern "C" { #endif /** * \brief timer structure */ struct mbedtls_timing_hr_time { unsigned char opaque[32]; }; /** * \brief Context for mbedtls_timing_set/get_delay() */ typedef struct { struct mbedtls_timing_hr_time timer; uint32_t int_ms; uint32_t fin_ms; } mbedtls_timing_delay_context; extern volatile int mbedtls_timing_alarmed; /** * \brief Return the elapsed time in milliseconds * * \param val points to a timer structure * \param reset if set to 1, the timer is restarted */ unsigned long mbedtls_timing_get_timer( struct mbedtls_timing_hr_time *val, int reset ); /** * \brief Setup an alarm clock * * \param seconds delay before the "mbedtls_timing_alarmed" flag is set * * \warning Only one alarm at a time is supported. In a threaded * context, this means one for the whole process, not one per * thread. */ void mbedtls_set_alarm( int seconds ); /** * \brief Set a pair of delays to watch * (See \c mbedtls_timing_get_delay().) * * \param data Pointer to timing data * Must point to a valid \c mbedtls_timing_delay_context struct. * \param int_ms First (intermediate) delay in milliseconds. * \param fin_ms Second (final) delay in milliseconds. * Pass 0 to cancel the current delay. */ void mbedtls_timing_set_delay( void *data, uint32_t int_ms, uint32_t fin_ms ); /** * \brief Get the status of delays * (Memory helper: number of delays passed.) * * \param data Pointer to timing data * Must point to a valid \c mbedtls_timing_delay_context struct. * * \return -1 if cancelled (fin_ms = 0) * 0 if none of the delays are passed, * 1 if only the intermediate delay is passed, * 2 if the final delay is passed. */ int mbedtls_timing_get_delay( void *data ); // The mcycle counter is 64-bit counter, but since // Freedom E platforms use RV32, we must access it as // 2 32-bit registers. At 256MHz, the lower bits will // roll over approx. every 5 seconds, so we check for // rollover with this routine as suggested by the // RISC-V Priviledged Architecture Specification. #define rdmcycle(x) { \ uint32_t lo, hi, hi2; \ __asm__ __volatile__ ("1:\n\t" \ "csrr %0, mcycleh\n\t" \ "csrr %1, mcycle\n\t" \ "csrr %2, mcycleh\n\t" \ "bne %0, %2, 1b\n\t" \ : "=r" (hi), "=r" (lo), "=r" (hi2)) ; \ *(x) = lo | ((uint64_t) hi << 32); \ } /** * \brief Return the CPU cycle counter value * */ static inline unsigned long mbedtls_timing_hardclock( void ) { uint64_t mcycle; rdmcycle(&mcycle); return mcycle; } #ifdef __cplusplus } #endif #endif /* MBEDTLS_TIMING_ALT */ #endif /* MBEDTLS_TIMING_ALT_H */