/****************************************************************************

Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.

This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
be copied by any method or incorporated into another program without
the express written consent of Aerospace C.Power. This Information or any portion
thereof remains the property of Aerospace C.Power. The Information contained herein
is believed to be accurate and Aerospace C.Power assumes no responsibility or
liability for its use in any way and conveys no license or title under
any patent or copyright and makes no representation or warranty that this
Information is free from patent or copyright infringement.

****************************************************************************/
#ifndef _CPU_H
#define _CPU_H

#ifdef __cplusplus
extern "C" {
#endif

#define CPU_MHART_ID_INVALID    0xff

typedef enum {
    CPU_MHART_ID_0 = 0,
    CPU_MHART_ID_1,
    CPU_MHART_ID_2,

    CPU_MHART_ID_MAX,
} CPU_MHART_ID;

uint64_t cpu_get_mcycle();

uint32_t cpu_get_mhartid();

uint32_t cpu_get_clock();

void cpu_enable_irq(uint32_t mask);

uint32_t cpu_disable_irq();

#ifdef __cplusplus
}
#endif

#endif //_CPU_H