/**************************************************************************** Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED. This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT be copied by any method or incorporated into another program without the express written consent of Aerospace C.Power. This Information or any portion thereof remains the property of Aerospace C.Power. The Information contained herein is believed to be accurate and Aerospace C.Power assumes no responsibility or liability for its use in any way and conveys no license or title under any patent or copyright and makes no representation or warranty that this Information is free from patent or copyright infringement. ****************************************************************************/ #ifndef __ATE_MAIN_H #define __ATE_MAIN_H #include "os_types.h" #include "phy_cal.h" #pragma pack(push) /* save the pack status */ #pragma pack(1) /* 1 byte align */ #define ATE_TONE_3M (41) #define PHY_NF_RST_VAL (121) #define PHY_NF_RTY_CNT (10) #define PMU_ICCAL_NUM (32) /* ATE software version */ #define ATE_SW_VER ("SW_V1.0_20190221") #define ERR_BIT(a) (0x00000001<<(a)) // | 0x00000002) typedef enum _iot_ftm_result { ATE_TEST_OK = 0x01, ATE_TEST_FAIL = 0xFF, } iot_ftm_result_t; typedef enum _iot_ate_flags { ATE_FLAG_OK = 0x0, // TEST OK ATE_DDR_FAIL_FREQ = 0x1, // swtich cpu freqence failed ATE_DDR_FAIL_INIT = 0x2, // ddr training failed ATE_DDR_FAIL_BOND = 0x3, // ddr bond test ATE_FLASH_FAIL_BOND = 0x4, // flash bond test ATE_FLASH_FAIL_ID = 0x5, // flash id failed ATE_FLASH_FAIL_INIT = 0x6, // flash init failed ATE_FLASH_FAIL_QUAD = 0x7, // flash quad mode failed ATE_FLASH_FAIL_ERASE = 0x8, // flash erase failed ATE_FLASH_FAIL_PRGM = 0x9, // flash program failed ATE_FLASH_FAIL_READ = 0x10, // flash read failed } iot_ate_flags; /* ate total info structure: start from 0xfff8000 */ typedef struct _ate_info { uint8_t result; uint32_t ret_flag; uint16_t tx_dc[4]; uint16_t rx_dc[PHY_GAIN_STEP_MAX]; //PHY_GAIN_STEP_MAX = 85 int8_t csi_snr[16]; int8_t csi_amp[16]; uint8_t rx_band_filter[8]; uint32_t nf; int32_t doffset_avg;//0xfff80e3 int32_t dx_avg;//0xfff80e7 int32_t dy_avg;//0xfff80eb float vref;//0xfff80ef int32_t dc_offset;//0xfff80f3 int32_t ch1_adc3_v[PMU_ICCAL_NUM]; //PMU_ICCAL_NUM = 32,0xfff80f7 uint32_t cnt; uint8_t sw_version[22]; uint8_t mac[6]; uint32_t chip_id; uint32_t rsv[4];//0xfff8173 } ate_info_t; typedef struct _ate_loop_back_gain_list { int8_t tx_tone_att; int8_t tx_factor; uint8_t tx_pga_gain; uint8_t rx_pgf_gain; uint8_t rx_bq_gain; uint8_t rx_pga_gain; int8_t rx_gain_shift; uint8_t rx_lna_gain; } ate_loop_back_gain_list_t; #pragma pack(pop) /* restore the pack status */ #endif // !__ATE_MAIN_H