/**************************************************************************** Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED. This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT be copied by any method or incorporated into another program without the express written consent of Aerospace C.Power. This Information or any portion thereof remains the property of Aerospace C.Power. The Information contained herein is believed to be accurate and Aerospace C.Power assumes no responsibility or liability for its use in any way and conveys no license or title under any patent or copyright and makes no representation or warranty that this Information is free from patent or copyright infringement. ****************************************************************************/ #ifndef HW_REG_API_H #define HW_REG_API_H #include "os_types.h" #include "chip_reg_base.h" #ifdef __cplusplus extern "C" { #endif //#define MSVC_CHECK_REG #ifdef __GNUC__ #define SOC_READ_REG(addr) ((volatile uint32_t)*((volatile uint32_t*)(addr))) #define SOC_WRITE_REG(addr, value) (*((volatile uint32_t*)(addr)) = (value)) #else #ifdef MSVC_CHECK_REG #define SOC_READ_REG(addr) \ printf("r 0x%x\n", (addr))?0:0 #define SOC_WRITE_REG(addr, value) \ printf("w 0x%x = 0x%x\n", (addr), (value)) #else #define SOC_READ_REG(addr) (0) #define SOC_WRITE_REG(addr, value) (void)(0) #endif #endif #define REG_FIELD_GET(name, dword) ((dword & name##_MASK) >> name##_OFFSET) #define REG_FIELD_SET(name, dword, value) \ do { \ (dword) &= ~name##_MASK; \ (dword) |= (((value) << name##_OFFSET) & name##_MASK); \ } while(0) // 输出参数个数/2 #define __REG_N_FIELD__(...) __REG_N_FIELD_(__VA_ARGS__, __FIELD_RSEQ_N()) // 输出第66个参数 #define __REG_N_FIELD_(...) __REG_FIELD_N(__VA_ARGS__) // 输出第N个参数，至少需要66个参数 #define __REG_FIELD_N(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, _12, \ _13, _14, _15, _16, _17, _18, _19, _20, _21, _22, _23, \ _24, _25, _26, _27, _28, _29, _30, _31, _32, _33, _34, \ _35, _36, _37, _38, _39, _40, _41, _42, _43, _44, _45, \ _46, _47, _48, _49, _50, _51, _52, _53, _54, _55, _56, \ _57, _58, _59, _60, _61, _62, _63, _64, N, ...) \ N // 定义66个参数 #define __FIELD_RSEQ_N() \ 32, 32, 31, 31, 30, 30, 29, 29, 28, 28, 27, 27, 26, 26, 25, 25, 24, 24, \ 23, 23, 22, 22, 21, 21, 20, 20, 19, 19, 18, 18, 17, 17, 16, 16, 15, \ 15, 14, 14, 13, 13, 12, 12, 11, 11, 10, 10, 9, 9, 8, 8, 7, 7, 6, 6, 5, \ 5, 4, 4, 3, 3, 2, 2, 1, 1, 0, 0, // 连接字符 #define CONCATENATE(arg1, arg2) arg1##arg2 // 改写一个区域的值 需要结构体类型有 _b 变量 #define WR_FIELD_1(bitfield, val) __x._b.bitfield = val; // 改写两个区域的值，以此类推 #define WR_FIELD_2(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_1(__VA_ARGS__); \ } #define WR_FIELD_3(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_2(__VA_ARGS__); \ } #define WR_FIELD_4(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_3(__VA_ARGS__); \ } #define WR_FIELD_5(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_4(__VA_ARGS__); \ } #define WR_FIELD_6(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_5(__VA_ARGS__); \ } #define WR_FIELD_7(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_6(__VA_ARGS__); \ } #define WR_FIELD_8(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_7(__VA_ARGS__); \ } #define WR_FIELD_9(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_8(__VA_ARGS__); \ } #define WR_FIELD_10(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_9(__VA_ARGS__); \ } #define WR_FIELD_11(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_10(__VA_ARGS__); \ } #define WR_FIELD_12(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_11(__VA_ARGS__); \ } #define WR_FIELD_13(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_12(__VA_ARGS__); \ } #define WR_FIELD_14(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_13(__VA_ARGS__); \ } #define WR_FIELD_15(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_14(__VA_ARGS__); \ } #define WR_FIELD_16(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_15(__VA_ARGS__); \ } #define WR_FIELD_17(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_16(__VA_ARGS__); \ } #define WR_FIELD_18(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_17(__VA_ARGS__); \ } #define WR_FIELD_19(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_18(__VA_ARGS__); \ } #define WR_FIELD_20(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_19(__VA_ARGS__); \ } #define WR_FIELD_21(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_20(__VA_ARGS__); \ } #define WR_FIELD_22(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_21(__VA_ARGS__); \ } #define WR_FIELD_23(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_22(__VA_ARGS__); \ } #define WR_FIELD_24(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_23(__VA_ARGS__); \ } #define WR_FIELD_25(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_24(__VA_ARGS__); \ } #define WR_FIELD_26(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_25(__VA_ARGS__); \ } #define WR_FIELD_27(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_26(__VA_ARGS__); \ } #define WR_FIELD_28(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_27(__VA_ARGS__); \ } #define WR_FIELD_29(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_28(__VA_ARGS__); \ } #define WR_FIELD_30(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_29(__VA_ARGS__); \ } #define WR_FIELD_31(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_30(__VA_ARGS__); \ } #define WR_FIELD_32(f, val, ...) \ { \ WR_FIELD_1(f, val); \ WR_FIELD_31(__VA_ARGS__); \ } // 改写寄存器结构体的N个区域，用法为 WR_REG_FIELD_(改写区域个数,寄存器值,区域1名称,区域1值,区域2名称,区域2值,...) #define WR_REG_FIELD_(N, reg, ...) \ ({ \ typeof(reg) __x = reg; \ CONCATENATE(WR_FIELD_, N)(__VA_ARGS__); \ reg = __x; \ }) /** * WR_REG_FIELD(reg, field1, val1, field2, val2, field3, val3, ...) * 这个宏会根据参数个数自动推断需要改写的区域个数 */ #define WR_REG_FIELD(reg, ...) \ WR_REG_FIELD_(__REG_N_FIELD__(reg, __VA_ARGS__), reg, __VA_ARGS__) // 读取寄存器的指定区域 #define RE_REG_FIELD(reg, bitfield) \ ({ \ typeof(reg) __x = reg; \ __x._b.bitfield; \ }) #ifdef __cplusplus } #endif #endif // !HW_REG_API_H