185 lines
4.9 KiB
C
185 lines
4.9 KiB
C
/****************************************************************************
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Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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be copied by any method or incorporated into another program without
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the express written consent of Aerospace C.Power. This Information or any portion
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thereof remains the property of Aerospace C.Power. The Information contained herein
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is believed to be accurate and Aerospace C.Power assumes no responsibility or
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liability for its use in any way and conveys no license or title under
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any patent or copyright and makes no representation or warranty that this
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Information is free from patent or copyright infringement.
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****************************************************************************/
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#include "chip_reg_base.h"
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#include "hw_reg_api.h"
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#include "iot_bitops.h"
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#include "os_lock.h"
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#include "os_utils.h"
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#include "iot_config.h"
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#include "ahb_rf.h"
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#include "sram.h"
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#include "ahb.h"
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#include "flash.h"
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#include "sfc.h"
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#include "sec_glb.h"
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#if HW_PLATFORM > HW_PLATFORM_SIMU
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#include "dbg_io.h"
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#endif
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#include "iot_io.h"
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void cache_rst() {
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sec_glb_enable(SEC_GLB_EMC);
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ahb_cache_disable();
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flash_init(1);
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ahb_cache_enable();
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ahb_cache_reset();
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}
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void cache_write_read_all()
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{
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int i = 0, j = 0, k = 0;
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uint32_t wdata[0x40] = {0};
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uint32_t tmp;
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int len = 0x40;
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int offset = 0;
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int atom = 0x10;
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//int atom = 0x4000; // 16KB
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int times = 0x1FFF;
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// write cache
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uint32_t *dcache = (uint32_t *) 0x03000000;
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uint32_t *rcache = (uint32_t *) 0x03000000;
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for( j = 0; j < times; j++) {
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// write cache
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for ( i = 0; i < len; i++ ) {
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wdata[i] = i;
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*(dcache+offset+i) = wdata[i];
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for(k=0; k< 100; k++);
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}
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// read dcache
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for ( i = 0; i < len; i++ ) {
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tmp = *(rcache+offset+i);
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if ( tmp != wdata[i] ) {
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iot_printf("dcache not equal \r\n");
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iot_printf(" j : %d, i : %d\r\n", j, i);
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iot_printf("addr: %08x read: %08x, write: %08x\r\n",
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0x13000000+i*4+j, tmp, wdata[i]);
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return ;
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}
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for(k=0; k< 100; k++);
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}
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offset += atom;
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}
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}
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void cache_write_read()
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{
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int i = 0, j = 0, k = 0;
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uint32_t wdata[0x50][0x10] = {0};
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int len = 0x10;
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int offset = 0;
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int atom = 0x4000; // 16KB
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uint32_t tmp;
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uint32_t ran_pos = 0;
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uint32_t *dcache = (uint32_t *) 0x13000000;
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uint32_t *rcache = (uint32_t *) 0x13000000;
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iot_printf("write and read loop test\n");
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for( j = 0; j < 0x50; j++) {
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// write cache
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for ( i = 0; i < len; i++ ) {
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wdata[j][i] = 1;
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*(dcache+offset+i*4) = wdata[j][i];
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for(k=0; k< 300; k++);
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}
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for ( i = 0; i < len; i++ ) {
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tmp = *(rcache+offset+i*4 + ran_pos);
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if ( tmp != wdata[j][i] ) {
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iot_printf(" not equal \r\n");
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iot_printf(" j : %d, i : %d\r\n", j, i);
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iot_printf("addr: %08x read: %08x, write: %08x\r\n",
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0x13000000+i*4+j, tmp, wdata[j][i]);
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return ;
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}
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for(k=0; k< 300; k++);
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}
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offset += atom;
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}
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}
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void cache_write_read_byte()
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{
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uint8_t *code = (uint8_t *) 0x13000000;
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uint8_t *data = (uint8_t *) 0x13020000;
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uint8_t tmp = 0;
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int i = 0, j = 0;
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iot_printf("byte write and read test\n");
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iot_printf("range of 0x13000000 - 0x13060000\n");
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iot_printf("write code to 5a\r\n");
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for (i = 0; i < 0x20000; i++) {
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*(code+i) = 0x5a;
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for(j = 0; j < 100; j++);
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if ( i % 0x100 == 0 ) {
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iot_printf("i: %08x\r\n", i);
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}
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}
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iot_printf("write code to a5\r\n");
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for (i = 0; i < 0x40000; i++) {
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*(data+i) = 0x11;
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for(j = 0; j < 100; j++);
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if ( i % 0x100 == 0 ) {
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iot_printf("i: %08x\r\n", i);
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}
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}
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// read
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for (i = 0; i < 0x20000; i++) {
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tmp = *(code+i);
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if ( tmp != 0x5a ) {
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iot_printf("error: i: %08x\r\n", i);
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return ;
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}
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if ( i % 0x100 == 0 ) {
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iot_printf("read: %08x\r\n", i);
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}
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}
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for (i = 0; i < 0x40000; i++) {
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tmp = *(data+i);
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if ( tmp != 0x11 ) {
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iot_printf("error: i: %08x\r\n", i);
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return ;
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}
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if ( i % 0x100 == 0 ) {
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iot_printf("read: %08x\r\n", i);
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}
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}
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}
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void cache_test(){
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dbg_uart_init();
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/* rst sfc */
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cache_rst();
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cache_write_read_byte();
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cache_write_read();
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cache_write_read_all();
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iot_printf("end............\n");
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while(1);
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}
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#ifdef __GNUC__
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int main(void) {
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cache_test();
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return 0;
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}
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#endif // __GCC__
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