114 lines
4.0 KiB
C
Executable File
114 lines
4.0 KiB
C
Executable File
#define ADA_BASEADDR 0x52200000
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#define AHB_BUSMON0_BASEADDR 0x55D00000
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#define AHB_BUSMON1_BASEADDR 0x55E00000
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#define AHB_BUSMON2_BASEADDR 0x55F00000
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#define AHB_RF_BASEADDR 0x50000000
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#define AI_GLB_BASEADDR 0x70000000
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#define ANA_DIG_WRAP_RF_BASEADDR 0x44011000
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#define ANA_PMU_WRAP_RF_BASEADDR 0x9000f000
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#define AP_CLK_CORE_RF_BASEADDR 0x44009000
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#define APB_GLB_BASEADDR 0x44000000
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#define AUDIO_FFT_RF0_BASEADDR 0x56600000
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#define AUDIO_FFT_RF1_BASEADDR 0x45000000
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#define AUDIO_WAKEUP_BASEADDR 0x4402F000
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#define RGF_CHOL0_BASEADDR 0x55700000
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#define RGF_CHOL1_BASEADDR 0x56700000
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#define RGF_CMM0_BASEADDR 0x56100000
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#define RGF_CMM1_BASEADDR 0x56800000
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#define CNN_BASEADDR 0x71000000
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#define DDR_RF_BASEADDR 0x55228000
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#define DMA_HW_RF_BASEADDR 0x44012000
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#define DMA_SW_RF_BASEADDR 0x55400000
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#define DMC_RF_BASEADDR 0x5522A000
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#define DSI_CTRL_RF_BASEADDR 0x55C10000
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#define DVP_RF0_BASEADDR 0x52300000
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#define DVP_RF1_BASEADDR 0x52400000
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#define DVP_RF2_BASEADDR 0x52500000
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#define DVP_RF3_BASEADDR 0x52600000
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#define EFUSE_DIG_BASEADDR 0x9000E800
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#define RGF_EIG0_BASEADDR 0x56200000
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#define RGF_EIG1_BASEADDR 0x56900000
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#define EPARSER_BASEADDR 0x56000000
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#define FMST_RF_BASEADDR 0x44019000
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#define RGF_FISHEYE_BASEADDR 0x55600000
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#define G3_BASEADDR 0x51e00000
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#define GMAC_1000M_BASEADDR 0x54A00000
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#define GMAC_BASEADDR 0x53000000
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#define GTMR0_BASEADDR 0x44003000
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#define GTMR1_BASEADDR 0x62020000
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#define GTMR2_BASEADDR 0x4402B000
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#define GTMR3_BASEADDR 0x90003000
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#define GPIO_MTX_BASEADDR 0x44020000
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#define GPIO_BASEADDR 0x44002000
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#define GPIOA_BASEADDR 0x9000e000
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#define I2C0_BASEADDR 0x44023000
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#define I2C1_BASEADDR 0x44024000
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#define I2C2_BASEADDR 0x44028000
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#define I2C_SLAVE0_BASEADDR 0x44029000
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#define I2C_SLAVE1_BASEADDR 0x90004000
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#define I2S0_BASEADDR 0x4401C000
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#define I2S1_BASEADDR 0x4401D000
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#define I2S2_BASEADDR 0x4401E000
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#define I2S3_BASEADDR 0x4401F000
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#define I2S4_BASEADDR 0x4402D000
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#define INTC0_BASEADDR 0x44004000
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#define INTC1_BASEADDR 0x62030000
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#define INTC2_BASEADDR 0x4402C000
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#define INTC3_BASEADDR 0x90004800
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#define K3D_BASEADDR 0x72000000
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#define LEDC_BASEADDR 0x44026000
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#define RGF_HWQ_BASEADDR 0x51002000
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#define MAC_INT_BASEADDR 0x00000000
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#define RGF_RAW_BASEADDR 0x51004000
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#define RGF_RX_BASEADDR 0x51003000
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#define RGF_MAC_BASEADDR 0x51000000
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#define RGF_TMR_BASEADDR 0x51001000
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#define MAIL_BOX_NEW_RF_BASEADDR 0x55100000
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#define DPHY_DIG_RF_BASEADDR 0x55C00000
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#define MPTX_GLB_BASEADDR 0x55c40000
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#define NDFC_RF_BASEADDR 0x55300000
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#define PHY_ANA_BASEADDR 0x51D00000
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#define PHY_DFE_BASEADDR 0x51C00000
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#define PHY_INT_BASEADDR 0x00000000
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#define PHY_BASEADDR 0x51800000
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#define PHY_RX_FD_BASEADDR 0x51B00000
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#define PHY_RXTD_BASEADDR 0x51A00000
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#define PHY_TX_BASEADDR 0x51900000
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#define PIN_RF_BASEADDR 0x44007000
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#define PIN_RF_A_BASEADDR 0x9000d800
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#define PMAGIC_RF_BASEADDR 0x90018000
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#define PMU_RF_BASEADDR 0x90008000
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#define PWM_NEW0_BASEADDR 0x44013000
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#define PWM_NEW1_BASEADDR 0x44014000
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#define PWM_NEW2_BASEADDR 0x44015000
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#define PWM_NEW3_BASEADDR 0x44016000
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#define PWM_NEW4_BASEADDR 0x44017000
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#define PWM_NEW5_BASEADDR 0x44018000
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#define RTC_TMR_BASEADDR 0x9000d000
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#define RX_CORE_RF_BASEADDR 0x55B00000
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#define SADC0_BASEADDR 0x90007000
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#define SADC1_BASEADDR 0x90007800
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#define SADC_PWM_BASEADDR 0x90003800
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#define RGF_SDIO_BASEADDR 0x55900000
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#define SEC_GLB_RF_BASEADDR 0x62000000
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#define SEC_SYS_RF_BASEADDR 0x60000000
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#define SFC_RF_BASEADDR 0x61000100
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#define SMC_RF_BASEADDR 0x61000200
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#define SNAPSHOT_RF_BASEADDR 0x55000000
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#define SPI0_BASEADDR 0x4400A000
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#define SPI1_BASEADDR 0x4400B000
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#define SPI2_BASEADDR 0x4400C000
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#define SPINLOCK_TOP_BASEADDR 0x4402e000
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#define RGF_TRANSPOSE_BASEADDR 0x55800000
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#define TX_CORE_RF_BASEADDR 0x55C20000
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#define APB_UART0_BASEADDR 0x44001000
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#define APB_UART1_BASEADDR 0x44005000
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#define APB_UART2_BASEADDR 0x44006000
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#define APB_UART3_BASEADDR 0x44010000
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#define WDG0_BASEADDR 0x4400e000
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#define WDG1_BASEADDR 0x62010000
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#define WDG2_BASEADDR 0x4402A000
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#define WDG3_BASEADDR 0x90005000
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#define WDG4_BASEADDR 0x90010000
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#define PWM_BASEADDR 0xFFFFFF00
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