186 lines
5.0 KiB
C
Executable File
186 lines
5.0 KiB
C
Executable File
/****************************************************************************
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Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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be copied by any method or incorporated into another program without
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the express written consent of Aerospace C.Power. This Information or any portion
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thereof remains the property of Aerospace C.Power. The Information contained herein
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is believed to be accurate and Aerospace C.Power assumes no responsibility or
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liability for its use in any way and conveys no license or title under
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any patent or copyright and makes no representation or warranty that this
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Information is free from patent or copyright infringement.
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****************************************************************************/
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#ifndef RESET_H
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#define RESET_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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MAC_RST_REASON_COLD,
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MAC_RST_REASON_WARM,
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} MAC_RST_REASON_ID;
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typedef enum {
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CONT_RX_ABORT4,
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PHY_TX_HANG,
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} MAC_PHY_RESET_REASON;
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/* 40 ticks for 1ms if 0.040us units for each tick */
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#define TICKS_MS 25000 // 1000us / 0.04us
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#define MAC_PHY_IDLE_STS 0
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#define MAC_PHY_RX_STS 1
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#define MAC_PHY_TX_STS 2
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#define MAC_PHY_UNKNOW_STS 3
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#define MAC_RX_LISTEN_STS (0 << 15)
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#define MAC_RX_FC_STS (1 << 15)
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#define MAC_RX_PLD_STS (2 << 15)
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#define MAC_TX_CCA_WAIT_STS (4 << 15)
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#define MAC_DO_NOT_BBAI_STS (5 << 15)
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/* 0x320 : cfg_mac_dbg_bus_sel[11:8]=3
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* cfg_mac_dbg_bus_sel[7:5]=1
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*/
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#define MAC_DEBUG_VALUE_320 0x320
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/* 0x2 : cfg_mac_dbg_bus_sel[11:8]=0
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* cfg_mac_dbg_bus_sel[6:4]=0
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* cfg_mac_dbg_bus_sel[1]=1
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*/
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#define MAC_DEBUG_VALUE_2 0x2
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/* 0x12 : cfg_mac_dbg_bus_sel[11:8]=0
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* cfg_mac_dbg_bus_sel[6:4]=1
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* cfg_mac_dbg_bus_sel[1]=1
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*/
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#define MAC_DEBUG_VALUE_12 0x12
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/* 0x22 : cfg_mac_dbg_bus_sel[11:8]=0
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* cfg_mac_dbg_bus_sel[6:4]=2
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* cfg_mac_dbg_bus_sel[1]=1
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*/
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#define MAC_DEBUG_VALUE_22 0x22
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/* 0x32 : cfg_mac_dbg_bus_sel[11:8]=0
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* cfg_mac_dbg_bus_sel[6:4]=3
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* cfg_mac_dbg_bus_sel[1]=1
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*/
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#define MAC_DEBUG_VALUE_32 0x32
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/* mac_dbg_bus[17:15] */
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#define MAC_DEBUG_VALUE_MASK_BIT_15_17 0x38000
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/* mac_dbg_bus[18:13] */
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#define MAC_DEBUG_VALUE_MASK_BIT_13_18 0x7E000
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/* mac wait tx idle time ms */
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#define MAC_WAIT_TX_IDLE_TIEM_MS 40 //40ms
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/* stop vdev trigger stop schedule */
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#define MAC_TX_HANG_STATUS_1 1
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/* switch band trigger stop schedule */
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#define MAC_TX_HANG_STATUS_2 2
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/* poweroff trigger stop schedule */
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#define MAC_TX_HANG_STATUS_3 3
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/* updata beacon trigger stop schedule */
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#define MAC_TX_HANG_STATUS_4 4
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/* power recover trigger stop schedule */
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#define MAC_TX_HANG_STATUS_5 5
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#define MACC_TX_HANG_STATUS_MAX 0xff
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/* reset mac API */
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void mac_reset(MAC_RST_REASON_ID rst_reason);
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/* warm reset hold */
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void warm_rst_mac_hold();
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/* warm reset release */
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void warm_rst_mac_release();
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/* reset mac or bb for WAR HW issue */
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void mac_warm_reset_war(uint32_t flag);
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void mac_set_sw_idle_mode(uint32_t ena, uint32_t is_idle);
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uint32_t mac_wait_phy_txrx_idle();
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void mac_force_phy_tx_ready(uint32_t ena, uint32_t is_force_ready);
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void mac_tx_wait_all_queue_idle();
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void mac_cfg_reg_reset();
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void mac_sw_trig_need_en(bool_t ena);
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void mac_sw_trig_start(bool_t ena);
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void mac_dma_ckl_sel(bool_t ena);
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/**
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* @brief mac_get_phy_txrx_sts - get phy txrx status.
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* @param null
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*/
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uint32_t mac_get_phy_txrx_sts();
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/**
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* @brief mac_set_sts_idle - mac set status to idle.
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* @param null
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*/
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uint32_t mac_set_sts_idle();
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/**
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* @brief mac_free_sts_idle - mac free status to idle.
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* @param null
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*/
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uint32_t mac_free_sts_idle();
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/**
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* @brief mac_dbg_bus_get_mac_sts - mac_dbg_bus_get_mac_sts.
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* @param value - value
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* @param mask - mask
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* @return 0
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*/
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uint32_t mac_dbg_bus_get_mac_sts(uint32_t value, uint32_t mask);
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/**
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* @brief mac_set_pcs_busy - mac set pcs busy.
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* @param enable : enable
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* @param value : value
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* @return 0
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*/
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uint32_t mac_set_pcs_busy(uint32_t enable, uint32_t value);
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/**
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* @brief mac_set_fc_crc_done - mac set fc crc done.
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* @param enable : enable
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* @param value : value
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* @return 0
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*/
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uint32_t mac_set_fc_crc_done(uint32_t enable, uint32_t value);
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/**
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* @brief mac_set_reg_tx_abort_debug_value - mac set reg tx abort debug value.
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not rx abort and keep the scene.
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* @return 0
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*/
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uint32_t mac_set_reg_tx_abort_debug_value();
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/**
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* @brief mac_force_mac_phy_interface - mac force mac phy interface
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* entry tx ready status.
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* @param value : 0/1
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* @return 0
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*/
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uint32_t mac_force_mac_phy_interface(uint32_t value);
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#ifdef __cplusplus
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}
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#endif
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#endif // !RESET_H
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