173 lines
5.1 KiB
C
173 lines
5.1 KiB
C
/****************************************************************************
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Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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be copied by any method or incorporated into another program without
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the express written consent of Aerospace C.Power. This Information or any portion
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thereof remains the property of Aerospace C.Power. The Information contained herein
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is believed to be accurate and Aerospace C.Power assumes no responsibility or
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liability for its use in any way and conveys no license or title under
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any patent or copyright and makes no representation or warranty that this
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Information is free from patent or copyright infringement.
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****************************************************************************/
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#ifndef MAC_ISR_H
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#define MAC_ISR_H
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/* os shim includes */
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#include "os_types.h"
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/* driver includes */
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#include "iot_irq.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* BEACON */
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/* generate before TBTT, should happen at next_tbtt - cfg_bcn_alert_ahead */
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#define MAC_ISR_BC_ALERT_ID 0
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/* generate when cfg number bcn missed, or a period of time without bcn seen */
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#define MAC_ISR_BC_MISS_ID 1
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/* generate when self's beacon received */
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#define MAC_ISR_BC_RX_ID 2
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/* SCHEDULER */
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/* generate when HW scheduler stop done */
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#define MAC_ISR_SCH_STOP_ID 3
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/* TX */
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/* when sw disable the hwq, hwq need to complete the current transmit, after
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* it done, generate this INT.
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*/
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#define MAC_ISR_HWQ_STOP_ID 4
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/* generate when a mpdu tx complete */
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#define MAC_ISR_MPDU_TX_COMP_ID 5
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/* generate when a list of mpdus tx complete */
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#define MAC_ISR_MPDU_LIST_TX_COMP_ID 6
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/* generate when HW read tx start desc err */
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#define MAC_ISR_START_DESC_ERR_ID 7
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/* generate when HW read tx end desc err */
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#define MAC_ISR_END_DESC_ERR_ID 8
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/* generate when HW read pb desc err */
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#define MAC_ISR_TX_UNDERRUN_ID 9
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/* RX */
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/* generate when a mpdu rx complete */
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#define MAC_ISR_MPDU_RX_ID 10
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/* generate when a pb rx complete */
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#define MAC_ISR_PB_RX_ID 11
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/* generate when a fc rx complete */
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#define MAC_ISR_FC_RX_ID 12
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/* generate when RX buf is run out for the desc */
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#define MAC_ISR_RX_DESC_OVERFLOW_ID 13
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/* generate when RX buf is not enough for the payload */
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#define MAC_ISR_RX_LOAD_OVERFLOW_ID 14
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/* RX ring buf num is under water mark */
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#define MAC_ISR_RX_LOW_WATERMARK_ID 15
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/* keep this the same as the last valid ISR ID */
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#define MAC_ISR_MAX_ID 15
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/* mac isr ext1 zc capture id */
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#define MAC_ISR_EXT1_ZC0_CAP_ID 0
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#define MAC_ISR_EXT1_ZC1_CAP_ID 1
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#define MAC_ISR_EXT1_ZC2_CAP_ID 2
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#define MAC_ISR_EXT1_ZC3_CAP_ID 3
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#define MAC_ISR_EXT1_ZC4_CAP_ID 4
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#define MAC_ISR_EXT1_ZC5_CAP_ID 5
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/* keep this the same as the last valid ISR EXT1 ID */
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#define MAC_ISR_EXT1_MAX_ID 5
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/* function callback to receive dsr from ISR context.
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* @dsr: list of dsr id to be set. See MAC_DSR_XXX
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* @cnt: number of ids in the list
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*/
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typedef void (*dsr_notification_func_t)(uint8_t *dsr, uint8_t cnt);
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typedef struct _mac_isr_ctx {
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/* irq handler for HAL_VECTOR_MAC_0 */
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iot_irq_t isr_0_h;
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/* irq handler for HAL_VECTOR_MAC_1 */
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iot_irq_t isr_1_h;
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/* irq handler for HAL_VECTOR_MAC_2 */
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iot_irq_t isr_2_h;
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/* irq handler for HAL_VECTOR_MAC_3 */
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iot_irq_t isr_3_h;
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/* interrupt mask reg cache */
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uint32_t isr_mask;
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/* callback to receive dsr events */
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dsr_notification_func_t dsr_callback;
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} mac_isr_ctx_t;
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/*
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* mac_isr_init() - mac interrupt service init
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* callback: function callback to receive the dsr from ISR context.
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*/
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void mac_isr_init(dsr_notification_func_t callback);
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/*
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* mac_isr_start() - start mac interrupt service. after this call, interrupt
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* service will be enabled.
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*/
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void mac_isr_start();
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/*
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* mac_isr_stop() - start mac interrupt service. after this call, interrupt
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* service will be disabled.
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*/
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void mac_isr_stop();
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/*
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* mac_isr_enable() - enable speficied mac interrupt.
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* @id: mac interrupt id to be enabled. see MAC_ISR_XXX
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*/
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void mac_isr_enable(uint8_t id);
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/*
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* mac_isr_disable() - disable speficied mac interrupt.
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* @id: mac interrupt id to be disabled. see MAC_ISR_XXX
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*/
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void mac_isr_disable(uint8_t id);
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/*
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* mac_isr_ext1_enable() - enable speficied mac ext1 interrupt.
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* @id: mac interrupt id to be enabled. see MAC_ISR_EXT1_XXX
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*/
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void mac_isr_ext1_enable(uint8_t id);
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/*
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* mac_isr_ext1_disable() - disable speficied mac ext1 interrupt.
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* @id: mac interrupt id to be disabled. see MAC_ISR_EXT1_XXX
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*/
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void mac_isr_ext1_disable(uint8_t id);
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void mac_timer_ctxt();
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/*
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* mac_isr_clear() - clear speficied mac interrupt.
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* @isr_evt: - mac interrupt id to be clear. see MAC_ISR_XXX
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*/
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void mac_isr_clear(uint32_t isr_evt);
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#ifdef __cplusplus
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}
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#endif
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#endif /* MAC_ISR_H */
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