415 lines
13 KiB
C
Executable File
415 lines
13 KiB
C
Executable File
/****************************************************************************
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Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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be copied by any method or incorporated into another program without
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the express written consent of Aerospace C.Power. This Information or any portion
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thereof remains the property of Aerospace C.Power. The Information contained herein
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is believed to be accurate and Aerospace C.Power assumes no responsibility or
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liability for its use in any way and conveys no license or title under
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any patent or copyright and makes no representation or warranty that this
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Information is free from patent or copyright infringement.
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****************************************************************************/
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#include "phy_status.h"
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#include "phy_bb.h"
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#include "hw_tonemask.h"
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#include "hw_reg_api.h"
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#include "phy_dfe_reg.h"
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#include "phy_tx_reg.h"
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#include "phy_reg.h"
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#include "phy_ana.h"
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#include "phy_txrx_pwr.h"
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#include "hw_phy_api.h"
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#include "mac_sys_reg.h"
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#include "granite_reg.h"
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#include "iot_io_api.h"
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#include "iot_dbglog_api.h"
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#include "iot_dbglog.h"
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/* 30 minutes period, uint 10 mimutes */
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#define PHY_PERIOD_30_MIN 3
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/* 60 minutes period, uint 10 mimutes */
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#define PHY_PERIOD_60_MIN 6
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static uint8_t g_phy_period_30_min_cnt = 0, g_phy_period_60_min_cnt = 0;
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uint32_t phy_get_rx_dc()
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{
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#if HW_PLATFORM >= HW_PLATFORM_FPGA
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volatile uint16_t dc_pgf = 0;
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volatile uint16_t dc_pga = 0;
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/* scan each gain */
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uint8_t i;
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for(i = 0; i < 8; i++)
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{
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phy_pgf_pga_dc_cal_get(i+77, &dc_pgf, &dc_pga);
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g_phy_ctxt.dep.phy_status.gain_dc.rx_dc_pga[i] = dc_pga;
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g_phy_ctxt.dep.phy_status.gain_dc.rx_dc_pga[i] = dc_pga;
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}
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#endif
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return 0;
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}
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/* dc comp */
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void phy_dc_comp_gain_get(volatile uint16_t *gain0, volatile uint16_t *gain1,
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volatile uint16_t *gain2, volatile uint16_t *gain3)
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{
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#if HW_PLATFORM >= HW_PLATFORM_FPGA
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uint32_t tmp = 0;
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tmp = PHY_DFE_READ_REG(CFG_BB_DC_COMP0_ADDR);
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*gain0 = (uint16_t)REG_FIELD_GET(SW_DC_COMP_GAIN0, tmp);
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*gain1 = (uint16_t)REG_FIELD_GET(SW_DC_COMP_GAIN1, tmp);
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tmp = PHY_DFE_READ_REG(CFG_BB_DC_COMP1_ADDR);
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*gain2 = (uint16_t)REG_FIELD_GET(SW_DC_COMP_GAIN2, tmp);
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*gain3 = (uint16_t)REG_FIELD_GET(SW_DC_COMP_GAIN3, tmp);
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#else
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(void)gain0;
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(void)gain1;
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(void)gain2;
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(void)gain3;
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#endif
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}
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uint32_t phy_get_tx_dc()
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{
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#if HW_PLATFORM >= HW_PLATFORM_FPGA
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volatile uint16_t tx_dc_gain0 = 0;
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volatile uint16_t tx_dc_gain1 = 0;
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volatile uint16_t tx_dc_gain2 = 0;
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volatile uint16_t tx_dc_gain3 = 0;
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phy_dc_comp_gain_get(&tx_dc_gain0, &tx_dc_gain1,\
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&tx_dc_gain2, &tx_dc_gain3);
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g_phy_ctxt.dep.phy_status.gain_dc.tx_dc[0] = tx_dc_gain0;
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g_phy_ctxt.dep.phy_status.gain_dc.tx_dc[1] = tx_dc_gain1;
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g_phy_ctxt.dep.phy_status.gain_dc.tx_dc[2] = tx_dc_gain2;
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g_phy_ctxt.dep.phy_status.gain_dc.tx_dc[3] = tx_dc_gain3;
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#endif
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return 0;
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}
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uint32_t phy_add_dc_cal_cnt()
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{
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g_phy_ctxt.dep.phy_status.dc_cal_cnt++;
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return 0;
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}
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uint32_t phy_get_dc_cal_cnt()
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{
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return g_phy_ctxt.dep.phy_status.dc_cal_cnt;
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}
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uint32_t IRAM_ATTR phy_add_overstress_cnt()
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{
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g_phy_ctxt.indep.ovs_ctxt.os_cnt++;
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g_phy_ctxt.indep.ovs_ctxt.no_ovs_cnt = 0;
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return 0;
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}
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uint32_t phy_get_overstress_cnt()
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{
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return g_phy_ctxt.indep.ovs_ctxt.os_cnt;
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}
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uint32_t phy_get_periodic_fc_err_num()
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{
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return g_phy_ctxt.dep.phy_status.phy_rx_cnt.phy_rx_fc_fail_cnt_clr;
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}
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uint32_t phy_get_rxtd_reg_tx_pkt()
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{
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iot_phy_sts_info_t pkt_sts;
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phy_sts_get(&pkt_sts);
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g_phy_ctxt.dep.phy_status.phy_rx_cnt.phy_rx_fc_ok_cnt = \
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pkt_sts.fc_crc_ok_cnt;
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g_phy_ctxt.dep.phy_status.phy_rx_cnt.phy_rx_fc_fail_cnt = \
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pkt_sts.fc_crc_fail_cnt;
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g_phy_ctxt.dep.phy_status.phy_rx_cnt.phy_rx_pld_ok_cnt = \
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pkt_sts.pld_crc_ok_cnt;
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g_phy_ctxt.dep.phy_status.phy_rx_cnt.phy_rx_pld_fail_cnt = \
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pkt_sts.pld_crc_fail_cnt;
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g_phy_ctxt.dep.phy_status.phy_rx_cnt.phy_rx_pkt_cnt = \
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pkt_sts.sync_ok_cnt;
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g_phy_ctxt.dep.phy_status.phy_tx_pkt_cnt = pkt_sts.mac_tx_ok_cnt;
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return 0;
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}
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uint32_t phy_get_granite_reg()
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{
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uint32_t i;
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uint8_t rodata = 0;
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uint32_t rdata = 0;
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for(i = 0; i < 11; i++)
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{
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phy_ana_i2c_read(i, &rdata, &rodata);
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g_phy_ctxt.dep.phy_status.granite_reg[i] = rdata;
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}
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return 0;
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}
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uint32_t phy_get_txfd_reg()
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{
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#if HW_PLATFORM >= HW_PLATFORM_FPGA
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g_phy_ctxt.dep.phy_status.phy_tx_pwr_reg.bb_rt0_bd0 = \
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PHY_TX_READ_REG(CFG_BB_DB_AMP_CTRL_RATE0_BAND0_ADDR);
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g_phy_ctxt.dep.phy_status.phy_tx_pwr_reg.bb_rt0_bd1 = \
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PHY_TX_READ_REG(CFG_BB_DB_AMP_CTRL_RATE0_BAND1_ADDR);
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g_phy_ctxt.dep.phy_status.phy_tx_pwr_reg.bb_rt0_bd2 = \
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PHY_TX_READ_REG(CFG_BB_DB_AMP_CTRL_RATE0_BAND2_ADDR);
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g_phy_ctxt.dep.phy_status.phy_tx_pwr_reg.bb_rt1_bd0 = \
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PHY_TX_READ_REG(CFG_BB_DB_AMP_CTRL_RATE1_BAND0_ADDR);
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g_phy_ctxt.dep.phy_status.phy_tx_pwr_reg.bb_rt1_bd1 = \
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PHY_TX_READ_REG(CFG_BB_DB_AMP_CTRL_RATE1_BAND1_ADDR);
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g_phy_ctxt.dep.phy_status.phy_tx_pwr_reg.bb_rt1_bd2 = \
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PHY_TX_READ_REG(CFG_BB_DB_AMP_CTRL_RATE1_BAND2_ADDR);
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#endif
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return 0;
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}
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uint32_t phy_get_dfe_reg()
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{
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#if HW_PLATFORM >= HW_PLATFORM_FPGA
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g_phy_ctxt.dep.phy_status.phy_gain_adjust_info = \
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PHY_DFE_READ_REG(CFG_BB_SW_ADJUST_GAIN_ADDR);
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#endif
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return 0;
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}
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uint32_t phy_get_version()
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{
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#if HW_PLATFORM >= HW_PLATFORM_FPGA
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g_phy_ctxt.dep.phy_status.phy_mode = \
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PHY_READ_REG(CFG_BB_VERSION_ADDR);
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#endif
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return 0;
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}
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uint32_t phy_get_band_cfg()
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{
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#if HW_PLATFORM >= HW_PLATFORM_FPGA
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g_phy_ctxt.dep.phy_status.phy_band.bb_r0_b0 = \
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PHY_READ_REG(CFG_BB_R0_B0_TONE_ADDR);
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g_phy_ctxt.dep.phy_status.phy_band.bb_r0_b1 = \
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PHY_READ_REG(CFG_BB_R0_B1_TONE_ADDR);
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g_phy_ctxt.dep.phy_status.phy_band.bb_r0_b2 = \
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PHY_READ_REG(CFG_BB_R0_B2_TONE_ADDR);
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g_phy_ctxt.dep.phy_status.phy_band.bb_r1_b0 = \
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PHY_READ_REG(CFG_BB_R1_B0_TONE_ADDR);
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g_phy_ctxt.dep.phy_status.phy_band.bb_r1_b1 = \
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PHY_READ_REG(CFG_BB_R1_B1_TONE_ADDR);
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g_phy_ctxt.dep.phy_status.phy_band.bb_r1_b2 = \
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PHY_READ_REG(CFG_BB_R1_B2_TONE_ADDR);
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#endif
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return 0;
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}
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uint16_t phy_set_init_cnt()
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{
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g_phy_ctxt.dep.phy_status.phy_init_cnt++;
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return 0;
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}
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uint16_t phy_get_init_cnt()
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{
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return g_phy_ctxt.dep.phy_status.phy_init_cnt;
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}
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uint16_t phy_set_reinit_cnt()
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{
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g_phy_ctxt.dep.phy_status.phy_reinit_cnt++;
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return 0;
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}
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uint16_t phy_get_reinit_cnt()
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{
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return g_phy_ctxt.dep.phy_status.phy_reinit_cnt;
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}
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uint32_t phy_get_status()
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{
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phy_get_rx_dc();
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phy_get_tx_dc();
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phy_get_dc_cal_cnt();
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phy_get_overstress_cnt();
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/* update by log print, share with flash log */
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//phy_get_rxtd_reg_tx_pkt();
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/* the same as above */
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//phy_get_granite_reg();
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phy_get_txfd_reg();
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phy_get_dfe_reg();
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phy_get_version();
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phy_get_band_cfg();
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return 0;
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}
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void phy_print_ana_dbg_info()
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{
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uint8_t rodata = 0;
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uint32_t phy_status = 0;
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ana_dbg_info_t ana_data;
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phy_ana_i2c_read(CFG_ANA_TOP_REG_ADDR, &phy_status, &rodata);
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ana_data.phy_status = phy_status;
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ana_data.force_0 = RGF_MAC_READ_REG(CFG_PHY_FORCE_0_ADDR);
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ana_data.force_1 = RGF_MAC_READ_REG(CFG_PHY_FORCE_1_ADDR);
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ana_data.force_2 = RGF_MAC_READ_REG(CFG_PHY_FORCE_2_ADDR);
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iot_dbglog_input(PLC_PHY_STATUS_MID, DBGLOG_ERR,
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IOT_PHY_STATUS9_ID, 4,\
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ana_data.force_0, \
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ana_data.force_1, \
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ana_data.force_2, \
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ana_data.phy_status);
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iot_printf("wait rssi timeout FORCE_0:%x,FORCE_1:%x,FORCE_2:%x,ANA_TOP:%x \n", \
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ana_data.force_0, \
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ana_data.force_1, \
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ana_data.force_2, \
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ana_data.phy_status);
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}
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void phy_get_status_printf()
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{
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phy_get_status();
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if (++g_phy_period_60_min_cnt >= PHY_PERIOD_60_MIN) {
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iot_dbglog_input(PLC_PHY_STATUS_MID, DBGLOG_ERR,
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IOT_PHY_STATUS0_ID, 9,\
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g_phy_ctxt.dep.phy_status.ppm_value,\
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g_phy_ctxt.dep.phy_status.gain_dc.rx_dc_pga[0],\
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g_phy_ctxt.dep.phy_status.gain_dc.rx_dc_pgf[0],\
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g_phy_ctxt.dep.phy_status.gain_dc.rx_dc_pga[1],\
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g_phy_ctxt.dep.phy_status.gain_dc.rx_dc_pgf[1],\
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g_phy_ctxt.dep.phy_status.gain_dc.rx_dc_pga[2],\
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g_phy_ctxt.dep.phy_status.gain_dc.rx_dc_pgf[2],\
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g_phy_ctxt.dep.phy_status.gain_dc.rx_dc_pga[3],\
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g_phy_ctxt.dep.phy_status.gain_dc.rx_dc_pgf[3]);
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iot_dbglog_input(PLC_PHY_STATUS_MID, DBGLOG_ERR,
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IOT_PHY_STATUS1_ID, 9,\
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g_phy_ctxt.dep.phy_status.gain_dc.rx_dc_pga[4],\
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g_phy_ctxt.dep.phy_status.gain_dc.rx_dc_pgf[4],\
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g_phy_ctxt.dep.phy_status.gain_dc.rx_dc_pga[5],\
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g_phy_ctxt.dep.phy_status.gain_dc.rx_dc_pgf[5],\
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g_phy_ctxt.dep.phy_status.gain_dc.rx_dc_pga[6],\
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g_phy_ctxt.dep.phy_status.gain_dc.rx_dc_pgf[6],\
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g_phy_ctxt.dep.phy_status.gain_dc.rx_dc_pga[7],\
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g_phy_ctxt.dep.phy_status.gain_dc.rx_dc_pgf[7],\
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g_phy_ctxt.dep.phy_status.gain_dc.tx_dc[0]);
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g_phy_period_60_min_cnt = 0;
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}
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iot_dbglog_input(PLC_PHY_STATUS_MID, DBGLOG_ERR,
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IOT_PHY_STATUS2_ID, 9,\
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g_phy_ctxt.dep.phy_status.gain_dc.tx_dc[1],\
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g_phy_ctxt.dep.phy_status.gain_dc.tx_dc[2],\
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g_phy_ctxt.dep.phy_status.gain_dc.tx_dc[3],\
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g_phy_ctxt.dep.phy_status.dc_cal_cnt,\
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g_phy_ctxt.indep.ovs_ctxt.os_cnt,\
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g_phy_ctxt.dep.phy_status.phy_rx_cnt.phy_rx_pkt_cnt,\
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g_phy_ctxt.dep.phy_status.phy_rx_cnt.phy_rx_fc_ok_cnt,\
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g_phy_ctxt.dep.phy_status.phy_rx_cnt.phy_rx_fc_fail_cnt,\
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g_phy_ctxt.dep.phy_status.phy_rx_cnt.phy_rx_pld_ok_cnt);
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iot_dbglog_input(PLC_PHY_STATUS_MID, DBGLOG_ERR,
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IOT_PHY_STATUS3_ID, 9,\
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g_phy_ctxt.dep.phy_status.phy_rx_cnt.phy_rx_pld_fail_cnt,\
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g_phy_ctxt.dep.phy_status.phy_tx_pkt_cnt,\
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g_phy_ctxt.dep.phy_status.granite_reg[0],\
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g_phy_ctxt.dep.phy_status.granite_reg[1],\
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g_phy_ctxt.dep.phy_status.granite_reg[2],\
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g_phy_ctxt.dep.phy_status.granite_reg[3],\
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g_phy_ctxt.dep.phy_status.granite_reg[4],\
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g_phy_ctxt.dep.phy_status.granite_reg[5],\
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g_phy_ctxt.dep.phy_status.granite_reg[6]);
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if (++g_phy_period_30_min_cnt >= PHY_PERIOD_30_MIN) {
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iot_dbglog_input(PLC_PHY_STATUS_MID, DBGLOG_ERR,
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IOT_PHY_STATUS4_ID, 9,\
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g_phy_ctxt.dep.phy_status.granite_reg[7],\
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g_phy_ctxt.dep.phy_status.granite_reg[8],\
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g_phy_ctxt.dep.phy_status.granite_reg[9],\
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g_phy_ctxt.dep.phy_status.granite_reg[10],\
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g_phy_ctxt.dep.phy_status.temp_res,\
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g_phy_ctxt.dep.phy_status.phy_tx_pwr_reg.bb_rt0_bd0,\
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g_phy_ctxt.dep.phy_status.phy_tx_pwr_reg.bb_rt0_bd1,\
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g_phy_ctxt.dep.phy_status.phy_tx_pwr_reg.bb_rt0_bd2,\
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g_phy_ctxt.dep.phy_status.phy_tx_pwr_reg.bb_rt1_bd0);
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iot_dbglog_input(PLC_PHY_STATUS_MID, DBGLOG_ERR,
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IOT_PHY_STATUS5_ID, 8,\
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g_phy_ctxt.dep.phy_status.phy_tx_pwr_reg.bb_rt1_bd1,\
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g_phy_ctxt.dep.phy_status.phy_tx_pwr_reg.bb_rt1_bd2,\
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g_phy_ctxt.dep.phy_status.phy_band.bb_r0_b0,\
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g_phy_ctxt.dep.phy_status.phy_band.bb_r0_b1,\
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g_phy_ctxt.dep.phy_status.phy_band.bb_r0_b2,\
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g_phy_ctxt.dep.phy_status.phy_band.bb_r1_b0,\
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g_phy_ctxt.dep.phy_status.phy_band.bb_r1_b1,\
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g_phy_ctxt.dep.phy_status.phy_band.bb_r1_b2);
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g_phy_period_30_min_cnt = 0;
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}
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iot_dbglog_input(PLC_PHY_STATUS_MID, DBGLOG_ERR,
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IOT_PHY_STATUS6_ID, 5,\
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g_phy_ctxt.dep.phy_status.phy_gain_adjust_info,\
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g_phy_ctxt.dep.phy_status.phy_mode, \
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g_phy_ctxt.dep.phy_status.spur_array[9],\
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phy_get_init_cnt(),\
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phy_get_reinit_cnt());
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iot_dbglog_input(PLC_PHY_STATUS_MID, DBGLOG_ERR,
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IOT_PHY_STATUS7_ID, 9,\
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g_phy_ctxt.dep.phy_status.spur_array[0],\
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g_phy_ctxt.dep.phy_status.spur_array[1],\
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g_phy_ctxt.dep.phy_status.spur_array[2],\
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g_phy_ctxt.dep.phy_status.spur_array[3],\
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g_phy_ctxt.dep.phy_status.spur_array[4],\
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g_phy_ctxt.dep.phy_status.spur_array[5],\
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g_phy_ctxt.dep.phy_status.spur_array[6],\
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g_phy_ctxt.dep.phy_status.spur_array[7],\
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g_phy_ctxt.dep.phy_status.spur_array[8]);
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iot_dbglog_input(PLC_PHY_STATUS_MID, DBGLOG_ERR,
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IOT_PHY_STATUS8_ID, 7,\
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g_phy_cpu_share_ctxt.nf_192p,\
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g_phy_cpu_share_ctxt.nf_384p,\
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g_phy_cpu_share_ctxt.nf_768p,\
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g_phy_cpu_share_ctxt.nf_1536p,\
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g_phy_cpu_share_ctxt.nf_3072p,\
|
|
g_phy_cpu_share_ctxt.nf_6144p,\
|
|
phy_spike_shift_en_get());
|
|
|
|
}
|
|
|
|
void phy_get_status_printf_force()
|
|
{
|
|
g_phy_period_30_min_cnt = PHY_PERIOD_30_MIN - 1;
|
|
g_phy_period_60_min_cnt = PHY_PERIOD_60_MIN - 1;
|
|
phy_get_status_printf();
|
|
}
|
|
|
|
void phy_dump_busy_set(bool_t en)
|
|
{
|
|
g_phy_ctxt.dep.dump_busy = en;
|
|
}
|
|
|
|
bool_t phy_busy_get(void *phy_ctxt, PHY_BUSY_ID id)
|
|
{
|
|
if (id == PHY_BUSY_TX) {
|
|
/* dump busy must not tx, and maybe incude other reason. */
|
|
return ((phy_ctxt_t *)phy_ctxt)->dep.dump_busy;
|
|
} else if(id == PHY_BUSY_DUMP) {
|
|
return ((phy_ctxt_t *)phy_ctxt)->dep.dump_busy;
|
|
} else {
|
|
return false;
|
|
}
|
|
}
|
|
|