431 lines
12 KiB
C
Executable File
431 lines
12 KiB
C
Executable File
/****************************************************************************
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Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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be copied by any method or incorporated into another program without
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the express written consent of Aerospace C.Power. This Information or any portion
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thereof remains the property of Aerospace C.Power. The Information contained herein
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is believed to be accurate and Aerospace C.Power assumes no responsibility or
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liability for its use in any way and conveys no license or title under
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any patent or copyright and makes no representation or warranty that this
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Information is free from patent or copyright infringement.
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****************************************************************************/
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#ifndef MAC_RX_BUF_RING_H
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#define MAC_RX_BUF_RING_H
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#include "iot_pkt_api.h"
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#include "os_types.h"
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#include "mac_dma.h"
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#include "plc_fr.h"
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#include "rx_mpdu_start.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define MAC_RX_DEBUG_CFG 0x320
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#define MAC_SG_DELIM_TMR_BAND0 770
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#define MAC_SG_DELIM_TMR_BAND1 1220
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/* max wait time ms for rx mpdu handler
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* this can be very large, means wait for ever
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* currently set to max for only used when stop vdev
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*/
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#define MAX_RX_QUOTA_MS (0xffffffff)
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/* for rx msdu */
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#define RX_MSDU_END_OFFSET sizeof(rx_msdu_start)
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#define RX_FC_OFFSET (RX_MSDU_END_OFFSET + sizeof(rx_msdu_end))
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#define RX_PAYLOAD_OFFSET (RX_FC_OFFSET + FC_LEN)
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/* for rx mpdu */
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#define RX_ATTENTION_OFFSET 0
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#define MPDU_START_OFFSET (RX_ATTENTION_OFFSET + sizeof(rx_attention))
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#define MPDU_END_OFFSET (MPDU_START_OFFSET + sizeof(rx_mpdu_start))
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#define PB_START_OFFSET (MPDU_END_OFFSET + sizeof(rx_mpdu_end))
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#define PB_END_OFFSET (PB_START_OFFSET + sizeof(rx_pb_start))
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#define PB_PAYLOAD_OFFSET (PB_END_OFFSET + sizeof(rx_pb_end))
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#define RX_RING_GET_RD_IDX(ring_id) \
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REG_FIELD_GET(CFG_RING##ring_id##_RD_IDX, \
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RGF_RX_READ_REG(CFG_BUFFER_RING##ring_id##_2_ADDR))
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#define RX_RING_SET_RD_IDX(ring_id, value) \
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do { \
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uint32_t tmp = RGF_RX_READ_REG( \
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CFG_BUFFER_RING##ring_id##_2_ADDR); \
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REG_FIELD_SET(CFG_RING##ring_id##_RD_IDX, \
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tmp, value); \
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RGF_RX_WRITE_REG(CFG_BUFFER_RING##ring_id##_2_ADDR, tmp); \
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} while (0)
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#define RX_RING_GET_WR_IDX(ring_id) \
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REG_FIELD_GET(RO_RING##ring_id##_WR_IDX, \
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RGF_RX_READ_REG(CFG_BUFFER_RING##ring_id##_2_ADDR))
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#define rx_ring_get_wr_idx_macro(rid) \
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REG_FIELD_GET(RO_RING0_WR_IDX, \
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(RGF_RX_READ_REG(CFG_BUFFER_RING0_2_ADDR + \
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(rid) * (CFG_BUFFER_RING1_2_ADDR - CFG_BUFFER_RING0_2_ADDR))))
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#define RX_RING_GET_MPDU_WR_IDX(rid, reg_idx) \
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REG_FIELD_GET(RO_RING##rid##_MPDU_BUF_WR_IDX, \
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RGF_RX_READ_REG(CFG_RX_BUF_MPDU_WR_IDX_##reg_idx##_ADDR))
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#define RX_RING_GET_RING_PTR(ring_id) \
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REG_FIELD_GET(CFG_RING##ring_id##_PTR, \
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RGF_RX_READ_REG(CFG_BUFFER_RING##ring_id##_0_ADDR))
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#define RX_RING_SET_FILTER_SEL(ring_id, value) \
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do { \
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uint32_t tmp = RGF_RX_READ_REG( \
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CFG_BUFFER_RING##ring_id##_1_ADDR); \
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REG_FIELD_SET(CFG_RING##ring_id##_BUF_SIZE_FILTER_SEL, \
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tmp, value); \
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RGF_RX_WRITE_REG(CFG_BUFFER_RING##ring_id##_1_ADDR, tmp); \
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} while (0)
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#define RX_RING_SET_FILTER(ring_id, value) \
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do { \
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uint32_t tmp = RGF_RX_READ_REG( \
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CFG_BUFFER_RING##ring_id##_1_ADDR); \
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REG_FIELD_SET(CFG_RING##ring_id##_FILTER, \
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tmp, value); \
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RGF_RX_WRITE_REG(CFG_BUFFER_RING##ring_id##_1_ADDR, tmp); \
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} while (0)
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typedef enum _ring_id {
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PLC_RING_0 = 0, //0
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PLC_RING_1 , //1
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PLC_CONTROL_RING = PLC_RING_1,
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PLC_RING_2 , //2
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PLC_SOF_RING = PLC_RING_2,
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PLC_RING_3 , //3
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PLC_RING_4 , //4
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MAX_PLC_RX_RING_NUM ,
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} ring_id_t;
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typedef uint32_t (*rx_low_watermark_callback)(void *ring);
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typedef enum _config_type {
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CONFIG_RX_DESC = 0,
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CONFIG_RX_ATTENTION = 0,
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CONFIG_RX_MPDU_START,
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CONFIG_RX_MPDU_END,
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CONFIG_RX_PB_START,
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CONFIG_RX_PB_END,
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CONFIG_RX_MSDU_START = CONFIG_RX_MPDU_START,
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CONFIG_RX_MSDU_END = CONFIG_RX_MPDU_END,
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CONFIG_FC = CONFIG_RX_PB_END + 1,
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CONFIG_PAYLOAD,
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CONFIG_MAX_NUM,
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} config_type;
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typedef struct _ring_config {
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config_type type;
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/*offset of this type in rx ring buffer*/
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uint32_t offset;
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/*this type enabled or not*/
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uint8_t enable;
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}ring_config;
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/* rx buf overall desc structure */
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typedef struct _rx_buf_hdr {
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rx_attention att;
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rx_mpdu_start mpdu_st;
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rx_mpdu_end mpdu_ed;
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rx_pb_start pb_st;
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rx_pb_end pb_ed;
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} rx_buf_hdr_t;
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/* save sof information for sack interrupting */
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typedef struct _sof_rx_info {
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uint32_t fc[4];
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rx_attention att;
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int8_t snr;
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} sof_rx_info_t;
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typedef struct _rx_buf_ring {
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#if HW_PLATFORM == HW_PLATFORM_SIMU
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uint32_t enabled;
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#endif
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/* buffer ring/simulator hw implementation */
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uint8_t **buf_list;
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/* hw ring id */
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uint32_t ring_id;
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/* ring size */
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uint32_t ring_sz;
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/* read index */
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uint32_t read_idx;
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/* write index */
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uint32_t write_idx;
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/* size for attached buf on this ring */
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uint32_t buf_sz;
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/* water mark */
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uint32_t water_mark_buf_num : 16,
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overflow : 1,
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cfg_enabled : 1,
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bufsz_filter_sel : 1,
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filter : 4,
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msg_delivered : 1,
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not_done : 4,
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resv : 4;
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/*ring config*/
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ring_config config[CONFIG_MAX_NUM];
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/* low buf alert callback */
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rx_low_watermark_callback cb;
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/* rx ctxt, for storing mpdu's first pb */
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rx_mpdu_start *cur_mpdu;
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rx_mpdu_start saved_mpdu_st;
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} rx_buf_ring_t;
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typedef uint32_t(*mac_recv_mpdu_pb_func_t)(void *arg, iot_pkt_t *rx_buf);
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typedef struct _mac_rx_ring_ctxt
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{
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rx_buf_ring_t ring[MAX_PLC_RX_RING_NUM];
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mac_recv_mpdu_pb_func_t mpdu_pb_cb;
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} mac_rx_ring_ctxt_t;
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void rx_buf_ring_set_callback(mac_rx_ring_ctxt_t *ring_ctxt, \
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mac_recv_mpdu_pb_func_t cb);
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/* init and put on the buf_list */
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uint32_t rx_buf_ring_init(rx_buf_ring_t *rx_ring, uint32_t ring_id,
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uint32_t ring_sz, uint32_t buf_sz, rx_low_watermark_callback cb,
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ring_config *cfg,uint8_t bufsz_filter_sel, uint8_t filter);
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/* reap an buf from the ring
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* (IN) rx_ring
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* (IN) num - the num plc buf to get, it should <= sizeof(buf_array)
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* (OUT) buf_array - iot_pkt_t pointer's array to get from the ring
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* return - the num of buf popped out
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*/
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uint32_t pop_buf_from_ring(rx_buf_ring_t *rx_ring, uint32_t num,
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iot_pkt_t **buf_array);
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#if HW_PLATFORM == HW_PLATFORM_SIMU
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/* push an buf to the ring
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* (IN) rx_ring
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* (IN) buf_array - an array of bufs to write into the rx_ring
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* (IN) num - how many of the array item
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* return - 0 for good, others for error
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*/
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uint32_t push_buf_to_ring(rx_buf_ring_t *rx_ring,
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dma_frag_t **buf_array, uint32_t num);
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/* push an offset buf to the ring
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* (IN) rx_ring
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* (IN) index - write index
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* (IN) offset - the offset of rx ring buffer to receive the content
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* (IN) data - the source content
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* (IN) len - the length of the source content
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* return - 0 for good, others for error
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*/
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uint32_t push_data_to_ring_with_offset(rx_buf_ring_t *rx_ring, uint32_t index,
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uint32_t offset, void* data, uint32_t len);
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#endif
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uint32_t mac_rx_get_bcn_swcrc_cfg(void);
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void mac_rx_set_bcn_swcrc_cfg(uint32_t is_by_sw);
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uint32_t mac_rx_get_pb_hdr_to_buf_cfg(void);
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void mac_rx_set_pb_hdr_to_buf_cfg(uint32_t is_to_buf);
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/* set water mark */
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uint32_t rx_ring_set_watermark(rx_buf_ring_t *rx_ring, uint32_t num);
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/* get water mark
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* retrun - water mark value
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*/
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uint32_t rx_ring_get_watermark(rx_buf_ring_t *rx_ring);
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bool_t is_rx_ring_under_watermark(rx_buf_ring_t *rx_ring);
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bool_t rx_ring_space_avaliable(rx_buf_ring_t *rx_ring, uint32_t num);
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void mac_rx_ring_enable(rx_buf_ring_t *rx_ring, uint32_t enable);
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void mac_rx_all_ring_enable(void *pdev_ptr);
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void mac_rx_all_ring_disable(void *pdev_ptr);
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/* get ring rd idx */
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uint32_t rx_ring_get_rd_idx(rx_buf_ring_t *rx_ring);
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/* set ring rd idx */
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void rx_ring_set_rd_idx(rx_buf_ring_t *rx_ring, uint32_t value);
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/* get ring rd idx */
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uint32_t rx_ring_get_wr_idx(rx_buf_ring_t *rx_ring);
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/* init the ctxt of rx ring */
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uint32_t mac_rx_ring_ctxt_init(mac_rx_ring_ctxt_t *ring_ctxt);
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uint32_t rx_ring_get_mpdu_int_status();
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void mac_rx_set_filter(uint32_t filter_type, uint8_t en);
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/* clear the mpdu rx int */
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void rx_ring_clr_mpdu_int(uint32_t rid);
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uint32_t rx_ring_get_overflow_status();
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void rx_ring_clr_overflow_int(uint32_t rid);
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uint8_t rx_ring_set_filter_sel(rx_buf_ring_t *rx_ring);
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uint8_t rx_ring_set_filter(rx_buf_ring_t *rx_ring);
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void mac_rx_timeout_act_hang(uint32_t enable);
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void mac_rx_abort_act_hang(uint32_t enable);
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void mac_set_trans_done_selection(uint32_t cfg);
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void mac_rx_pb_timeout(uint32_t time_40ns);
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void mac_rx_gp_proto_band_set(void);
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/* called in the isr for WAR */
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uint32_t mac_rx_hw_isr_callback();
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/**
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* @brief mac_set_debug_reg(uint32_t value) - config debug register.
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* @param null
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*/
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void mac_set_debug_reg(uint32_t value);
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/**
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* @brief mac_rx_get_debug_reg - get debug register.
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* @param value value
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*/
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uint32_t mac_rx_get_debug_reg();
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/**
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* @brief mac_rx_set_delim() - set delimiter timer rob0.
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* @param proto_band_id proto_band_id
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* @param phy_rate_id rate_id,
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*/
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void mac_rx_set_delim(uint32_t proto_band_id, uint32_t rate_id);
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/**
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* @brief mac_rx_get_delim() - get sg delimiter timer
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* @param phy_rate_id rate_id,
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* @param hw_band_id hw_band_id
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* @return delimiter timer
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*/
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uint32_t mac_rx_get_delim(uint8_t phy_rate_id, uint32_t hw_band_id);
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/**
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* @brief mac_rx_set_pbnum_from_phy() - config pb num from phy or fc.
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* @param pn_from_phy 0: pb num form fc ,1: pb num from phy
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* @return 0:success
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*/
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uint32_t mac_rx_set_pbnum_from_phy(uint32_t pn_from_phy);
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/**
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* @brief mac_rx_set_fcs_by_phy() - config fcs from pb or mac hw.
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* @param enable 0: fcs from mac ,1: fcs from phy
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* @return 0:success
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*/
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uint32_t mac_rx_set_fcs_by_phy(uint32_t enable);
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void mac_rx_set_sg_dt_filter(uint8_t dt0, uint8_t dt1, \
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uint8_t dt2, uint8_t dt3);
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/**
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* @brief mac_rx_get_ring() - get ring pointer.
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* @param pdev - point to pdev.
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* @param index - ring index.
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* @return ring pointer
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*/
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rx_buf_ring_t *mac_rx_get_ring(void *pdev, uint32_t index);
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/**
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* @brief mac_rx_get_ring_buf_desc_size() - get ring buf desc size.
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* @param none - none.
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* @return ring buf desc size
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*/
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uint32_t mac_rx_get_ring_buf_desc_size();
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/**
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* @brief mac_rx_set_ring_buf_list() - set ring buf list.
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* @param buf_list - buf list.
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* @param ring_sz - ring sz.
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* @param index - index of ring.
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* @param iot_pkt - the pkt to point to buf list.
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* @return none.
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*/
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void mac_rx_set_ring_buf_list(uint8_t **buf_list, uint32_t ring_sz,
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uint32_t index, iot_pkt_t *iot_pkt);
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/**
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* @brief mac_rx_get_ring_buf_list() - get ring buf list.
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* @param rx_ring - rx ring.
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* @return buf list.
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*/
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iot_pkt_t *mac_rx_get_ring_buf_list(rx_buf_ring_t *rx_ring);
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/**
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* @brief rx_ring_fill_hw_cfg() - fill hw cfg.
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* @param rx_ring - rx ring.
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* @return void.
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*/
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void rx_ring_fill_hw_cfg(rx_buf_ring_t *rx_ring);
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#if DEBUG_INVAILD_ADDR
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/**
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*@brief mac_judge_ring_buf_validation.
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* judge ring buf if invaild.
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*
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*@return 0: vaild, 1: invaild
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*/
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uint32_t mac_judge_ring_buf_validation();
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/**
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*@brief mac_handle_invaild_addr.
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* handle invaild addr.
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*
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*@return [null]
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*/
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void mac_handle_invaild_addr();
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#endif
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/**
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* @brief mac_rx_set_phase_protection() - protect rx frame from phase
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* change from cmd list
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* @param phy_force: force phy phase
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* @param mac_force: force mac phase
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* @return none
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*/
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void mac_rx_set_phase_protection(uint32_t phy_force, uint32_t mac_force);
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/**
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* @brief enable/disable rx last pb eco
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* @return none
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*/
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void mac_rx_set_last_pb_eco(uint8_t enable);
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/**
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* @brief mac_rx_set_pb_hdr_crc_opt set pb_hdr_crc_opt
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* @param value: set the value
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* @return none
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*/
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void mac_rx_set_pb_hdr_crc_opt(uint8_t value);
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#ifdef __cplusplus
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}
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#endif
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#endif // !MAC_RX_BUF_RING_H
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