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kunlun/plc/halmac/status/mac_status.c
andy c756587541 初始提交
2024-09-28 14:24:04 +08:00

1171 lines
34 KiB
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/****************************************************************************
Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
be copied by any method or incorporated into another program without
the express written consent of Aerospace C.Power. This Information or any portion
thereof remains the property of Aerospace C.Power. The Information contained herein
is believed to be accurate and Aerospace C.Power assumes no responsibility or
liability for its use in any way and conveys no license or title under
any patent or copyright and makes no representation or warranty that this
Information is free from patent or copyright infringement.
****************************************************************************/
#include "mac_status.h"
#include "os_mem.h"
#include "iot_module.h"
#include "mac_pdev.h"
#include "plc_const.h"
#include "iot_dbglog_api.h"
#include "iot_dbglog.h"
#include "mac_sched_hw.h"
#include "iot_io.h"
#include "chip_reg_base.h"
#include "phy_bb.h"
#include "mac_reset.h"
#include "mac_desc_engine.h"
#include "os_utils_api.h"
#if HPLC_RF_DEV_SUPPORT
#include "mac_rf_common_hw.h"
#endif
#include "mac_hwq_reg.h"
#include "hw_reg_api.h"
uint32_t mac_add_rx_msdu_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_msdu_cnt++;
return 0;
}
uint32_t mac_get_rx_msdu_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_msdu_cnt;
}
uint32_t mac_add_rx_mpdu_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_mpdu_cnt++;
return 0;
}
uint32_t mac_get_rx_mpdu_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_mpdu_cnt;
}
uint32_t mac_add_rx_bcn_ok_cnt(void)
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_bcn_ok_cnt++;
return 0;
}
uint32_t mac_get_rx_bcn_ok_cnt(void)
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_bcn_ok_cnt;
}
uint32_t mac_add_rx_bcn_upload_cnt(void)
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_bcn_upload_cnt++;
return 0;
}
uint32_t mac_get_rx_bcn_upload_cnt(void)
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_bcn_upload_cnt;
}
uint32_t mac_add_rx_pb_cnt(void)
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_pb_cnt++;
return 0;
}
uint32_t mac_get_rx_pb_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_pb_cnt;
}
uint32_t mac_add_rx_fc_err_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_fc_err_cnt++;
return 0;
}
uint32_t mac_get_rx_fc_err_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_fc_err_cnt;
}
uint32_t mac_add_rx_fc_err_no_match_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_fc_err_no_match_cnt++;
return 0;
}
uint32_t mac_get_rx_fc_err_no_match_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_fc_err_no_match_cnt;
}
uint32_t mac_add_rx_bcn_pb_err_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_bcn_pb_err_cnt++;
return 0;
}
uint32_t mac_get_rx_bcn_pb_err_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_bcn_pb_err_cnt;
}
uint32_t mac_add_rx_sof_pb_err_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_sof_pb_err_cnt++;
return 0;
}
uint32_t mac_get_rx_sof_pb_err_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_sof_pb_err_cnt;
}
uint32_t mac_add_rx_pld_err_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_pld_err_cnt++;
return 0;
}
uint32_t mac_get_rx_pld_err_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_pld_err_cnt;
}
uint32_t mac_add_rx_abort_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_abort_cnt++;
return 0;
}
uint32_t mac_get_rx_abort_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_abort_cnt;
}
uint32_t mac_add_rx_overflow_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_overflow_cnt++;
return 0;
}
uint32_t mac_get_rx_overflow_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_overflow_cnt;
}
uint32_t mac_add_rx_unicast_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_unicast_cnt++;
return 0;
}
uint32_t mac_get_rx_unicast_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_unicast_cnt;
}
uint32_t mac_add_rx_broadcast_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_broadcast_cnt++;
return 0;
}
uint32_t mac_get_rx_broadcast_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_broadcast_cnt;
}
uint32_t mac_add_rx_mpdu_type_err_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_mpdu_tpye_err_cnt++;
return 0;
}
uint32_t mac_get_rx_mpdu_type_err_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_mpdu_tpye_err_cnt;
}
uint32_t mac_add_rx_msdu_crc_err_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_msdu_crc_err_cnt++;
return 0;
}
uint32_t mac_get_rx_msdu_crc_err_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_msdu_crc_err_cnt;
}
uint32_t mac_add_rx_msdu_null_first_pb_cnt(void)
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_msdu_null_first_pb_cnt++;
return 0;
}
uint32_t mac_get_rx_msdu_null_first_pb_cnt(void)
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_msdu_null_first_pb_cnt;
}
uint32_t mac_add_rx_half_pkt_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_half_pkt_cnt++;
return 0;
}
uint32_t mac_get_rx_half_pkt_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_half_pkt_cnt;
}
uint32_t mac_add_rx_att_not_done_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_att_not_done_cnt++;
return 0;
}
uint32_t mac_get_rx_att_not_done_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_att_not_done_cnt;
}
uint32_t mac_add_rx_msdu_len_is_0_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_msdu_len_is_0_cnt++;
return 0;
}
uint32_t mac_get_rx_msdu_len_is_0_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_msdu_len_is_0_cnt;
}
uint32_t mac_add_rx_proto_nomatch_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_proto_nomatch_cnt++;
return 0;
}
uint32_t mac_get_rx_proto_nomatch_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_proto_nomatch_cnt;
}
uint32_t mac_add_rx_bcn_err_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_bcn_err_cnt++;
return 0;
}
uint32_t mac_get_rx_bcn_err_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_bcn_err_cnt;
}
uint32_t mac_add_rx_fc_invalid_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_fc_invalid_cnt++;
return 0;
}
uint32_t mac_get_rx_fc_invalid_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.rx_status.mac_rx_fc_invalid_cnt;
}
uint32_t mac_add_mpdu_tx_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_mpdu_tx_cnt++;
return 0;
}
uint32_t mac_get_mpdu_tx_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_mpdu_tx_cnt;
}
uint32_t mac_add_tx_no_ack_cnt(uint32_t is_pco)
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_tx_no_ack_cnt++;
if (is_pco) {
g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_tx_no_ack_cnt_pco++;
}
return 0;
}
uint32_t mac_get_tx_no_ack_cnt(uint32_t is_pco)
{
if (is_pco) {
return g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_tx_no_ack_cnt_pco;
} else {
return g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_tx_no_ack_cnt;
}
}
uint32_t mac_add_tx_unicast_all_pb_err_cnt(uint32_t is_pco)
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_tx_unicast_pb_all_err_cnt++;
if (is_pco) {
g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_tx_unicast_pb_all_err_cnt_pco++;
}
return 0;
}
uint32_t mac_get_tx_unicast_all_pb_err_cnt(uint32_t is_pco)
{
if (is_pco) {
return g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_tx_unicast_pb_all_err_cnt_pco;
} else {
return g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_tx_unicast_pb_all_err_cnt;
}
}
uint32_t mac_add_mpdu_tx_unicast_cnt(uint32_t is_pco)
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_mpdu_tx_unicast_cnt++;
if (is_pco) {
g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_mpdu_tx_unicast_cnt_pco++;
}
return 0;
}
uint32_t mac_get_mpdu_tx_unicast_cnt(uint32_t is_pco)
{
if (is_pco) {
return g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_mpdu_tx_unicast_cnt_pco;
} else {
return g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_mpdu_tx_unicast_cnt;
}
}
uint32_t mac_add_mpdu_tx_broadcast_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_mpdu_tx_broadcast_cnt++;
return 0;
}
uint32_t mac_get_mpdu_tx_broadcast_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_mpdu_tx_broadcast_cnt;
}
uint32_t mac_add_no_msdu_to_send_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_tx_no_msdu_cnt++;
return 0;
}
uint32_t mac_get_no_msdu_to_send_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_tx_no_msdu_cnt;
}
uint32_t mac_set_tx_underflow_cnt(uint32_t cnt)
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_tx_underflow_cnt = cnt;
return 0;
}
uint32_t mac_get_tx_underflow_cnt(void)
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_tx_underflow_cnt;
}
uint32_t IRAM_ATTR mac_add_isr_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.isr_status.isr_cnt++;
return 0;
}
uint32_t mac_get_isr_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.isr_status.isr_cnt;
}
uint32_t mac_add_dsr_isr_sync_cnt(void)
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.isr_status.dsr_isr_sync_cnt++;
return 0;
}
uint32_t mac_get_dsr_isr_sync_cnt(void)
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.isr_status.dsr_isr_sync_cnt;
}
uint32_t mac_tmi_get_p_tmi(uint32_t proto, \
uint32_t tmi, uint32_t extmi, uint32_t *p_tmi)
{
uint32_t maxtmi = phy_get_max_tmi(proto);
uint32_t maxetmi = phy_get_max_etmi(proto);
if (!(tmi <= maxtmi && tmi >= 0 && extmi >= 0 && extmi <= maxetmi))
return 0;
if (PLC_PROTO_TYPE_SG == proto) {
if (tmi <= 4) {
*p_tmi = tmi;
}
else if (tmi<=8) {
IOT_ASSERT(tmi != 5 && tmi != 8);
*p_tmi = tmi - 1;
}
else if (tmi <= 10) {
IOT_ASSERT(tmi != 10);
*p_tmi = tmi - 2;
}
else if (tmi <15) {
*p_tmi = tmi - 3;
}
else if (tmi == 15) {
switch (extmi) {
case 6: {
*p_tmi = P_EXTMI_6;
break;
}
case 11: {
*p_tmi = P_EXTMI_11;
break;
}
case 12: {
*p_tmi = P_EXTMI_12;
break;
}
case 13: {
*p_tmi = P_EXTMI_13;
break;
}
default: {
IOT_ASSERT(0);
break;
}
}
}
else {
IOT_ASSERT(0);
}
}
else if (PLC_PROTO_TYPE_SPG == proto) {
/* spg current just use fix rate, the rate is not too much */
*p_tmi = tmi;
}
else {
iot_printf("current can not support this proto:%d\n", proto);
}
return 0;
}
uint32_t mac_rid_get_p_tmi(uint32_t proto, uint32_t rid, uint32_t *p_tmi)
{
uint32_t tmi= 0, extmi = 0;
phy_get_tmi_by_rid(proto, (uint8_t)rid, &tmi, &extmi);
mac_tmi_get_p_tmi(proto, tmi, extmi, p_tmi);
return 0;
}
uint32_t mac_add_sof_err_cnt(uint32_t proto, uint32_t rid, uint8_t pb_num)
{
uint32_t p_tmi;
mac_rid_get_p_tmi(proto, rid, &p_tmi);
if (p_tmi >= P_TMI_MAX || pb_num == 0 || pb_num > MAX_PB_NUM_4) {
g_mac_pdev[PLC_PDEV_ID]->mac_status.sof_err_st.illega_pkt_cnt++;
iot_printf("illega-pkt_cnt = %d\n",\
g_mac_pdev[PLC_PDEV_ID]->mac_status.sof_err_st.illega_pkt_cnt);
}
else {
g_mac_pdev[PLC_PDEV_ID]->mac_status.sof_err_st.sof_err_cnt[p_tmi][pb_num]++;
}
return 0;
}
uint32_t mac_get_sof_err_cnt(uint32_t proto, uint32_t rid, uint8_t pb_num)
{
uint32_t p_tmi;
if (rid == MAX_RATE_IDX) {
return (uint32_t)-1;
}
mac_rid_get_p_tmi(proto, rid, &p_tmi);
if (p_tmi >= P_TMI_MAX || pb_num == 0 || pb_num > MAX_PB_NUM_4) {
return (uint32_t)-1;
}
else {
return (int)g_mac_pdev[PLC_PDEV_ID]->mac_status.sof_err_st.sof_err_cnt[p_tmi][pb_num];
}
}
uint32_t mac_get_sof_err_cnt_by_ptmi(uint32_t p_tmi, uint8_t pb_num)
{
if (p_tmi >= P_TMI_MAX || pb_num == 0 || pb_num > MAX_PB_NUM_4) {
return (uint32_t)-1;
}
else {
return (int)g_mac_pdev[PLC_PDEV_ID]->mac_status.sof_err_st.sof_err_cnt[p_tmi][pb_num];
}
}
uint32_t mac_status_cnt_clr()
{
/* not clear mac status */
return 0;
}
uint32_t mac_add_sof_pbcrc_err_print_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.sof_err_st.record_depth++;
return 0;
}
uint32_t mac_get_sof_pbcrc_err_print_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.sof_err_st.record_depth;
}
uint32_t mac_clr_sof_pbcrc_err_print_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.sof_err_st.record_depth = 0;
return 0;
}
uint32_t mac_get_auto_power_req_reason_bitmap()
{
return g_mac_pdev[PLC_PDEV_ID]->vdev[PLC_DEFAULT_VDEV]->high_power_req_reason_bitmap;
}
uint32_t mac_get_power_cap_set_flag()
{
return g_mac_pdev[PLC_PDEV_ID]->vdev[PLC_DEFAULT_VDEV]->fixed_power_cap_flag;
}
void mac_status_add_zc_reset_hw_cnt(void)
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.zc_record.cnt.reset_hw_cnt++;
}
uint32_t mac_status_get_zc_reset_hw_cnt(void)
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.zc_record.cnt.reset_hw_cnt;
}
void mac_status_add_zc_event_cnt(void)
{
mac_status_zc_cnt_t *zc_cnt =
&g_mac_pdev[PLC_PDEV_ID]->mac_status.zc_record.cnt;
zc_cnt->event_cnt++;
}
uint32_t mac_status_get_zc_event_cnt(void)
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.zc_record.cnt.event_cnt;
}
void mac_status_add_zc_phase_chg_cnt(uint8_t phase_id)
{
mac_status_zc_cnt_t *zc_cnt =
&g_mac_pdev[PLC_PDEV_ID]->mac_status.zc_record.cnt;
switch(phase_id) {
case MAC_ZC_PHASE_A:
zc_cnt->phase_a_change_cnt++;
break;
case MAC_ZC_PHASE_B:
zc_cnt->phase_b_change_cnt++;
break;
case MAC_ZC_PHASE_C:
zc_cnt->phase_c_change_cnt++;
break;
default:
break;
}
}
uint32_t mac_status_get_zc_phase_chg_cnt(uint8_t phase_id)
{
mac_status_zc_cnt_t *zc_cnt =
&g_mac_pdev[PLC_PDEV_ID]->mac_status.zc_record.cnt;
switch(phase_id) {
case MAC_ZC_PHASE_A:
return zc_cnt->phase_a_change_cnt;
case MAC_ZC_PHASE_B:
return zc_cnt->phase_b_change_cnt;
case MAC_ZC_PHASE_C:
return zc_cnt->phase_c_change_cnt;
default:
return 0;
}
}
void mac_status_add_zc_req_cnt(void)
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.zc_record.cnt.zc_req_cnt++;
}
uint32_t mac_status_get_zc_req_cnt(void)
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.zc_record.cnt.zc_req_cnt;
}
void mac_status_zc_status_para_update(uint8_t phase_status,
uint8_t phase_id)
{
mac_status_zc_para_t *zc_para = \
&g_mac_pdev[PLC_PDEV_ID]->mac_status.zc_record.para;
switch(phase_id) {
case MAC_ZC_PHASE_A:
zc_para->phase_a_status = phase_status;
break;
case MAC_ZC_PHASE_B:
zc_para->phase_b_status = phase_status;
break;
case MAC_ZC_PHASE_C:
zc_para->phase_c_status = phase_status;
break;
default:
break;
}
}
void mac_status_zc_nv_para_update(uint8_t is_half_clct,
uint8_t cap_edge, uint8_t support_btm, uint8_t is_switch_gpio_clct)
{
mac_status_zc_para_t *zc_para =
&g_mac_pdev[PLC_PDEV_ID]->mac_status.zc_record.para;
zc_para->hw_is_half_clct = is_half_clct;
zc_para->hw_cap_edge = cap_edge;
zc_para->support_btm = support_btm;
zc_para->is_switch_gpio_clct = is_switch_gpio_clct;
}
uint32_t mac_status_get_zc_phase_para(void)
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.zc_record.para.data;
}
uint32_t mac_add_flush_tx_bcsma_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_tx_bcsma_flush_q_cnt++;
return 0;
}
uint32_t mac_get_flush_tx_bcsma_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_tx_bcsma_flush_q_cnt;
}
uint32_t mac_add_timeout_stream_del_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.stream_status.timeout_cnt++;
return 0;
}
uint32_t mac_get_timeout_stream_del_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.stream_status.timeout_cnt;
}
uint32_t mac_add_overflow_peer_del_cnt(mac_peer_type_t peer_type)
{
mac_peer_status_t *peer_status;
peer_status = &g_mac_pdev[PLC_PDEV_ID]->mac_status.peer_status;
switch (peer_type) {
case PEER_SUB:
peer_status->del_cnt.sub_peer_del_cnt++;
break;
case PEER_TMP:
peer_status->del_cnt.temp_peer_del_cnt++;
break;
case PEER_FAIL:
peer_status->del_cnt.peer_del_fail_cnt++;
break;
default:
break;
}
return 0;
}
uint32_t mac_get_overflow_peer_del_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.peer_status.cnt;
}
void mac_peer_stream_overflow_cnt_dbglog()
{
mac_vdev_t *vdev = get_vdev_ptr(0, 0);
uint32_t str_overflow_max = 0;
uint32_t rf_ppm_cnt, rf_plc_ntb_ppm, rf_hw_ppm;
rf_plc_ntb_ppm = (uint16_t)vdev->mac_ppm.ntb_ppm;
#if (HPLC_RF_DEV_SUPPORT && (HW_PLATFORM >= HW_PLATFORM_FPGA))
mac_rf_vdev_t *rf_vdev;
rf_vdev = get_rf_vdev_ptr(PLC_PDEV_ID, PLC_DEFAULT_VDEV, PLC_DEFAULT_VDEV);
rf_ppm_cnt = rf_vdev->ntb_ppm_update_cnt;
rf_plc_ntb_ppm |= (uint16_t)rf_vdev->rf_ntb_ppm << 16;
rf_hw_ppm = (uint16_t)mac_rf_get_wphy_ppm() << 16;
#else
rf_ppm_cnt = 0;
rf_hw_ppm = 0;
#endif
(void)rf_ppm_cnt;
(void)rf_plc_ntb_ppm;
(void)rf_hw_ppm;
for (uint8_t i = 0; i < min(2, MAX_VDEV_NUM); i++) {
str_overflow_max = max(str_overflow_max, vdev[i].stream_overflow_cnt);
}
iot_dbglog_input(PLC_MAC_DESC_ENGINE_MID, DBGLOG_ERR,
IOT_MAC_DESC5_ID, 6,
str_overflow_max, mac_get_overflow_peer_del_cnt(),
vdev->mac_ppm.ntb_ppm_update_cnt, rf_ppm_cnt,
rf_plc_ntb_ppm, rf_hw_ppm);
}
void mac_add_msdu_tx_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_msdu_tx_cnt++;
}
uint32_t mac_get_msdu_tx_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.mac_msdu_tx_cnt;
}
void mac_add_send_msdu_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.send_msdu_trigger_cnt++;
}
uint32_t mac_get_send_msdu_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.send_msdu_trigger_cnt;
}
void mac_add_swq_to_hwq_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.swq_to_hwq_cnt++;
}
uint32_t mac_get_swq_to_hwq_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.swq_to_hwq_cnt;
}
void mac_add_tx_msdu_comp_trigger_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.tx_msdu_comp_trigger_cnt++;
}
uint32_t mac_get_tx_msdu_comp_trigger_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.tx_msdu_comp_trigger_cnt;
}
void mac_add_csma_ignore_cca_cnt()
{
g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.csma_ignore_cca_cnt++;
}
uint32_t mac_get_csma_ignore_cca_cnt()
{
return g_mac_pdev[PLC_PDEV_ID]->mac_status.tx_status.csma_ignore_cca_cnt;
}
uint8_t mac_log_print_en = 0;
void mac_get_status_printf()
{
mac_log_print_en = 1;
iot_dbglog_input(PLC_MAC_STATUSE_MID, DBGLOG_ERR,
IOT_MAC_STATUS0_ID, 9,\
(uint32_t)mac_sched_get_ntb(g_mac_pdev[PLC_PDEV_ID]->vdev[PLC_DEFAULT_VDEV]),
mac_get_rx_msdu_null_first_pb_cnt(),\
mac_get_tx_underflow_cnt(),\
mac_get_rx_half_pkt_cnt(),\
mac_get_rx_att_not_done_cnt(),\
mac_get_rx_proto_nomatch_cnt(),\
mac_get_rx_bcn_ok_cnt(),\
mac_get_rx_bcn_upload_cnt(),\
mac_get_isr_cnt());
iot_dbglog_input(PLC_MAC_STATUSE_MID, DBGLOG_ERR,
IOT_MAC_STATUS1_ID, 9,\
mac_get_rx_msdu_cnt(),\
mac_get_rx_mpdu_cnt(),\
mac_get_rx_pb_cnt(),\
mac_get_rx_fc_err_cnt(),\
mac_get_rx_bcn_pb_err_cnt(),\
mac_get_rx_sof_pb_err_cnt(),\
mac_get_rx_pld_err_cnt(),\
mac_get_rx_abort_cnt(),\
mac_get_rx_overflow_cnt());
iot_dbglog_input(PLC_MAC_STATUSE_MID, DBGLOG_ERR,
IOT_MAC_STATUS2_ID, 9,\
mac_get_rx_unicast_cnt(),\
mac_get_rx_broadcast_cnt(),\
mac_get_rx_mpdu_type_err_cnt(),\
mac_get_mpdu_tx_cnt(),\
mac_get_tx_no_ack_cnt(0),\
mac_get_mpdu_tx_unicast_cnt(0),\
mac_get_mpdu_tx_broadcast_cnt(),\
mac_get_no_msdu_to_send_cnt(),\
mac_get_rx_msdu_crc_err_cnt());
#if MAC_RID_PBNUM_FLASH_LOG
mac_add_sof_pbcrc_err_print_cnt();
if(mac_get_sof_pbcrc_err_print_cnt() >= MAX_SOF_ERR_CNT_DEPTH)
{
mac_clr_sof_pbcrc_err_print_cnt();
iot_dbglog_input(PLC_MAC_STATUSE_MID, DBGLOG_ERR,
IOT_MAC_STATUS3_ID, 9,\
mac_get_sof_err_cnt_by_ptmi(P_TMI_0, 0),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_0, 1),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_0, 2),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_0, 3),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_1, 0),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_1, 1),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_1, 2),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_1, 3),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_2, 0));
iot_dbglog_input(PLC_MAC_STATUSE_MID, DBGLOG_ERR,
IOT_MAC_STATUS4_ID, 9,\
mac_get_sof_err_cnt_by_ptmi(P_TMI_2, 1),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_2, 2),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_2, 3),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_3, 0),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_3, 1),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_3, 2),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_3, 3),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_4, 0),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_4, 1));
iot_dbglog_input(PLC_MAC_STATUSE_MID, DBGLOG_ERR,
IOT_MAC_STATUS5_ID, 9,\
mac_get_sof_err_cnt_by_ptmi(P_TMI_4, 2),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_4, 3),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_6, 0),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_6, 1),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_6, 2),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_6, 3),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_7, 0),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_7, 1),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_7, 2));
iot_dbglog_input(PLC_MAC_STATUSE_MID, DBGLOG_ERR,
IOT_MAC_STATUS6_ID, 9,\
mac_get_sof_err_cnt_by_ptmi(P_TMI_9, 0),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_9, 1),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_9, 2),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_9, 3),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_11, 0),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_11, 1),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_11, 2),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_11, 3),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_12, 0));
iot_dbglog_input(PLC_MAC_STATUSE_MID, DBGLOG_ERR,
IOT_MAC_STATUS7_ID, 9,\
mac_get_sof_err_cnt_by_ptmi(P_TMI_12, 1),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_12, 2),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_12, 3),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_13, 0),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_13, 1),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_13, 2),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_13, 3),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_14, 0),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_14, 1));
iot_dbglog_input(PLC_MAC_STATUSE_MID, DBGLOG_ERR,
IOT_MAC_STATUS8_ID, 9,\
mac_get_sof_err_cnt_by_ptmi(P_TMI_14, 2),\
mac_get_sof_err_cnt_by_ptmi(P_TMI_14, 3),\
mac_get_sof_err_cnt_by_ptmi(P_EXTMI_6, 0),\
mac_get_sof_err_cnt_by_ptmi(P_EXTMI_6, 1),\
mac_get_sof_err_cnt_by_ptmi(P_EXTMI_6, 2),\
mac_get_sof_err_cnt_by_ptmi(P_EXTMI_6, 3),\
mac_get_sof_err_cnt_by_ptmi(P_EXTMI_11, 0),\
mac_get_sof_err_cnt_by_ptmi(P_EXTMI_11, 1),\
mac_get_sof_err_cnt_by_ptmi(P_EXTMI_11, 2));
iot_dbglog_input(PLC_MAC_STATUSE_MID, DBGLOG_ERR,
IOT_MAC_STATUS9_ID, 9,\
mac_get_sof_err_cnt_by_ptmi(P_EXTMI_11, 3),\
mac_get_sof_err_cnt_by_ptmi(P_EXTMI_12, 0),\
mac_get_sof_err_cnt_by_ptmi(P_EXTMI_12, 1),\
mac_get_sof_err_cnt_by_ptmi(P_EXTMI_12, 2),\
mac_get_sof_err_cnt_by_ptmi(P_EXTMI_12, 3),\
mac_get_sof_err_cnt_by_ptmi(P_EXTMI_13, 0),\
mac_get_sof_err_cnt_by_ptmi(P_EXTMI_13, 1),\
mac_get_sof_err_cnt_by_ptmi(P_EXTMI_13, 2),\
mac_get_sof_err_cnt_by_ptmi(P_EXTMI_13, 3));
}
#endif
iot_dbglog_input(PLC_MAC_STATUSE_MID, DBGLOG_ERR,
IOT_MAC_STATUS10_ID, 9,\
mac_get_rx_msdu_len_is_0_cnt(), \
mac_get_power_cap_set_flag(), \
mac_get_auto_power_req_reason_bitmap(),
mac_status_get_zc_reset_hw_cnt(),
mac_status_get_zc_event_cnt(),
mac_status_get_zc_req_cnt(),
mac_status_get_zc_phase_para(),
mac_get_dsr_isr_sync_cnt(),
mac_get_timeout_stream_del_cnt());
iot_dbglog_input(PLC_MAC_STATUSE_MID, DBGLOG_ERR,
IOT_MAC_STATUS11_ID, 9,\
mac_get_tx_no_ack_cnt(1), \
mac_get_mpdu_tx_unicast_cnt(1), \
mac_get_tx_unicast_all_pb_err_cnt(0), \
mac_get_tx_unicast_all_pb_err_cnt(1), \
mac_get_rx_fc_err_no_match_cnt(), \
mac_get_flush_tx_bcsma_cnt(),
mac_status_get_zc_phase_chg_cnt(MAC_ZC_PHASE_A),
mac_status_get_zc_phase_chg_cnt(MAC_ZC_PHASE_B),
mac_status_get_zc_phase_chg_cnt(MAC_ZC_PHASE_C));
mac_pdev_t *pdev = get_pdev_ptr(PLC_PDEV_ID);
iot_dbglog_input(PLC_MAC_STATUSE_MID, DBGLOG_ERR,
IOT_MAC_STATUS12_ID, 8,
(pdev->mac_status.sync_ntb_record.way1_success_cnt << 16 |
pdev->mac_status.sync_ntb_record.sync_ntb_ovf_way1_cnt),
(pdev->mac_status.sync_ntb_record.way2_success_cnt << 16 |
pdev->mac_status.sync_ntb_record.sync_ntb_ovf_way2_cnt),
(pdev->mac_status.sync_ntb_record.way3_success_cnt << 16 |
pdev->mac_status.sync_ntb_record.sync_ntb_ovf_way3_cnt),
(pdev->mac_status.sync_ntb_record.way4_success_cnt << 16 |
pdev->mac_status.sync_ntb_record.sync_ntb_ovf_way4_cnt),
pdev->mac_status.sync_ntb_record.sync_ntb_ovf_way5_cnt,
pdev->mac_status.sync_ntb_record.sync_ntb_ovf_way6_cnt,
mac_get_rx_bcn_err_cnt(),
mac_get_rx_fc_invalid_cnt());
(void)pdev;
mac_peer_stream_overflow_cnt_dbglog();
mac_desc_info_dump(&g_mac_desc_eng);
/* rf cnt record */
#if (HPLC_RF_DEV_SUPPORT && (HW_PLATFORM >= HW_PLATFORM_FPGA))
iot_dbglog_input(PLC_MAC_STATUSE_MID, DBGLOG_ERR,
IOT_MAC_STATUS17_ID, 9,
mac_rf_get_tx_ok_with_pld_cnt(),
mac_rf_get_tx_ok_without_pld_cnt(),
mac_rf_get_rx_sig_ok_cnt(),
(mac_rf_get_rx_sig_err_cnt() | (mac_rf_get_lost_stf_cnt() << 16)),
mac_rf_get_rx_phr_ok_with_pld_cnt(),
mac_rf_get_rx_phr_ok_without_pld_cnt(),
mac_rf_get_rx_phr_err_cnt(),
mac_rf_get_rx_pld_ok_cnt(),
mac_rf_get_rx_pld_err_cnt());
#endif
}
//TODO: modify parameter list to array parameter
void mac_dump_buf(MAC_DUMP_TYPE type, uint32_t *desc, uint32_t desc_len,
uint32_t *buf_addr0, uint32_t value_len0, uint32_t *buf_addr1,
uint32_t value_len1, uint8_t is_assert)
{
#if (HW_PLATFORM >= HW_PLATFORM_FPGA)
const uint32_t dump_value[]={0x00, 0x01, 0x02, 0x10, 0x11, 0x12, 0x21, 0x20,
0x22, 0x30, 0x31, 0x32, 0x40, 0x41, 0x42, 0x50,
0x51, 0x52, 0x60, 0x61, 0x62, 0x63, 0x70, 0x71,
0xa0, 0xa1, 0xa2, 0xa3, 0xb0, 0xb1, 0xb2, 0x100,
0x108, 0x110, 0x118, 0x120, 0x320, 0x340, 0x360,
0x361, 0x380, 0x381, 0x3a0, 0x3c0, 0x3c1, 0x3c2,
0x3c3, 0x3c4, 0x3c5, 0x3c6, 0x3c7, 0x3c8, 0x3c9,
0x3ca, 0x3cb, 0x3cc, 0x3cd, 0x3ce, 0x3cf, 0x3d0,
0x3d1, 0x3d2, 0x3d3, 0x3d4, 0x400, 0x401, 0x402,
0x404, 0x405, 0x600, 0x601, 0x800, 0x900, 0xa00, 0xb00};
uint32_t debug_tmp =0;
uint32_t value_len2 = 0;
/* sizeof(dump_value) / 4 * 2 */
uint32_t dump_len = sizeof(dump_value) >> 1;
mac_pdev_t *pdev = get_pdev_ptr(PLC_PDEV_ID);
uint32_t *tmp = NULL;
if (is_assert) {
if (pdev->dump_pkt == NULL) {
IOT_PKT_GET(pdev->dump_pkt, 1024, 0, PLC_MAC_RX_HW_MID);
if (pdev->dump_pkt) {
tmp = (uint32_t *)iot_pkt_put(pdev->dump_pkt, 1024);
} else {
/*if sta can not get pkt, force not assert*/
is_assert = 0;
}
} else {
tmp = (uint32_t *)iot_pkt_put(pdev->dump_pkt, 1024);
}
}
#if DEBUG_CANNOT_SENDOUT_PKT
{
value_len2 += 2;
g_phy_cpu_share_ctxt.isr_cnt1 = mac_get_isr_cnt();
iot_printf("cnt = %d, %d\n", g_phy_cpu_share_ctxt.isr_cnt0,
g_phy_cpu_share_ctxt.isr_cnt1);
if (is_assert) {
*tmp++ = g_phy_cpu_share_ctxt.isr_cnt0;
*tmp++ = g_phy_cpu_share_ctxt.isr_cnt1;
}
}
#endif
{
value_len2 += 3;
mac_dsr_table_t *table = &p_mac_glb->dsr_table;
iot_printf("tx_dsr=0x%x,rx_dsr=0x%x,sync_dsr=0x%x\n",
table->entry[MAC_DSR_MPDU_TX_COMP_ID].dsr,
table->entry[MAC_DSR_MPDU_RX_ID].dsr,
table->entry[MAC_DSR_ISR_SYNC_ID].dsr);
if (is_assert) {
*tmp++ = (uint32_t)table->entry[MAC_DSR_MPDU_TX_COMP_ID].dsr;
*tmp++ = (uint32_t)table->entry[MAC_DSR_MPDU_RX_ID].dsr;
*tmp++ = (uint32_t)table->entry[MAC_DSR_ISR_SYNC_ID].dsr;
}
}
#if DEBUG_HWQ_SHCED_HANG
{
/* crash reason */
if (is_assert) {
value_len2 += 1;
*tmp++ = (type << 24 | pdev->dbg_status);
}
}
#else
(void)type;
#endif
/* nf dump */
{
/* warm reset to check if still high nf */
phy_reset(PHY_RST_REASON_WARM);
value_len2 += 4;
for (uint8_t nf_idx = 0; nf_idx < 4; nf_idx++) {
debug_tmp = phy_rx_nf_by_rxtd_get(13);
if (is_assert) {
*tmp++ = debug_tmp;
}
}
}
/*1.part one: mpdu description */
if (desc != NULL) {
if (is_assert) {
os_mem_cpy((void *)tmp, (void *)desc, desc_len * sizeof(uint32_t));
tmp = tmp + desc_len;
}
iot_printf("desc to buf data:\n");
/*dump desc to printf*/
mem_dump(desc, desc_len);
}
/*2.part two: set 0x51000028 ,and read valu */
for (uint8_t i=0; i < (dump_len >> 1); i++) {
mac_set_debug_reg(dump_value[i]);
debug_tmp = mac_rx_get_debug_reg();
if (is_assert) {
*(tmp++) = dump_value[i];
*(tmp++) = debug_tmp;
}
iot_printf("debug_reg set 0x%x, get 0x%x\n", dump_value[i], debug_tmp);
}
mac_set_reg_tx_abort_debug_value();
/*3.part three: dump mac reg */
if (buf_addr0 != NULL) {
iot_printf("0x%08x--0x%08x to buf:\n",
buf_addr0, buf_addr0 + value_len0);
mem_dump(buf_addr0, value_len0);
if (is_assert) {
//copy to pkt
os_mem_cpy(tmp, buf_addr0, value_len0 * sizeof(uint32_t));
tmp += value_len0;
}
}
if (buf_addr1 != NULL) {
iot_printf("0x%08x--0x%08x to buf:\n",
buf_addr1, buf_addr1 + value_len1);
mem_dump(buf_addr1, value_len1);
if(is_assert) {
//copy to pkt
os_mem_cpy(tmp, buf_addr1, value_len1 * sizeof(uint32_t));
tmp += value_len1;
}
}
if (is_assert) {
uint32_t value_len = 0;
(buf_addr0 != NULL)?
((buf_addr1 != NULL)?
(value_len = value_len0 + value_len1):(value_len = value_len0)):
((buf_addr1 != NULL)?
(value_len = value_len1):(value_len = 0));
/* write data to flash and crash it */
IOT_ASSERT_DUMP(0,
(uint32_t *)iot_pkt_block_ptr(pdev->dump_pkt, IOT_PKT_BLOCK_DATA),
(desc != NULL)?(value_len2 + dump_len + value_len + desc_len):
(value_len2 + dump_len + value_len));
}
#else
(void)type;
(void)desc;
(void)desc_len;
(void)buf_addr0;
(void)value_len0;
(void)buf_addr1;
(void)value_len1;
(void)is_assert;
#endif
}
void mac_phy_print_debug_info()
{
#if DEBUG_CANNOT_SENDOUT_PKT
iot_printf("%s\n", __FUNCTION__);
mac_pdev_t *pdev = get_pdev_ptr(PLC_PDEV_ID);
if(pdev->plc_tx_st == PLC_DEBUG_NORMAL_ST)
{
os_stop_timer(pdev->plc_tx_timer);
os_start_timer(pdev->plc_tx_timer, 1*1000); //1s
pdev->plc_tx_st = PLC_DEBUG_PRINTF_ST;
}
else if(pdev->plc_tx_st == PLC_DEBUG_PRINTF_ST)
{
pdev->plc_debug_cnt++;
phy_dbg_sts_print();
if(pdev->plc_debug_cnt >= PLC_DEBUG_PHY_CNT)
{
extern void mac_tx_csma_dump();
mac_tx_csma_dump();
mac_dump_buf(MAC_DUMP_TYPE_6,
(void *)RGF_HWQ_READ_REG(CFG_SCH_CUR_PTR_ADDR), 40,
(uint32_t *)RGF_HWQ_BASEADDR, 109,
(uint32_t *)RGF_MAC_BASEADDR, 140, true);
}
}
#endif
}
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