264 lines
12 KiB
C
264 lines
12 KiB
C
/**
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******************************************************************************
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* @file misc.h
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* @author MCD Application Team
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* @version V3.5.0
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* @date 11-March-2011
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* @brief This file contains all the functions prototypes for the miscellaneous
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* firmware library functions (add-on to CMSIS functions).
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******************************************************************************
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* @attention
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __MISC_H
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#define __MISC_H
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typedef enum IRQn
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{
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/****** Cortex-M3 Processor Exceptions Numbers ***************************************************/
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NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
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MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
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BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
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UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
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SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
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DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
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PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
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SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
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/****** STM32 specific Interrupt Numbers *********************************************************/
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WWDG_IRQn = 0, /*!< Window WatchDog Interrupt */
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PVD_IRQn = 1, /*!< PVD through EXTI Line detection Interrupt */
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TAMPER_IRQn = 2, /*!< Tamper Interrupt */
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RTC_IRQn = 3, /*!< RTC global Interrupt */
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FLASH_IRQn = 4, /*!< FLASH global Interrupt */
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RCC_IRQn = 5, /*!< RCC global Interrupt */
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EXTI0_IRQn = 6, /*!< EXTI Line0 Interrupt */
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EXTI1_IRQn = 7, /*!< EXTI Line1 Interrupt */
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EXTI2_IRQn = 8, /*!< EXTI Line2 Interrupt */
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EXTI3_IRQn = 9, /*!< EXTI Line3 Interrupt */
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EXTI4_IRQn = 10, /*!< EXTI Line4 Interrupt */
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DMA1_Channel1_IRQn = 11, /*!< DMA1 Channel 1 global Interrupt */
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DMA1_Channel2_IRQn = 12, /*!< DMA1 Channel 2 global Interrupt */
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DMA1_Channel3_IRQn = 13, /*!< DMA1 Channel 3 global Interrupt */
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DMA1_Channel4_IRQn = 14, /*!< DMA1 Channel 4 global Interrupt */
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DMA1_Channel5_IRQn = 15, /*!< DMA1 Channel 5 global Interrupt */
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DMA1_Channel6_IRQn = 16, /*!< DMA1 Channel 6 global Interrupt */
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DMA1_Channel7_IRQn = 17, /*!< DMA1 Channel 7 global Interrupt */
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} IRQn_Type;
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#include <stdint.h>
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#include "core_cm3.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus;
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typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
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#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
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typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus;
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#define assert_param(expr) ((void)0)
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/** @addtogroup STM32F10x_StdPeriph_Driver
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* @{
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*/
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/** @addtogroup MISC
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* @{
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*/
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/** @defgroup MISC_Exported_Types
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* @{
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*/
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/**
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* @brief NVIC Init Structure definition
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*/
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typedef struct
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{
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uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled.
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This parameter can be a value of @ref IRQn_Type
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(For the complete STM32 Devices IRQ Channels list, please
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refer to stm32f10x.h file) */
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uint8_t NVIC_IRQChannelPreemptionPriority; /*!< Specifies the pre-emption priority for the IRQ channel
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specified in NVIC_IRQChannel. This parameter can be a value
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between 0 and 15 as described in the table @ref NVIC_Priority_Table */
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uint8_t NVIC_IRQChannelSubPriority; /*!< Specifies the subpriority level for the IRQ channel specified
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in NVIC_IRQChannel. This parameter can be a value
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between 0 and 15 as described in the table @ref NVIC_Priority_Table */
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FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel
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will be enabled or disabled.
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This parameter can be set either to ENABLE or DISABLE */
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} NVIC_InitTypeDef;
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/**
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* @}
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*/
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/** @defgroup NVIC_Priority_Table
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* @{
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*/
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/**
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@code
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The table below gives the allowed values of the pre-emption priority and subpriority according
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to the Priority Grouping configuration performed by NVIC_PriorityGroupConfig function
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============================================================================================================================
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NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description
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============================================================================================================================
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NVIC_PriorityGroup_0 | 0 | 0-15 | 0 bits for pre-emption priority
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| | | 4 bits for subpriority
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----------------------------------------------------------------------------------------------------------------------------
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NVIC_PriorityGroup_1 | 0-1 | 0-7 | 1 bits for pre-emption priority
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| | | 3 bits for subpriority
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----------------------------------------------------------------------------------------------------------------------------
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NVIC_PriorityGroup_2 | 0-3 | 0-3 | 2 bits for pre-emption priority
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| | | 2 bits for subpriority
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----------------------------------------------------------------------------------------------------------------------------
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NVIC_PriorityGroup_3 | 0-7 | 0-1 | 3 bits for pre-emption priority
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| | | 1 bits for subpriority
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----------------------------------------------------------------------------------------------------------------------------
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NVIC_PriorityGroup_4 | 0-15 | 0 | 4 bits for pre-emption priority
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| | | 0 bits for subpriority
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============================================================================================================================
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@endcode
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*/
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/**
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* @}
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*/
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/** @defgroup MISC_Exported_Constants
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* @{
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*/
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/** @defgroup Vector_Table_Base
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* @{
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*/
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#define NVIC_VectTab_RAM ((uint32_t)0x20000000)
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#define NVIC_VectTab_FLASH ((uint32_t)0x08000000)
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#define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \
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((VECTTAB) == NVIC_VectTab_FLASH))
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/**
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* @}
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*/
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/** @defgroup System_Low_Power
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* @{
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*/
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#define NVIC_LP_SEVONPEND ((uint8_t)0x10)
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#define NVIC_LP_SLEEPDEEP ((uint8_t)0x04)
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#define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02)
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#define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
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((LP) == NVIC_LP_SLEEPDEEP) || \
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((LP) == NVIC_LP_SLEEPONEXIT))
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/**
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* @}
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*/
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/** @defgroup Preemption_Priority_Group
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* @{
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*/
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#define NVIC_PriorityGroup_0 ((uint32_t)0x700) /*!< 0 bits for pre-emption priority
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4 bits for subpriority */
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#define NVIC_PriorityGroup_1 ((uint32_t)0x600) /*!< 1 bits for pre-emption priority
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3 bits for subpriority */
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#define NVIC_PriorityGroup_2 ((uint32_t)0x500) /*!< 2 bits for pre-emption priority
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2 bits for subpriority */
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#define NVIC_PriorityGroup_3 ((uint32_t)0x400) /*!< 3 bits for pre-emption priority
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1 bits for subpriority */
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#define NVIC_PriorityGroup_4 ((uint32_t)0x300) /*!< 4 bits for pre-emption priority
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0 bits for subpriority */
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#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \
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((GROUP) == NVIC_PriorityGroup_1) || \
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((GROUP) == NVIC_PriorityGroup_2) || \
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((GROUP) == NVIC_PriorityGroup_3) || \
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((GROUP) == NVIC_PriorityGroup_4))
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#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
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#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
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#define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF)
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/**
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* @}
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*/
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/** @defgroup SysTick_clock_source
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* @{
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*/
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#define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB)
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#define SysTick_CLKSource_HCLK ((uint32_t)0x00000004)
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#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \
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((SOURCE) == SysTick_CLKSource_HCLK_Div8))
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/**
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* @}
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*/
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/**
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* @}
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*/
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/** @defgroup MISC_Exported_Macros
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup MISC_Exported_Functions
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* @{
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*/
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void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup);
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void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
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void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset);
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void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState);
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void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __MISC_H */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
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