599 lines
20 KiB
C
Executable File
599 lines
20 KiB
C
Executable File
#include "chip_reg_base.h"
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#include "hw_reg_api.h"
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#include "hw_tonemask.h"
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#include "tx_mpdu_end.h"
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#include "tx_pb_start.h"
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#include "plc_utils.h"
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#include "ada_reg.h"
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#include "hw_phy_init.h"
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#include "phy_reg.h"
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#include "mpdu_frame.h"
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#include "ahb.h"
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#include "iot_irq.h"
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#include "os_mem.h"
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#include "apb_glb_reg.h"
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#include "command_list.h"
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#include "dbg_io.h"
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#include "iot_config.h"
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#include "iot_io.h"
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#include "iot_pkt_api.h"
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#include "mac_tx_hw.h"
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#include "mac_rx_hw.h"
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#include "os_utils.h"
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#include "tx_entry.h"
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#include "hal_rx.h"
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#include "iot_crc_api.h"
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#include "hw_tx.h"
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#include "mac_sys_reg.h"
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#include "mac_reset.h"
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#include "mac_key_hw.h"
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#include "phy_tmap.h"
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#include "phy_rand_tmap.h"
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#include "phy_chn.h"
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/* if mem fun is not ready, use global heap */
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volatile tx_mpdu_start *mpdu_start;
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tx_mpdu_end *mpdu_end;
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tx_pb_start *pb_start,*pb_second,*pb_third,*pb_last;
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#if IOT_DTEST_ONLY_SUPPORT == 1
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tx_mpdu_start mpdu_start_tmp;
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tx_mpdu_end mpdu_end_tmp;
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tx_pb_start pb_start_tmp,pb_second_tmp,pb_third_tmp,pb_last_tmp;
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uint8_t pb_buf[MAC_PB_SIZE_MAX] = { 0 };
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uint8_t pb_buf_second[MAC_PB_SIZE_MAX] = { 0 };
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uint8_t pb_buf_third[MAC_PB_SIZE_MAX] = { 0 };
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uint8_t pb_buf_last[MAC_PB_SIZE_MAX] = { 0 };
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uint16_t band_cnt[MAC_BB_MAX_RATE][MAX_HW_BAND] = {0};
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#else
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uint8_t *pb_buf;
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uint8_t *pb_buf_second;
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uint8_t *pb_buf_third;
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uint8_t *pb_buf_last;
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uint16_t *band_cnt[MAC_BB_MAX_RATE];
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#endif
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/* mac tx beacon test - with 7000 GP protocol */
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#if EDA_SIMU_SUPPORT == 1
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uint32_t bcn_period_ms = 2;
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#elif MAC_TX_TEST_ID == MAC_TX_BURN
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uint32_t bcn_period_ms = 12;
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#else
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uint32_t bcn_period_ms = 20 << 1;
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#endif
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uint32_t print_tx_period_ms=4000; /*receive 25*4 packets in 4s*/
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uint8_t delay_time = 0;
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volatile bool_t mac_beacon_alert_flag = false;
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volatile bool_t mac_tx_complete_flag = false;
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/* tx glb cfg */
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iot_tx_cfg_info_t glb_cfg = {
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PHY_PHASE_OVR_A, \
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PLC_PROTO_TYPE_SG, \
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FC_DELIM_SOF , \
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MAC_TX_TEST_ID, \
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MAC_TMI_ID, \
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MAC_PB_NUM_ID, \
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IOT_PLC_PHY_BAND_DFT, \
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/* tmap gi */
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PHY_GI_417, \
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MAC_DESC_SRC_TEI, \
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MAC_DESC_DST_TEI, \
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/* hwq number */
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1, \
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HW_DESC_PPDU_MODE_AVONLY_1FCSYM, \
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/* mpdu number, Must 0 for GP */
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0, \
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/* tmap turbo rate */
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PHY_TURBO_RATE_16_21, \
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/* modulation */
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PHY_MODU_64QAM, \
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/* nid */
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PHY_TXRX_NID_VAL, \
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IOT_RATE_MODE_TX, \
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false};
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void mac_encry_mode_init_test(uint8_t vlan_num, \
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uint8_t key_tbl_num, uint8_t key_num)
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{
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uint8_t vlan_idx, key_tbl_idx, key_idx;
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mac_avln_t *avln_ptr;
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mac_key_table_t *key_tbl;
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mac_key_entry *key;
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mac_avln_ctxt_init(vlan_num);
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for(vlan_idx = 0; vlan_idx < vlan_num; vlan_idx++)
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{
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mac_avln_init(vlan_idx, key_tbl_num);
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avln_ptr = (g_mac_avln_ctxt.mac_avln_array + vlan_idx);
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for(key_tbl_idx = 0; key_tbl_idx < key_tbl_num; key_tbl_idx++)
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{
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key_tbl = (avln_ptr->key_tbl + key_tbl_idx);
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mac_key_tbl_init(key_tbl, key_num);
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}
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}
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for(vlan_idx = 0; vlan_idx < vlan_num; vlan_idx++)
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{
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avln_ptr = (g_mac_avln_ctxt.mac_avln_array + vlan_idx);
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for(key_tbl_idx = 0; key_tbl_idx < key_tbl_num; key_tbl_idx++)
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{
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key_tbl = (avln_ptr->key_tbl + key_tbl_idx);
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for(key_idx = 0; key_idx < key_num; key_idx++)
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{
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key = (key_tbl->key_array + key_idx);
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mac_key_set(key, 0, vlan_idx, key_tbl_idx, key_idx);
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}
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}
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}
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key = g_mac_avln_ctxt.mac_avln_array->key_tbl->key_array;
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mac_key_set(key, 0x12345678, 0x23456789, 0x3456789a, 0x456789ab);
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for(vlan_idx = 0; vlan_idx < vlan_num; vlan_idx++)
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{
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avln_ptr = (g_mac_avln_ctxt.mac_avln_array + vlan_idx);
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mac_key_hw_set_avln_key_tlb(vlan_idx, avln_ptr);
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}
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for(vlan_idx = 0; vlan_idx < vlan_num; vlan_idx++)
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{
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mac_key_hw_set_avln_nid(vlan_idx, 0x1);
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}
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}
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void tx_send_packet_interval(uint32_t interval)
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{
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uint32_t start_time = 0, end_time = 0;
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uint64_t time_span = 0;
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start_time = RGF_MAC_READ_REG(CFG_RD_NTB_ADDR);
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/*send packet */
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mac_tx_mpdu_test(NULL, mpdu_start);
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dt_mac_tx_hwq0_re_trig();
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do{
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end_time = RGF_MAC_READ_REG(CFG_RD_NTB_ADDR);
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time_span = end_time - start_time;
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if (time_span < 0) { // wrap around
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time_span = (0x100000000LL) - start_time + end_time;
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}
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}while((uint64_t)time_span < interval * TICKS_MS);
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}
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uint32_t mac_tx_init(uint32_t band_id) {
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#if IOT_DTEST_ONLY_SUPPORT == 1
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/* init */
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phy_init(glb_cfg.m_type, band_id, TONE_MASK_ID_NULL, true);
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/* dtest mac interrupt cfg */
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if(glb_cfg.t_type >= MAC_TX_INTR_BCN_ALT)
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mac_interrupt_init();
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/* init glb parameters */
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mpdu_start = &mpdu_start_tmp;
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mpdu_end = &mpdu_end_tmp;
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pb_start = &pb_start_tmp;
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pb_second = &pb_second_tmp;
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pb_third = &pb_third_tmp;
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pb_last = &pb_last_tmp;
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#else
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static volatile uint8_t first_tx_init_flag = 0;
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if(!first_tx_init_flag)
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{
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uint32_t tmp = MAC_BB_MAX_RATE;
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iot_pkt_t *pkt_buf = NULL;
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while (tmp--) {
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IOT_PKT_GET(pkt_buf, MAX_HW_BAND, 0, IOT_FTM_MID);
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if (!pkt_buf) {
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iot_printf("iot_pkt_get band_cnt fail\n");
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return ERR_FAIL;
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}
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band_cnt[tmp] = (uint16_t *)iot_pkt_put(pkt_buf, MAX_HW_BAND);
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}
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IOT_PKT_GET(pkt_buf, sizeof(tx_mpdu_start), 0, IOT_FTM_MID);
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if (!pkt_buf) {
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iot_printf("iot_pkt_get mpdu_start fail\n");
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return ERR_FAIL;
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}
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mpdu_start = (tx_mpdu_start *)iot_pkt_put(pkt_buf, sizeof(tx_mpdu_start));
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IOT_PKT_GET(pkt_buf, sizeof(tx_mpdu_end), 0, IOT_FTM_MID);
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if (!pkt_buf) {
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iot_printf("iot_pkt_get mpdu_end fail\n");
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return ERR_FAIL;
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}
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mpdu_end = (tx_mpdu_end *)iot_pkt_put(pkt_buf, sizeof(tx_mpdu_end));
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IOT_PKT_GET(pkt_buf, sizeof(tx_pb_start), 0, IOT_FTM_MID);
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if (!pkt_buf) {
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iot_printf("iot_pkt_get pb_start fail\n");
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return ERR_FAIL;
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}
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pb_start = (tx_pb_start *)iot_pkt_put(pkt_buf, sizeof(tx_pb_start));
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IOT_PKT_GET(pkt_buf, MAC_PB_SIZE_MAX, 0, IOT_FTM_MID);
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if (!pkt_buf) {
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iot_printf("iot_pkt_get pb_buf fail\n");
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return ERR_FAIL;
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}
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pb_buf = (uint8_t *)iot_pkt_put(pkt_buf, MAC_PB_SIZE_MAX);
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#if MAC_PB_NUM_ID >= 2
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IOT_PKT_GET(pkt_buf, sizeof(tx_pb_start), 0, IOT_FTM_MID);
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if (!pkt_buf) {
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iot_printf("iot_pkt_get pb_second fail\n");
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return ERR_FAIL;
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}
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pb_second = (tx_pb_start *)iot_pkt_put(pkt_buf, sizeof(tx_pb_start));
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IOT_PKT_GET(pkt_buf, MAC_PB_SIZE_MAX, 0, IOT_FTM_MID);
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if (!pkt_buf) {
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iot_printf("iot_pkt_get pb_buf_second fail\n");
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return ERR_FAIL;
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}
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pb_buf_second = (uint8_t *)iot_pkt_put(pkt_buf, MAC_PB_SIZE_MAX);
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#endif
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#if MAC_PB_NUM_ID >= 3
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IOT_PKT_GET(pkt_buf, sizeof(tx_pb_start), 0, IOT_FTM_MID);
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if (!pkt_buf) {
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iot_printf("iot_pkt_get pb_third fail\n");
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return ERR_FAIL;
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}
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pb_third = (tx_pb_start *)iot_pkt_put(pkt_buf, sizeof(tx_pb_start));
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IOT_PKT_GET(pkt_buf, MAC_PB_SIZE_MAX, 0, IOT_FTM_MID);
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if (!pkt_buf) {
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iot_printf("iot_pkt_get pb_buf_third fail\n");
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return ERR_FAIL;
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}
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pb_buf_third = (uint8_t *)iot_pkt_put(pkt_buf, MAC_PB_SIZE_MAX);
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#endif
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#if MAC_PB_NUM_ID == 4
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IOT_PKT_GET(pkt_buf, sizeof(tx_pb_start), 0, IOT_FTM_MID);
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if (!pkt_buf) {
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iot_printf("iot_pkt_get pb_last fail\n");
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return ERR_FAIL;
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}
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pb_last = (tx_pb_start *)iot_pkt_put(pkt_buf, sizeof(tx_pb_start));
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IOT_PKT_GET(pkt_buf, MAC_PB_SIZE_MAX, 0, IOT_FTM_MID);
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if (!pkt_buf) {
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iot_printf("iot_pkt_get pb_buf_last fail\n");
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return ERR_FAIL;
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}
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pb_buf_last = (uint8_t *)iot_pkt_put(pkt_buf, MAC_PB_SIZE_MAX);
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#endif
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first_tx_init_flag = 1;
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}
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#endif
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mac_tx_path_init();
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return 0;
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}
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/* support mode : ftm, module, dtest scan */
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void tx_common_init(uint32_t band_idx)
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{
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/* basic data struct init for bit ops */
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iot_bitops_init();
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mac_dma_ckl_sel(1);
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mac_tx_init(band_idx);
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/* construct the desc */
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if((glb_cfg.p_type == DT_AV_SOF) \
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||(glb_cfg.p_type == FC_DELIM_SOF) \
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||(glb_cfg.p_type == FC_DELIM_SOUND))
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{
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uint32_t proto = phy_proto_type_get();
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uint32_t pb_num = MAC_PB_NUM_ID;
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switch (pb_num) {
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case 4:
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mac_tx_mpdu_fill_pb_start(pb_last, MPDU_PB_NULL, &pb_buf_last[0], 0, 1, 1, proto);
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mac_tx_mpdu_fill_pb_start(pb_third, pb_last, &pb_buf_third[0], 0, 1, 1, proto);
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mac_tx_mpdu_fill_pb_start(pb_second, pb_third, &pb_buf_second[0], 0, 1, 1, proto);
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mac_tx_mpdu_fill_pb_start(pb_start, pb_second, &pb_buf[0], 0, 1, 1, proto);
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break;
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case 3:
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mac_tx_mpdu_fill_pb_start(pb_third, MPDU_PB_NULL, &pb_buf_third[0], 0, 1, 1, proto);
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mac_tx_mpdu_fill_pb_start(pb_second, pb_third, &pb_buf_second[0], 0, 1, 1, proto);
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mac_tx_mpdu_fill_pb_start(pb_start, pb_second, &pb_buf[0], 0, 1, 1, proto);
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break;
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case 2:
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mac_tx_mpdu_fill_pb_start(pb_second, MPDU_PB_NULL, &pb_buf_second[0], 0, 1, 1, proto);
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mac_tx_mpdu_fill_pb_start(pb_start, pb_second, &pb_buf[0], 0, 1, 1, proto);
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break;
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case 1:
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mac_tx_mpdu_fill_pb_start(pb_start, MPDU_PB_NULL, &pb_buf[0], 0, 1, 1, proto);
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break;
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default:
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IOT_ASSERT(0);
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break;
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}
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}
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mpdu_start->next = MPDU_PB_NULL;
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mpdu_start->pb_list = pb_start;
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mpdu_start->tx_status = mpdu_end;
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}
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/* fresh all the cfg */
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void mac_glb_map(uint32_t mac_type, uint32_t pkt_type, uint32_t test_type)
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{
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glb_cfg.m_type = mac_type;
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glb_cfg.p_type = pkt_type;
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glb_cfg.t_type = test_type;
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}
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/* cli api */
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void mac_tx_handle(PHY_PHASE_OVR_ID phase, \
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uint32_t mac_type, \
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uint32_t pkt_type, \
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uint32_t num, \
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bool_t wait_rx)
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{
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volatile uint32_t tx_done = 0;
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uint32_t enq_time = 0, cur_time = 0;
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uint32_t start_time = 0, end_time = 0;
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int64_t time_span = 0, time_span_print = 0;
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volatile bool_t period_done = false;
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iot_phy_sts_info_t total_sts = {0};
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uint32_t rate_idx = 0;
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uint32_t band_idx = 0;
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frame_control_t *sg_fc = NULL;
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/* phase select */
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glb_cfg.phase = phase;
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/* force rx phase */
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phy_rx_phase_force_set(true, glb_cfg.phase);
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/* update mac, pkt and test type */
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mac_glb_map(mac_type,pkt_type,pkt_type);
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start_time = RGF_MAC_READ_REG(CFG_RD_NTB_ADDR);
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do {
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enq_time = RGF_MAC_READ_REG(CFG_RD_NTB_ADDR);
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/* step1: tx packet */
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mac_tx_mpdu_test(NULL, mpdu_start);
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dt_mac_tx_hwq0_re_trig();
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do { // wait for tx done and hwq disable
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cur_time = RGF_MAC_READ_REG(CFG_RD_NTB_ADDR);
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time_span = cur_time - enq_time;
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if (time_span < 0) { // wrap around
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time_span = (0x100000000LL) - enq_time + cur_time;
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}
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tx_done = phy_get_tx_done_from_mpdu(mpdu_start);
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period_done = ((uint64_t)time_span < bcn_period_ms * TICKS_MS)?0:1;
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if(!tx_done && period_done){
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iot_printf("[Dtest][tx][timeout] tx timeout!\r\n");
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break;
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}
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} while (!tx_done || !period_done);
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/* step2: wait to receive packt */
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if(wait_rx)
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{
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while (is_rx_ring0_empty())
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{
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end_time = RGF_MAC_READ_REG(CFG_RD_NTB_ADDR);
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time_span = end_time - start_time;
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if (time_span < 0) { // wrap around
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time_span = (0x100000000LL) - start_time + end_time;
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}
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if((uint64_t)time_span > 5000*TICKS_MS){
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iot_printf("[Dtest][tx][timeout] wait rx timeout!\r\n");
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break;
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}
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}
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/* parse pkt */
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rx_buf_hdr_t *pb_buf_ptr = NULL;
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uint8_t *rx_buf_tmp = pop_rx_buf_from_ring(0);
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sg_fc = (frame_control_t *)mac_rx_mpdu_st_get_fc_addr(\
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&pb_buf_ptr->mpdu_st);
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if(rx_buf_tmp) /* check valid */
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{
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pb_buf_ptr = (rx_buf_hdr_t *)rx_buf_tmp;
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if((pb_buf_ptr->att.rx_mpdu_done == 1) \
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&& (pb_buf_ptr->att.is_fcserr == 0) \
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&& (pb_buf_ptr->pb_ed.rx_pb_crc_err == 0) \
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&& (sg_fc->nid == PHY_TXRX_NID_VAL)) /* check nid */
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{
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iot_printf("[rx] pb crc:%d, nid:%x\n",pb_buf_ptr->pb_ed.rx_pb_crc_err, \
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sg_fc->nid);
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/* check snr */
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iot_printf("loopback nid:%x gain:%d, rmi:%d, dc:%d, snr:%d, ppm:%d\n", \
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sg_fc->nid, \
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(int8_t)(*(rx_buf_tmp+64)), \
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(int8_t)(*(rx_buf_tmp+65)), \
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(int8_t)(*(rx_buf_tmp+66)), \
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(int8_t)(*(rx_buf_tmp+69)), \
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(int16_t)(*(rx_buf_tmp+67) | (*(rx_buf_tmp+68) << 8)));
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iot_printf("loopback local rx phase:%x dc:%d, ppm:%d, snr:%d\n", \
|
|
mac_rx_mpdu_st_get_rx_phase(&pb_buf_ptr->mpdu_st), \
|
|
(int8_t)mac_rx_mpdu_st_get_estimated_dc(&pb_buf_ptr->mpdu_st), \
|
|
(int8_t)mac_rx_mpdu_st_get_estimated_ppm(&pb_buf_ptr->mpdu_st), \
|
|
(int8_t)mac_rx_mpdu_st_get_avg_snr(&pb_buf_ptr->mpdu_st));
|
|
}
|
|
}
|
|
else
|
|
{
|
|
iot_printf("don't receive any valid packet!\n");
|
|
}
|
|
}
|
|
|
|
/* step3: print cnt */
|
|
end_time = RGF_MAC_READ_REG(CFG_RD_NTB_ADDR);
|
|
time_span_print = end_time - start_time;
|
|
if (time_span_print < 0) { // wrap around
|
|
time_span_print = (0x100000000LL) - start_time + end_time;
|
|
}
|
|
if((uint64_t)time_span_print > print_tx_period_ms*TICKS_MS){
|
|
phy_sts_get(&total_sts);
|
|
iot_printf("mac tx ok:%d/4s, fc_ok:%d/4s, fc_err:%d/4s,", \
|
|
total_sts.mac_tx_ok_cnt,total_sts.fc_crc_ok_cnt,total_sts.fc_crc_fail_cnt);
|
|
iot_printf("pld_ok:%d/4s, pld fail:%d/4s, sync ok:%d/4s\r\n", \
|
|
total_sts.pld_crc_ok_cnt,total_sts.pld_crc_fail_cnt,total_sts.sync_ok_cnt);
|
|
start_time = end_time;
|
|
/* band info */
|
|
for(rate_idx=0; rate_idx<MAC_BB_MAX_RATE; rate_idx++)
|
|
{
|
|
for(band_idx=0; band_idx<MAX_HW_BAND; band_idx++)
|
|
{
|
|
if(band_cnt[rate_idx][band_idx] != 0){
|
|
iot_printf("[RATE-%d][BAND-%d]:%d\r\n", \
|
|
rate_idx, band_idx, band_cnt[rate_idx][band_idx]);
|
|
band_cnt[rate_idx][band_idx] = 0;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
/* check tx num if zero */
|
|
if(--num == 0){
|
|
iot_printf("[Dtest][tx][done] Successfully!\r\n");
|
|
return;
|
|
}
|
|
} while (true);
|
|
}
|
|
|
|
void phy_tx_gain_rms_set(uint8_t para_int)
|
|
{
|
|
uint8_t para_frac = 0;
|
|
|
|
/* rate0 band0/1/2 */
|
|
phy_tx_rms_set(0, HW_FULL_BAND, para_int, para_frac);
|
|
phy_tx_rms_set(0, HW_LOW_BAND, para_int, para_frac);
|
|
phy_tx_rms_set(0, HW_HIGH_BAND, para_int, para_frac);
|
|
|
|
/* rate1 band0/1/2 */
|
|
phy_tx_rms_set(1, HW_FULL_BAND, para_int, para_frac);
|
|
phy_tx_rms_set(1, HW_LOW_BAND, para_int, para_frac);
|
|
phy_tx_rms_set(1, HW_HIGH_BAND, para_int, para_frac);
|
|
|
|
if(phy_proto_type_get() == PLC_PROTO_TYPE_SG)
|
|
{
|
|
/* short band rms for mix mode */
|
|
phy_tx_rms_set(2, 0, para_int, para_frac);
|
|
}
|
|
}
|
|
|
|
#if SUPPORT_GREEN_PHY
|
|
|
|
void phy_tmap_common_init()
|
|
{
|
|
uint32_t i = 0;
|
|
uint32_t tmp = 0;
|
|
uint32_t buf_addr = 0;
|
|
plc_tmap_rule_t tx_rule, rx_rule;
|
|
|
|
/* tmap init */
|
|
phy_tmap_init();
|
|
|
|
tx_rule.rule_id = 0;
|
|
tx_rule.en = true;
|
|
tx_rule.stei = glb_cfg.src_tei;
|
|
tx_rule.dtei = glb_cfg.dst_tei;
|
|
tx_rule.tmi = 7;
|
|
phy_tmap_tx_rule_set(&tx_rule);
|
|
|
|
rx_rule.rule_id = 123;
|
|
rx_rule.en = true;
|
|
rx_rule.stei = glb_cfg.dst_tei;
|
|
rx_rule.dtei = glb_cfg.src_tei;
|
|
rx_rule.tmi = 7;
|
|
phy_tmap_rx_rule_set(&rx_rule);
|
|
|
|
/* tmap pointer init */
|
|
buf_addr = BB_TMAP_PTR_BASEADDR;
|
|
enable_sw_access_tmi_buf(true);
|
|
/* TX base address */
|
|
for(i = 0; i < PHY_TMAP_MAX; i++)
|
|
{
|
|
/* Must psram or ddr support */
|
|
SOC_WRITE_REG(buf_addr, PHY_TMAP_TEST_ADDR);
|
|
|
|
buf_addr += 4;
|
|
}
|
|
|
|
/* turbo rate and gi */
|
|
for(i = 0; i < PHY_TMAP_TURBO_GI_MAX; i++)
|
|
{
|
|
tmp = \
|
|
(((glb_cfg.turbo_rate << PHY_TMAP_TURBO_RATE_OFFSET) | glb_cfg.gi) << 0) | \
|
|
(((glb_cfg.turbo_rate << PHY_TMAP_TURBO_RATE_OFFSET) | glb_cfg.gi) << 4) | \
|
|
(((glb_cfg.turbo_rate << PHY_TMAP_TURBO_RATE_OFFSET) | glb_cfg.gi) << 8) | \
|
|
(((glb_cfg.turbo_rate << PHY_TMAP_TURBO_RATE_OFFSET) | glb_cfg.gi) << 12) |\
|
|
(((glb_cfg.turbo_rate << PHY_TMAP_TURBO_RATE_OFFSET) | glb_cfg.gi) << 16) | \
|
|
(((glb_cfg.turbo_rate << PHY_TMAP_TURBO_RATE_OFFSET) | glb_cfg.gi) << 20) | \
|
|
(((glb_cfg.turbo_rate << PHY_TMAP_TURBO_RATE_OFFSET) | glb_cfg.gi) << 24) | \
|
|
(((glb_cfg.turbo_rate << PHY_TMAP_TURBO_RATE_OFFSET) | glb_cfg.gi) << 28);
|
|
|
|
/* word write */
|
|
SOC_WRITE_REG(buf_addr, tmp);
|
|
buf_addr += 4;
|
|
}
|
|
|
|
/* RX base address */
|
|
for(i = 0; i < PHY_TMAP_MAX; i++)
|
|
{
|
|
/* Must psram or ddr support */
|
|
SOC_WRITE_REG(buf_addr, PHY_TMAP_TEST_ADDR);
|
|
|
|
buf_addr += 4;
|
|
}
|
|
|
|
/* turbo rate and gi */
|
|
for(i = 0; i < PHY_TMAP_TURBO_GI_MAX; i++)
|
|
{
|
|
tmp = \
|
|
(((glb_cfg.turbo_rate << PHY_TMAP_TURBO_RATE_OFFSET) | glb_cfg.gi) << 0) | \
|
|
(((glb_cfg.turbo_rate << PHY_TMAP_TURBO_RATE_OFFSET) | glb_cfg.gi) << 4) | \
|
|
(((glb_cfg.turbo_rate << PHY_TMAP_TURBO_RATE_OFFSET) | glb_cfg.gi) << 8) | \
|
|
(((glb_cfg.turbo_rate << PHY_TMAP_TURBO_RATE_OFFSET) | glb_cfg.gi) << 12) |\
|
|
(((glb_cfg.turbo_rate << PHY_TMAP_TURBO_RATE_OFFSET) | glb_cfg.gi) << 16) | \
|
|
(((glb_cfg.turbo_rate << PHY_TMAP_TURBO_RATE_OFFSET) | glb_cfg.gi) << 20) | \
|
|
(((glb_cfg.turbo_rate << PHY_TMAP_TURBO_RATE_OFFSET) | glb_cfg.gi) << 24) | \
|
|
(((glb_cfg.turbo_rate << PHY_TMAP_TURBO_RATE_OFFSET) | glb_cfg.gi) << 28);
|
|
|
|
/* word write */
|
|
SOC_WRITE_REG(buf_addr, tmp);
|
|
buf_addr += 4;
|
|
}
|
|
|
|
enable_sw_access_tmi_buf(false);
|
|
|
|
/* tmap rule init */
|
|
buf_addr = PHY_TMAP_TEST_ADDR;
|
|
for(i = 0; i < (TOTAL_TONE_MASK_NUM >> 3); i++)
|
|
{
|
|
#if PHY_TMAP_RANDOM_EN
|
|
tmp = \
|
|
(((1 << PHY_TMAP_MODU_EN_OFFSET) | phy_rand_tmap_arry[(i << 3) + 0]) << 0) | \
|
|
(((1 << PHY_TMAP_MODU_EN_OFFSET) | phy_rand_tmap_arry[(i << 3) + 1]) << 4) | \
|
|
(((1 << PHY_TMAP_MODU_EN_OFFSET) | phy_rand_tmap_arry[(i << 3) + 2]) << 8) | \
|
|
(((1 << PHY_TMAP_MODU_EN_OFFSET) | phy_rand_tmap_arry[(i << 3) + 3]) << 12) |\
|
|
(((1 << PHY_TMAP_MODU_EN_OFFSET) | phy_rand_tmap_arry[(i << 3) + 4]) << 16) | \
|
|
(((1 << PHY_TMAP_MODU_EN_OFFSET) | phy_rand_tmap_arry[(i << 3) + 5]) << 20) | \
|
|
(((1 << PHY_TMAP_MODU_EN_OFFSET) | phy_rand_tmap_arry[(i << 3) + 6]) << 24) | \
|
|
(((1 << PHY_TMAP_MODU_EN_OFFSET) | phy_rand_tmap_arry[(i << 3) + 7]) << 28);
|
|
#else
|
|
tmp = \
|
|
(((1 << PHY_TMAP_MODU_EN_OFFSET) | glb_cfg.modu) << 0) | \
|
|
(((1 << PHY_TMAP_MODU_EN_OFFSET) | glb_cfg.modu) << 4) | \
|
|
(((1 << PHY_TMAP_MODU_EN_OFFSET) | glb_cfg.modu) << 8) | \
|
|
(((1 << PHY_TMAP_MODU_EN_OFFSET) | glb_cfg.modu) << 12) |\
|
|
(((1 << PHY_TMAP_MODU_EN_OFFSET) | glb_cfg.modu) << 16) | \
|
|
(((1 << PHY_TMAP_MODU_EN_OFFSET) | glb_cfg.modu) << 20) | \
|
|
(((1 << PHY_TMAP_MODU_EN_OFFSET) | glb_cfg.modu) << 24) | \
|
|
(((1 << PHY_TMAP_MODU_EN_OFFSET) | glb_cfg.modu) << 28);
|
|
#endif
|
|
|
|
SOC_WRITE_REG(buf_addr, tmp);
|
|
buf_addr += 4;
|
|
}
|
|
}
|
|
#endif
|