1489 lines
		
	
	
		
			46 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			1489 lines
		
	
	
		
			46 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /****************************************************************************
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| 
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| Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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| 
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| This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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| be copied by any method or incorporated into another program without
 | |
| the express written consent of Aerospace C.Power. This Information or any portion
 | |
| thereof remains the property of Aerospace C.Power. The Information contained herein
 | |
| is believed to be accurate and Aerospace C.Power assumes no responsibility or
 | |
| liability for its use in any way and conveys no license or title under
 | |
| any patent or copyright and makes no representation or warranty that this
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| Information is free from patent or copyright infringement.
 | |
| 
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| ****************************************************************************/
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| 
 | |
| /* This file contains the Kunlun features configuration
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|  * any feature related .c file should include this file
 | |
|  */
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| 
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| #ifndef PLC_CONFIG_H
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| #define PLC_CONFIG_H
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| 
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| #ifdef __cplusplus
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| extern "C" {
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| #endif
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| 
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| /* HW configuration start *****************************************************/
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| #define MAC_RX_FILTER_DISABLE_BITMAP    7    //0b0111
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| 
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| /* both GREEN_PHY & AV protocol use this macro */
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| #define SUPPORT_GREEN_PHY               0
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| 
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| /* ieee1901 protocol */
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| #ifndef SUPPORT_IEEE_1901
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| #define SUPPORT_IEEE_1901               0
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| #endif
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| 
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| #if (!SUPPORT_SMART_GRID && SUPPORT_IEEE_1901)
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| #error "define support protocol SG or IEEE1901 error"
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| #endif
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| 
 | |
| /* HW configuration end *******************************************************/
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| 
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| /* RF configuration start *****************************************************/
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| /* hplc+rf dual mode support */
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| #ifndef HPLC_RF_SUPPORT
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| #define HPLC_RF_SUPPORT                 0
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| #endif
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| 
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| /* rf channel support */
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| #ifndef HPLC_RF_CHANNEL_SUPPORT
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| #define HPLC_RF_CHANNEL_SUPPORT         (HPLC_RF_SUPPORT && 1)
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| #endif
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| 
 | |
| /* rf device support
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|  * NOTE: current, just only simulator are supported.
 | |
|  */
 | |
| #ifndef HPLC_RF_DEV_SUPPORT
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| #define HPLC_RF_DEV_SUPPORT             (((TARGET_VERSION == TARGET_KUNLUN3) \
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|                                          || (HW_PLATFORM == HW_PLATFORM_SIMU)) \
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|                                          && HPLC_RF_SUPPORT)
 | |
| #endif
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| 
 | |
| /* wmac enable */
 | |
| #ifndef HPLC_RF_WMAC_ENABLE
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| #define HPLC_RF_WMAC_ENABLE             (HPLC_RF_DEV_SUPPORT && 1)
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| #endif
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| 
 | |
| #ifndef HPLC_RF_MPDU_SINGLE_PB
 | |
| #define HPLC_RF_MPDU_SINGLE_PB          1
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| #endif
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| 
 | |
| /* define if dual mode device support broadcast packets sent on hplc+rf dual
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|  * link when the broadcast link type of cvg or app layer is not explicitly
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|  * specified. if the broadcast link type is explicitly specified, will only sent
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|  * on the specified link. if set, a copy of the broadcast packet will be sent to
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|  * the rf link, in addition to sending the broadcast packet on the hplc.
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|  */
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| #define HPLC_RF_DUAL_BCAST              (HPLC_RF_DEV_SUPPORT)
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| 
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| /* define if support rf single hop frame protocol */
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| #define HPLC_RF_SIG_HOP_SUPPORT         (HPLC_RF_DEV_SUPPORT && 0)
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| 
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| /* if set, STA will support roaming to different links of same proxy */
 | |
| #define HPLC_RF_ROAM_SAME_PCO           (HPLC_RF_DEV_SUPPORT)
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| 
 | |
| /* if set, CCO will support assigning rf standard discover beacon */
 | |
| #define HPLC_RF_STD_DIS_BC              0
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| 
 | |
| /* WAR for kl3 rx fc tei error */
 | |
| #define HPLC_RF_FC_TEI_ERR_WAR          (HPLC_RF_DEV_SUPPORT)
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| 
 | |
| /* if set, CCO will support adjust pco slot utilization */
 | |
| #define HPLC_RF_SLOT_UTILIZE_SUPPORT    (HPLC_RF_SUPPORT && 0)
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| 
 | |
| /* enable/disable rf tx power temperature compensation function */
 | |
| #define HPLC_RF_TX_POWER_TEMP_COMPEN_EN_DEFAULT     0
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| 
 | |
| /* off bbcpu calculate snr rssi */
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| #define HPLC_BBCPU_CALC_SNR_RSSI        0
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| 
 | |
| /* this macro indicates whether the chip supports automatic rx dc calibration.
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|  * NOTE: this function is supported only on rf v2 and later.
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|  */
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| #define HPLC_RF_SUPPORT_AUTO_CALIBR_RX_DC           0
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| 
 | |
| /* this macro indicates whether the chip supports automatic tx dc calibration.
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|  * NOTE: this function is supported only on rf v2 and later.
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|  */
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| #define HPLC_RF_SUPPORT_AUTO_CALIBR_TX_DC           0
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| 
 | |
| /* Define RF rx filter bandpass mode enable control macro */
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| #define HPLC_RF_RX_BPF_EN                           0
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| 
 | |
| /* WAR for tx over 520pb on rf link. rf link support max 520pb, if exceeded,
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|  * force broadcast to hplc link.
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|  */
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| #define HPLC_RF_TX_RF_520PB_WAR         1
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| 
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| /* force link type */
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| #define HPLC_RF_FORCE_LINK_NONE         0
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| #define HPLC_RF_FORCE_LINK_HPLC         1
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| #define HPLC_RF_FORCE_LINK_RF           2
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| 
 | |
| /* define if force link support, see HPLC_RF_FORCE_LINK_XXX */
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| #define HPLC_RF_SUPPORT_FORCE_LINK      (HPLC_RF_FORCE_LINK_NONE)
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| 
 | |
| /* define if discovery beacon send with non cco node info */
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| #define HPLC_SUPPORT_BC_D_WITH_NON      (0)
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| 
 | |
| /* RF configuration end *******************************************************/
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| 
 | |
| /* CERTIFICATION mode configuration start *************************************/
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| 
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| #ifndef CPLC_IOT_CERT_SUPPORT
 | |
| /* TODO: make cert support NW also */
 | |
| #define CPLC_IOT_CERT_SUPPORT           1
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| #endif
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| 
 | |
| #ifndef CPLC_IOT_CERT_ENABLE
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| #define CPLC_IOT_CERT_ENABLE            0
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| #endif
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| 
 | |
| /* rise the tx power when mac addr match */
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| #define CERT_WAR_TX_PWR                 CPLC_IOT_CERT_ENABLE
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| 
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| #define MAC_CERT_SEC_SUPPORT            (CPLC_IOT_CERT_SUPPORT \
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|     && HPLC_RF_DEV_SUPPORT && (HW_PLATFORM != HW_PLATFORM_SIMU))
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| 
 | |
| /* define rf certification test */
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| #define CRF_IOT_CERT_SUPPORT            (CPLC_IOT_CERT_SUPPORT \
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|     && HPLC_RF_DEV_SUPPORT && (HW_PLATFORM != HW_PLATFORM_SIMU))
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| 
 | |
| /* reduce tx power on kl3 for cert test */
 | |
| #define CERT_HPLC_WAR_TX_POWER_REDUCE   (TARGET_VERSION == TARGET_KUNLUN3)
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| 
 | |
| /* war for kl1 spike cert test on mengdong */
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| #define HPLC_CERT_WAR_SPIKE             (TARGET_VERSION == TARGET_KUNLUN)
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| 
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| /* CERTIFICATION mode configuration end ***************************************/
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| 
 | |
| /* PLC configuration start ****************************************************/
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| #if (BUILD_AMP_TYPE != IOT_BUILD_AMP_CUSTOM)
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| #define PLC_COMM_ENABLE                 1
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| #endif
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| 
 | |
| /* define sniffer type */
 | |
| #define MAC_SNIFFER_TYPE_OFF           (0)
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| /* sniffer data io port is eth */
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| #define MAC_SNIFFER_TYPE_MPDU          (1)
 | |
| /* sniffer data io port is eth */
 | |
| #define MAC_SNIFFER_TYPE_MSDU          (2)
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| /* sniffer data io port is uart */
 | |
| #define MAC_SNIFFER_TYPE_MSDU_UART     (3)
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| 
 | |
| /* mac mm sniffer use eth */
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| #ifndef MAC_MM_SNIFFER_MODE
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| #define MAC_MM_SNIFFER_MODE             (0)
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| #endif
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| 
 | |
| #ifndef MAC_MM_SNIFFER_ENC_ENABLE
 | |
| #define MAC_MM_SNIFFER_ENC_ENABLE       0
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| #endif
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| 
 | |
| /* define plc mm sniffer mode */
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| #ifndef PLC_MM_SNIFFER_MODE
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| #define PLC_MM_SNIFFER_MODE             MAC_MM_SNIFFER_MODE
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| #endif
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| 
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| /* define band filter select */
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| #if (IOT_SMART_CONFIG)
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| #define PLC_SUPPORT_BAND_FILTER_SELECT  1
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| #else
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| #define PLC_SUPPORT_BAND_FILTER_SELECT  1
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| #endif
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| 
 | |
| /* normal device(cco/sta) supports debug mode select.
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|  * debug mode: a special module, can send special data by boardcast
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|  * without joined any network. when the normal device(sta) received the
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|  * boardcast packet, if the mac address in the broadcast payload matches its
 | |
|  * own address, the normal device(sta) must send the ack data to the special
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|  * module through boardcast packet.
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|  */
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| #ifndef PLC_SUPPORT_DBG_PKT_MODE
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| #define PLC_SUPPORT_DBG_PKT_MODE        1
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| #endif
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| 
 | |
| /* if set, white list and black list feature are supported */
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| #define PLC_SUPPORT_WHITE_BLACK_LIST    1
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| 
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| /* security authentication type
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|  * 1. certificate authority of smart grid
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|  * 2. device access key of ieee1901
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|  */
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| #define PLC_AUTH_TYPE_NONE           (0)
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| #define PLC_AUTH_TYPE_CA             (1)
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| #define PLC_AUTH_TYPE_DAK            (2)
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| /* security authentication support, see PLC_AUTH_TYPE_XXX */
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| #define PLC_SUPPORT_AUTH_TYPE        (PLC_AUTH_TYPE_NONE)
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| 
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| /* if set, digital signature information cache is supported */
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| #define PLC_SUPPORT_SIGN_CACHE \
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|     ((PLC_SUPPORT_AUTH_TYPE == PLC_AUTH_TYPE_CA) && PLC_SUPPORT_CCO_ROLE)
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| 
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| #if (PLC_SUPPORT_CCO_ROLE)
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| 
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| /* if set, cco role device will work on 3 phases, otherwise, cco role device
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|  * will work on phase A only.
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|  */
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| #ifndef PLC_SUPPORT_3_PHASE
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| #define PLC_SUPPORT_3_PHASE             1
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| #endif
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| 
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| /* if set, cco will lock level 1 device logical phase based on white list.
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|  * level 1 device cannot change local phase dynamically when cco has already
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|  * locked sta phase.
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|  */
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| #define PLC_SUPPORT_LOCK_STA_PHASE      (IOT_SMART_CONFIG && \
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|                                         PLC_SUPPORT_3_PHASE)
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| 
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| /* support 3phse cal nf */
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| #ifndef PLC_SUPPORT_3PHASE_NF
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| #define PLC_SUPPORT_3PHASE_NF           (!IOT_DTEST_ONLY_SUPPORT && \
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|                                          (HW_PLATFORM != HW_PLATFORM_SIMU) && \
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|                                          (TARGET_VERSION == TARGET_KUNLUN) && \
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|                                          PLC_SUPPORT_3_PHASE && 1)
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| #endif
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| 
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| /* if set, cco role device will allow level 1 device to change the phase
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|  * dynamically by detecting phase info in the beacon and discovery node list
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|  * mme. sta role device may announce local phase info changed dynamically
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|  * through beacon and discovery node list mme. note that the phase here is
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|  * logical phase.
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|  */
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| #define PLC_SUPPORT_DYNAMIC_PHASE_CHG   1
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| 
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| #define PLC_SUPPORT_BAND_SCAN           0
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| 
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| /* support option/channel scan */
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| #define RF_SUPPORT_OPTION_CHANNEL_SCAN        (0)
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| 
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| #define K48_STA_MULTI_CHANNEL_SELECT_ENABLE    0
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| /* should only for gree app (appid = 4) */
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| #if (IOT_APP_SELECTION == 4)
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| #define K48_CCO_MULTI_CHANNEL_SELECT_ENABLE    0
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| #else
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| #define K48_CCO_MULTI_CHANNEL_SELECT_ENABLE    0
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| #endif
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| 
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| #if (IOT_SMART_CONFIG)
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| 
 | |
| /* define if neighbor network negotiation support */
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| #define PLC_SUPPORT_NEIGHBOR_NW_NEGO        0
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| 
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| #if RUN_IN_PSRAM
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| /* define if chip id support */
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| #define PLC_SUPPORT_CHIP_ID                 1
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| #else /* RUN_IN_PSRAM */
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| /* define if chip id support */
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| #define PLC_SUPPORT_CHIP_ID                 0
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| #endif /* RUN_IN_PSRAM */
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| 
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| /* define if pco history support */
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| #define PLC_SUPPORT_PCO_HIS                 0
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| 
 | |
| /* define if peer state statistics support */
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| #define PLC_SUPPORT_PEER_STAT               0
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| 
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| /* if set, the ext protocol will be supported.*/
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| #define PLC_SUPPORT_EXT_PROTO               0
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| 
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| /* define if hardware tsfm detection result cache supported */
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| #define PLC_SUPPORT_HW_TSFM_DETECT_CACHE    0
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| 
 | |
| /* define if version info is complete */
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| #define PLC_SUPPORT_VER_INFO_COMP           0
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| 
 | |
| #else /* IOT_SMART_CONFIG */
 | |
| 
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| #define PLC_SUPPORT_NEIGHBOR_NW_NEGO        1
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| 
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| #define PLC_SUPPORT_PCO_HIS                 1
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| 
 | |
| /* define if peer state statistics support */
 | |
| #define PLC_SUPPORT_PEER_STAT               1
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| 
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| /* if set, the ext protocol will be supported.*/
 | |
| #define PLC_SUPPORT_EXT_PROTO               1
 | |
| 
 | |
| /* define if hardware tsfm detection result cache supported */
 | |
| #define PLC_SUPPORT_HW_TSFM_DETECT_CACHE    1
 | |
| 
 | |
| /* define if version info is complete */
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| #define PLC_SUPPORT_VER_INFO_COMP           1
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| 
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| #if (SUPPORT_IEEE_1901)
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| 
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| #define PLC_SUPPORT_CHIP_ID                 0
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| 
 | |
| #else /* SUPPORT_IEEE_1901 */
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| 
 | |
| #define PLC_SUPPORT_CHIP_ID                 1
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| 
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| #endif /* SUPPORT_IEEE_1901 */
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| 
 | |
| #endif /* IOT_SMART_CONFIG */
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| 
 | |
| #define PLC_SUPPORT_HW_TSFM             0
 | |
| 
 | |
| /* if set, cco will send broadcast packets in 3 physical phases
 | |
|  * simultaneously
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|  */
 | |
| #define PLC_SUPPORT_CCO_TX_3_PHASE      PLC_SUPPORT_3_PHASE
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| 
 | |
| /* if set, sta will try to send packets in 3 phases time slot for csma
 | |
|  * region.
 | |
|  */
 | |
| #define PLC_SUPPORT_STA_TX_3_PHASE      0
 | |
| 
 | |
| #if RUN_IN_PSRAM
 | |
| /* if set, plc lib will have standalone task instead of leverage CVG task
 | |
|  * context.
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|  */
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| #define PLC_LIB_STANDALONE_TASK         1
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| #else /* RUN_IN_PSRAM */
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| /* if set, plc lib will have standalone task instead of leverage CVG task
 | |
|  * context.
 | |
|  */
 | |
| #define PLC_LIB_STANDALONE_TASK         0
 | |
| #endif /* RUN_IN_PSRAM */
 | |
| 
 | |
| /* cco device use crc16 */
 | |
| #define IOT_CRC16_SUPPORT               1
 | |
| 
 | |
| /* if set, the app filter will be supported. */
 | |
| #define PLC_SUPPORT_APP_FILTER          1
 | |
| 
 | |
| /* hplc and rf asynchronous tx pkt */
 | |
| #define HPLC_RF_ASYNC_TX                (0)
 | |
| 
 | |
| /* define dual mode device transmit config
 | |
|  * 0 - disable config function
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|  * 1 - dual mode device async tx pkt
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|  * 2 - dual mode device sync tx pkt
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|  */
 | |
| #define PLC_SUPPORT_DM_TX_CFG           (0)
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| 
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| #else /* PLC_SUPPORT_CCO_ROLE */
 | |
| 
 | |
| #define PLC_SUPPORT_3PHASE_NF           0
 | |
| 
 | |
| #define PLC_SUPPORT_DYNAMIC_PHASE_CHG   1
 | |
| 
 | |
| /* if set, STA device will support logical phase lock function */
 | |
| #define PLC_SUPPORT_LOCK_STA_PHASE      (IOT_SMART_CONFIG)
 | |
| 
 | |
| #if (IOT_SMART_CONFIG)
 | |
| 
 | |
| #define PLC_SUPPORT_HW_TSFM             0
 | |
| /* if set, the app filter will be supported. */
 | |
| #define PLC_SUPPORT_APP_FILTER          0
 | |
| 
 | |
| #else /* IOT_SMART_CONFIG */
 | |
| 
 | |
| /* if set, the app filter will be supported. */
 | |
| #define PLC_SUPPORT_APP_FILTER          1
 | |
| #if (IOT_FLASH_SIZE >= 2)
 | |
| #define PLC_SUPPORT_HW_TSFM             (HW_PLATFORM != HW_PLATFORM_SIMU)
 | |
| #else
 | |
| #define PLC_SUPPORT_HW_TSFM             0
 | |
| #endif /* IOT_FLASH_SIZE >= 2 */
 | |
| 
 | |
| #endif /* IOT_SMART_CONFIG */
 | |
| 
 | |
| #define PLC_SUPPORT_BAND_SCAN           (HW_PLATFORM != HW_PLATFORM_SIMU)
 | |
| 
 | |
| /* support option/channel scan */
 | |
| #define RF_SUPPORT_OPTION_CHANNEL_SCAN  (HPLC_RF_DEV_SUPPORT \
 | |
|                                         && (HW_PLATFORM != HW_PLATFORM_SIMU) \
 | |
|                                         && (IOT_MP_SUPPORT == 1) \
 | |
|                                         && 1)
 | |
| 
 | |
| #define PLC_SUPPORT_HW_TSFM_REC         PLC_SUPPORT_HW_TSFM
 | |
| 
 | |
| #define PLC_SUPPORT_HW_TSFM_REC_SYB     (PLC_SUPPORT_HW_TSFM_REC \
 | |
|                                         && TARGET_VERSION == TARGET_KUNLUN)
 | |
| 
 | |
| #define PLC_SUPPORT_HW_TOPO             (PLC_SUPPORT_HW_TSFM \
 | |
|                                         && ((TARGET_VERSION == TARGET_KUNLUN2) \
 | |
|                                         || (TARGET_VERSION == TARGET_KUNLUN3)) \
 | |
|                                         && (IOT_BRM_ENABLE || IOT_BSRM_MODE \
 | |
|                                         || (IOT_FTM_SUPPORT \
 | |
|                                         && (IOT_MP_SUPPORT == 0))))
 | |
| 
 | |
| /* hardware tsfm power amplifier */
 | |
| #define PLC_SUPPORT_HW_TSFM_PA          (PLC_SUPPORT_HW_TSFM \
 | |
|                                         && !PLC_SUPPORT_CCO_ROLE)
 | |
| 
 | |
| /* power amplifier hw tsfm mode encode frequency, each tone is
 | |
|  * 75MHz/(1 << 14)
 | |
|  */
 | |
| #define PLC_HW_TSFM_ENCODE_PA_TONE_NUM_DEF      (27)
 | |
| #define PLC_HW_TSFM_ENCODE_PA_TONE_NUM_MAX      (16380)
 | |
| 
 | |
| /* defines the center frequency of the characteristic current signal supported
 | |
|  * in PA mode, uint is 0.01HZ.
 | |
|  */
 | |
| #define PLC_HW_TOPO_DECODE_PA_FC_5950928        (5950928)
 | |
| #define PLC_HW_TOPO_DECODE_PA_FC_9155273        (9155273)
 | |
| #define PLC_HW_TOPO_DECODE_PA_FC_11444092       (11444092)
 | |
| #define PLC_HW_TOPO_DECODE_PA_FC_12359619       (12359619)
 | |
| #define PLC_HW_TOPO_DECODE_PA_FC_16479492       (16479492)
 | |
| #define PLC_HW_TOPO_DECODE_PA_FC_19683838       (19683838)
 | |
| 
 | |
| /* PA mode default demodulated signal center frequency point */
 | |
| #define PLC_HW_TOPO_DECODE_PA_FC_DEF  PLC_HW_TOPO_DECODE_PA_FC_12359619
 | |
| 
 | |
| /* should only for gree app (appid = 4) */
 | |
| #if (IOT_APP_SELECTION == 4)
 | |
| #define K48_STA_MULTI_CHANNEL_SELECT_ENABLE    0
 | |
| #else
 | |
| #define K48_STA_MULTI_CHANNEL_SELECT_ENABLE    0
 | |
| #endif
 | |
| #define K48_CCO_MULTI_CHANNEL_SELECT_ENABLE    0
 | |
| 
 | |
| #define PLC_SUPPORT_NEIGHBOR_NW_NEGO    0
 | |
| 
 | |
| #define PLC_SUPPORT_CCO_TX_3_PHASE      0
 | |
| 
 | |
| #define PLC_SUPPORT_STA_TX_3_PHASE      1
 | |
| 
 | |
| #define PLC_LIB_STANDALONE_TASK         0
 | |
| 
 | |
| /* sta device use crc16 */
 | |
| #define IOT_CRC16_SUPPORT               1
 | |
| 
 | |
| /* hplc and rf asynchronous tx pkt.
 | |
|  * NOTE: In order to enable this function HPLC_RF_DEV_SUPPORT must be equal to 1
 | |
|  *   HPLC_RF_ASYNC_TX maybe equal to 0, 1 or 2.
 | |
|  *   0 indicate diable this function;
 | |
|  *   1 indicate pcs is configured by HPLC and BBCPU using interrupted handshake;
 | |
|  *   2 indicate pcs is configured by spinlock.
 | |
|  */
 | |
| #if HPLC_RF_DEV_SUPPORT
 | |
| #define HPLC_RF_ASYNC_TX                (2)
 | |
| #else
 | |
| #define HPLC_RF_ASYNC_TX                (0)
 | |
| #endif
 | |
| #endif /* PLC_SUPPORT_CCO_ROLE */
 | |
| 
 | |
| #if PLC_SUPPORT_CCO_TX_3_PHASE
 | |
| /* if set, cco will try to send any phase packets in 3 phases time slot
 | |
|  * for csma region.
 | |
|  */
 | |
| #define PLC_SUPPORT_CCO_TX_3_PHASE_SLOT 0
 | |
| #else
 | |
| #define PLC_SUPPORT_CCO_TX_3_PHASE_SLOT 0
 | |
| #endif
 | |
| 
 | |
| #if (IOT_SMART_CONFIG \
 | |
|         || (HW_PLATFORM == HW_PLATFORM_FPGA))
 | |
| /* if set, non standard APP data like CLI will be encapsulated into diagnose
 | |
|  * MME to make sure the data can be forwarded by other vendor devices.
 | |
|  * FPGA use non standard ping, so need disable this
 | |
|  */
 | |
| #define PLC_ENCAP_NON_STD_APP_DATA      0
 | |
| #else
 | |
| #define PLC_ENCAP_NON_STD_APP_DATA      1
 | |
| #endif
 | |
| 
 | |
| /* if set, tx traffic success ratio calculation is supported. this will
 | |
|  * enlarge the discovery node list mme packet size and is not suitable for
 | |
|  * low bandwidth case.
 | |
|  */
 | |
| #define PLC_SUPPORT_TX_SR_CALC          1
 | |
| 
 | |
| /* if set, support add threshold data to beacon vendor entry */
 | |
| #define PLC_SUPPORT_BC_VENDOR_TH_DATA   0
 | |
| 
 | |
| /* if set, sw cfg sof frame len */
 | |
| #define MAC_SW_FRAME_LEN                1
 | |
| 
 | |
| /* if set, tei for a remote peer could be locked even the peer has left
 | |
|  * the network for a while if the peer is using PLC_MAC_ADDR_TYPE_METER
 | |
|  * mac address.
 | |
|  */
 | |
| #define PLC_SUPPORT_TEI_LOCK            1
 | |
| 
 | |
| /* if set, the locked tei could be recycled even if the locked peer has not
 | |
|  * timeout
 | |
|  */
 | |
| #define PLC_SUPPORT_TEI_LOCK_RECYCLE    (IOT_SMART_CONFIG && \
 | |
|                                         PLC_SUPPORT_TEI_LOCK)
 | |
| 
 | |
| /* if set, candidate route to cco will be put into discovery node list mme */
 | |
| #define PLC_PUT_CAND_ROUTE_IN_DIS_MME   1
 | |
| 
 | |
| #if SUPPORT_SOUTHERN_POWER_GRID
 | |
| /* if set, vendor info will be put into discovery node list mme */
 | |
| #define PLC_PUT_VENDOR_INFO_IN_DIS_MME  0
 | |
| /* if set, sta will record all learnt proxy info of surrounding peers */
 | |
| #define PLC_SUPPORT_PROXY_LEARNING      1
 | |
| /* define if support sta use smaller mme discovery list payload */
 | |
| #define PLC_SUPPORT_STA_DIS_SMALL       0
 | |
| #else /* SUPPORT_SOUTHERN_POWER_GRID */
 | |
| #define PLC_PUT_VENDOR_INFO_IN_DIS_MME  1
 | |
| #define PLC_SUPPORT_PROXY_LEARNING      0
 | |
| /* define if support sta use smaller mme discovery list payload */
 | |
| #define PLC_SUPPORT_STA_DIS_SMALL       (PLC_SUPPORT_STA_ROLE)
 | |
| #endif /* SUPPORT_SOUTHERN_POWER_GRID */
 | |
| 
 | |
| /* if set, local device will track all known peers mac address */
 | |
| #define PLC_SUPPORT_ADDR_TO_TEI_MAP     1
 | |
| 
 | |
| /* if set, CCO will use the non bitmap version proxy change conf */
 | |
| #define PLC_USE_PROXY_CHG_NO_BM_VER     0
 | |
| 
 | |
| /* if set, CCO will use gathered assoc ind for level 1 sta assoc request */
 | |
| #define PLC_SUPPORT_GATHER_ASSOC_REQ    1
 | |
| 
 | |
| /* if set, CCO will limitper STA roaming frequency after network formation
 | |
|  * done.
 | |
|  */
 | |
| #define PLC_SUPPORT_ROAMING_LIMIT       0
 | |
| 
 | |
| /* if set, STA will support roaming between PCOs */
 | |
| #define PLC_SUPPORT_PROXY_ROAMING       1
 | |
| 
 | |
| /* if set, STA will support force restart vdev if proxy chg nack feature is
 | |
|  * enabled.
 | |
|  */
 | |
| #define PLC_SUPPORT_PROXY_NACK_FORCE    (0)
 | |
| 
 | |
| /* if set, STA will support dynamic route recovery process */
 | |
| #define PLC_SUPPORT_ROUTE_RECOVERY      1
 | |
| 
 | |
| /* if set, STA will reboot the whole system if stuck in network search status
 | |
|  * for a long time.
 | |
|  */
 | |
| #define PLC_SUPPORT_WATCH_DOG           1
 | |
| 
 | |
| /* define if enable HW NTB sync feature */
 | |
| #define PLC_ENABLE_HW_NTB_SYNC          0
 | |
| 
 | |
| #ifndef PLC_SUPPORT_EXT_PROTO
 | |
| /* if set, the ext protocol will be supported.*/
 | |
| #define PLC_SUPPORT_EXT_PROTO           1
 | |
| #endif
 | |
| 
 | |
| /* controller proto master role support or not */
 | |
| #if PLC_SUPPORT_EXT_PROTO
 | |
| 
 | |
| #if PLC_SUPPORT_STA_ROLE
 | |
| #if (HW_PLATFORM == HW_PLATFORM_SIMU || IOT_FLASH_SIZE >= 2)
 | |
| #define PLC_SUPPORT_CTRL_PROTO_MAS_ROLE 1
 | |
| #else /* HW_PLATFORM == HW_PLATFORM_SIMU || IOT_FLASH_SIZE >= 2 */
 | |
| #define PLC_SUPPORT_CTRL_PROTO_MAS_ROLE 0
 | |
| #endif /* HW_PLATFORM == HW_PLATFORM_SIMU || IOT_FLASH_SIZE >= 2 */
 | |
| #endif /* PLC_SUPPORT_STA_ROLE */
 | |
| 
 | |
| #endif /* PLC_SUPPORT_EXT_PROTO */
 | |
| 
 | |
| /* enable the token shared between CSMA */
 | |
| /* will remove this after token management feature done */
 | |
| #define USE_SHARED_CSMA_TOKEN           1
 | |
| 
 | |
| /* use per pb retry or msdu retry
 | |
|  * for cert test case, we have to use
 | |
|  * per msdu ertry
 | |
|  */
 | |
| #if (HW_PLATFORM >= HW_PLATFORM_FPGA)
 | |
| #if SUPPORT_SOUTHERN_POWER_GRID
 | |
| #define ENABLE_PER_PB_RETRY             0
 | |
| #else
 | |
| #define ENABLE_PER_PB_RETRY             !CPLC_IOT_CERT_ENABLE
 | |
| #endif
 | |
| #else //HW_PLATFORM >= HW_PLATFORM_FPGA
 | |
| #define ENABLE_PER_PB_RETRY             1
 | |
| #endif
 | |
| 
 | |
| /*if msdu retry, set retry bit always when
 | |
|  * first pb sent out, this would have some
 | |
|  * impact to the efficiency, there's no sync
 | |
|  * between the tx and rx side, we'd better
 | |
|  * only enable it on cert test
 | |
|  */
 | |
| #ifndef ENA_ALWAYS_SET_RETRY_BIT
 | |
| #define ENA_ALWAYS_SET_RETRY_BIT        0
 | |
| #endif
 | |
| 
 | |
| /* rate control enable or not */
 | |
| #if (HW_PLATFORM == HW_PLATFORM_SIMU)
 | |
| #define RATE_ADAPTION_ENABLE            0
 | |
| #else //HW_PLATFORM == HW_PLATFORM_SIMU
 | |
| #if (SUPPORT_SOUTHERN_POWER_GRID || IOT_SMART_CONFIG)
 | |
| #define RATE_ADAPTION_ENABLE            0
 | |
| #elif (SUPPORT_SMART_GRID && SUPPORT_IEEE_1901)
 | |
| #define RATE_ADAPTION_ENABLE            0
 | |
| #else //SUPPORT_SOUTHERN_POWER_GRID or IOT_SMART_CONFIG
 | |
| #define RATE_ADAPTION_ENABLE            1
 | |
| #endif
 | |
| #endif
 | |
| 
 | |
| /* sometimes, cco rx would have abort for phase switch
 | |
|  * try this to enable all 3 phase, be noted there'll
 | |
|  * be some side effect of collision rate
 | |
|  */
 | |
| #define FORCE_CCO_ON_3_PHASE            0
 | |
| 
 | |
| /* mac zero cross enable */
 | |
| #ifndef MAC_ZC_ENABLE
 | |
| #if IOT_SMART_GRID_ENABLE
 | |
| #define MAC_ZC_ENABLE                   1
 | |
| #else
 | |
| #define MAC_ZC_ENABLE                   0
 | |
| #endif
 | |
| #endif
 | |
| 
 | |
| #if MAC_ZC_ENABLE
 | |
| #define MAC_ZC_CAL_COMPENS_SUPPORT      0
 | |
| #endif
 | |
| 
 | |
| /*mac stream timeout support*/
 | |
| #ifndef MAC_STREAM_TIMEOUT_SUPPORT
 | |
| #define MAC_STREAM_TIMEOUT_SUPPORT      (HW_PLATFORM >= HW_PLATFORM_FPGA)
 | |
| #endif
 | |
| 
 | |
| /* define if support private protocol to collect zero-cross ntb */
 | |
| #define PLC_SUPPORT_PRIV_ZC_CLCT        0
 | |
| 
 | |
| /* define if support peer snr tsfm algorithm */
 | |
| #define PLC_SUPPORT_TSFM_PEER_SNR       0
 | |
| 
 | |
| /* define if support fast connection network */
 | |
| #define PLC_SUPPORT_FAST_CONNECT        (!!IOT_SMART_CONFIG)
 | |
| 
 | |
| /* define if support automatically adjust beacon tdma slot duration */
 | |
| #define PLC_SUPPORT_AUTO_SLOT_DUR       (IOT_SMART_CONFIG && !HPLC_RF_SUPPORT)
 | |
| 
 | |
| /* define if support bound csma slot foward, 1 - support, 0 - no support */
 | |
| #define PLC_SUPPORT_BCSMA_SLOT_FWD      (0)
 | |
| 
 | |
| /* define if physical phase ident support */
 | |
| #if (HW_PLATFORM == HW_PLATFORM_SIMU)
 | |
| #define PLC_SUPPORT_PHY_PHASE_IDENT     0
 | |
| #define PLC_SUPPORT_FB_DETECT           0
 | |
| /* if set, cco discovery node list mme will be compressed */
 | |
| #define PLC_SUPPORT_CCO_DIS_MME_COMPRESS 0
 | |
| #define PLC_SUPPORT_NW_UPLINK_CHK       0
 | |
| #else //HW_PLATFORM == HW_PLATFORM_SIMU
 | |
| #if (MAC_ZC_ENABLE)
 | |
| #define PLC_SUPPORT_PHY_PHASE_IDENT     1
 | |
| #else /* (MAC_ZC_ENABLE) */
 | |
| #define PLC_SUPPORT_PHY_PHASE_IDENT     0
 | |
| #endif /* (MAC_ZC_ENABLE) */
 | |
| /* define if support freq band detection */
 | |
| #if SUPPORT_SOUTHERN_POWER_GRID
 | |
| #define PLC_SUPPORT_FB_DETECT           1
 | |
| #define PLC_SUPPORT_CCO_DIS_MME_COMPRESS 0
 | |
| /* define if support uplink traffic succeed ratio check */
 | |
| #define PLC_SUPPORT_NW_UPLINK_CHK       1
 | |
| #else //SUPPORT_SOUTHERN_POWER_GRID
 | |
| #define PLC_SUPPORT_FB_DETECT           0
 | |
| #define PLC_SUPPORT_CCO_DIS_MME_COMPRESS 0
 | |
| /* define if support uplink traffic succeed ratio check */
 | |
| #define PLC_SUPPORT_NW_UPLINK_CHK       0
 | |
| #endif
 | |
| #endif
 | |
| 
 | |
| /* define if support Beijing ntb tsfm algorithm */
 | |
| #define PLC_SUPPORT_BJ_NTB_TSFM         1
 | |
| /* define if support ntb tsfm compare two edge */
 | |
| #define PLC_SUPPORT_TSFM_CMP_2_EDGE     1
 | |
| 
 | |
| /* define if support zc ntb tsfm algorithm */
 | |
| #if (IOT_FLASH_SIZE >= 2 || PLC_SUPPORT_CCO_ROLE)
 | |
| #define PLC_SUPPORT_TSFM_ZC_NTB         1
 | |
| #define PLC_SUPPORT_HX_LED              1
 | |
| #else
 | |
| #define PLC_SUPPORT_TSFM_ZC_NTB         0
 | |
| #define PLC_SUPPORT_HX_LED              0
 | |
| #endif
 | |
| 
 | |
| #ifndef ENA_CCO_RX_THR_PHASE_CHANGE
 | |
| #if PLC_SUPPORT_CCO_ROLE
 | |
| #define ENA_CCO_RX_THR_PHASE_CHANGE     (TARGET_VERSION == TARGET_KUNLUN)
 | |
| #else
 | |
| #define ENA_CCO_RX_THR_PHASE_CHANGE     0
 | |
| #endif
 | |
| #endif
 | |
| 
 | |
| #ifndef ENA_RX_DIFF_NID_BCAST
 | |
| #if (PLC_SUPPORT_CCO_ROLE)
 | |
| #define ENA_RX_DIFF_NID_BCAST           0
 | |
| #else
 | |
| #define ENA_RX_DIFF_NID_BCAST           1
 | |
| #endif
 | |
| #endif
 | |
| 
 | |
| #if SUPPORT_SOUTHERN_POWER_GRID
 | |
| /* enable multiband */
 | |
| #define ENABLE_MULTIBAND                (!IOT_BRM_ENABLE && !IOT_BSRM_MODE)
 | |
| #else
 | |
| #define ENABLE_MULTIBAND                (0)
 | |
| #endif
 | |
| 
 | |
| /* define if sila non header mode is enable */
 | |
| #ifndef PLC_SILA_NHM_ENABLE
 | |
| #define PLC_SILA_NHM_ENABLE             (SUPPORT_IEEE_1901)
 | |
| #endif
 | |
| 
 | |
| /* enable ppm multi node record */
 | |
| #define MAC_PPM_MULTI_NODE_ENABLE       (0)
 | |
| 
 | |
| /* PLC configuration end ******************************************************/
 | |
| 
 | |
| /* FTM mode configuration start ***********************************************/
 | |
| 
 | |
| /* FTM includes MP mode, and MP mode is combined
 | |
|  * with MM mode, so FTM_SUPPORT is always defined 1
 | |
|  */
 | |
| #ifndef IOT_FTM_SUPPORT
 | |
| #define IOT_FTM_SUPPORT                 1
 | |
| #endif
 | |
| 
 | |
| /* 0: FTM mode; 1: MM mode or MP mode */
 | |
| #ifndef IOT_MP_SUPPORT
 | |
| #define IOT_MP_SUPPORT                  1
 | |
| #endif
 | |
| 
 | |
| #if (IOT_MP_SUPPORT == 0 && (HW_PLATFORM >= HW_PLATFORM_FPGA))
 | |
| /* init ftm start to a default mode - tx/rx */
 | |
| #define IOT_FTM_INIT_MODE_SUPPORT       0
 | |
| #endif
 | |
| 
 | |
| #define IOT_PT_BOARD_NONE               0
 | |
| /* kl1, hz3011 */
 | |
| #define IOT_PT_BOARD_K48                1
 | |
| /* kl3, hz3211 */
 | |
| #define IOT_PT_BOARD_K76                2
 | |
| 
 | |
| /* production test board mp mode select */
 | |
| #ifndef IOT_PT_BOARD_SELECT
 | |
| #define IOT_PT_BOARD_SELECT             IOT_PT_BOARD_NONE
 | |
| #endif
 | |
| /* FTM mode configuration end *************************************************/
 | |
| 
 | |
| /* POWER managerment configuration start **************************************/
 | |
| 
 | |
| #define PLC_SUPPORT_PM                  1
 | |
| 
 | |
| #define PLC_POWER_RECOVER_NOT_RESTART   1
 | |
| 
 | |
| #if (PLC_SUPPORT_PM && !IOT_ENERGE_METER_ENABLE\
 | |
|     && (HW_PLATFORM > HW_PLATFORM_FPGA)\
 | |
|     && (IOT_STA_CONTROL_MODE != IOT_STA_CONTROL_TYPE_STA) \
 | |
|     && (!PLC_SUPPORT_HW_TOPO))
 | |
| #define STATIC_POWER_SAVE               1
 | |
| /* add macro for beijing cert test.
 | |
|  * set 1: after receiving the correct FC,
 | |
|  * continue to turn on the power save function.
 | |
|  * set 0: after receiving the correct FC,
 | |
|  * turn off the power save function.
 | |
|  */
 | |
| #define RX_FC_ON_POWER_SAVE             (STATIC_POWER_SAVE && 0)
 | |
| 
 | |
| #if TARGET_VERSION == TARGET_KUNLUN3
 | |
| /* define kl3 the way of switch core freq 25M and 150M
 | |
|  * 0: sleep/wakeup switch, 20ms/40ms switch.
 | |
|  * 1: mac pm start/ mac pm stop switch
 | |
|  */
 | |
| #define PLC_PM_SWITCH_POLICY            (1 && IOT_MP_SUPPORT)
 | |
| #else
 | |
| /* kl1/2 need use sleep/wakeup switch */
 | |
| #define PLC_PM_SWITCH_POLICY            0
 | |
| #endif
 | |
| 
 | |
| #else
 | |
| 
 | |
| #define STATIC_POWER_SAVE               0
 | |
| 
 | |
| #define RX_FC_ON_POWER_SAVE             0
 | |
| 
 | |
| #endif
 | |
| 
 | |
| #ifndef PM_USE_DSR
 | |
| #define PM_USE_DSR                      1
 | |
| #endif
 | |
| 
 | |
| #define PHY_BIAS_ADJUST_AUTO_EN         1
 | |
| 
 | |
| #if (PLC_SUPPORT_PM && !IOT_ENERGE_METER_ENABLE\
 | |
|     && (HW_PLATFORM > HW_PLATFORM_FPGA))
 | |
| #define PLC_SUPPORT_POWER_COLLAPSE      1
 | |
| #endif
 | |
| 
 | |
| #define POWER_MANAGEMENT_ZC_SUPPORT     1
 | |
| 
 | |
| /* POWER managerment configuration end ****************************************/
 | |
| 
 | |
| /* TASK priority configuration start ******************************************/
 | |
| 
 | |
| #if (HW_PLATFORM == HW_PLATFORM_SIMU)
 | |
| 
 | |
| #define PLC_INIT_TASK_PRIO              9
 | |
| #define PLC_LIB_TASK_PRIO               7
 | |
| #define PLC_CVG_TASK_PRIO               8
 | |
| #define PLC_MAC_TASK_PRIO               9
 | |
| #define COMMUNICATOR_RX_TASK_PRIO       7
 | |
| #define COMMUNICATOR_RX_CLI_TASK_PRIO   7
 | |
| #define CLI_TX_MODULE_MSG_TASK_PRIO     8
 | |
| #define CLI_MAIN_TASK_PRIO              8
 | |
| #define CLI_HOST_TASK_PRIO              8
 | |
| #define IOT_CLI_TASK_PRIO               8
 | |
| #define IOT_UART_TASK_PRIO              8
 | |
| #define IOT_PIB_TASK_PRIO               7
 | |
| #define IOT_SHARE_TASK_L_PRIO           6
 | |
| #define IOT_SHARE_TASK_H_PRIO           9
 | |
| #define WIN_RECEIVE_TASK_PRIO           7
 | |
| #define SIMULATOR_HW_SCHED_TASK_PRIO    8
 | |
| #define SIMULATOR_HWQ_TASK_PRIO         8
 | |
| #define SIMULATOR_TX_TASK_PRIO          9
 | |
| #define SIMULATOR_NEW_MPDU_TASK_PRIO    7
 | |
| #define SIMULATOR_RX_TASK_PRIO          8
 | |
| #define IOT_SOCKET_TASK_PRIO            7
 | |
| 
 | |
| #else /* (HW_PLATFORM == HW_PLATFORM_SIMU) */
 | |
| 
 | |
| #define IOT_INIT_TASK_PRIO              9
 | |
| #define PLC_LIB_TASK_PRIO               7
 | |
| #define PLC_CVG_TASK_PRIO               8
 | |
| #define PLC_MAC_TASK_PRIO               9
 | |
| #define COMMUNICATOR_RX_TASK_PRIO       8
 | |
| #define COMMUNICATOR_RX_CLI_TASK_PRIO   7
 | |
| #define CLI_TX_MODULE_MSG_TASK_PRIO     8
 | |
| #define CLI_MAIN_TASK_PRIO              8
 | |
| #define CLI_HOST_TASK_PRIO              8
 | |
| #define IOT_CLI_TASK_PRIO               8
 | |
| #if (IOT_FTM_SUPPORT  == 0)
 | |
| #define IOT_UART_TASK_PRIO              8
 | |
| #else
 | |
| #define IOT_UART_TASK_PRIO              9
 | |
| #endif
 | |
| #define IOT_PIB_TASK_PRIO               7
 | |
| #define IOT_FTM_TASK_PRIO               9
 | |
| #define IOT_SHARE_TASK_L_PRIO           6
 | |
| #define IOT_SHARE_TASK_H_PRIO           9
 | |
| #define IOT_SOCKET_TASK_PRIO            7
 | |
| 
 | |
| #endif
 | |
| 
 | |
| #if (PLC_SUPPORT_CCO_ROLE)
 | |
| 
 | |
| #define PLC_TASK_HIGHEST_PRIO           PLC_MAC_TASK_PRIO
 | |
| 
 | |
| #else /* PLC_SUPPORT_CCO_ROLE */
 | |
| 
 | |
| #define PLC_TASK_HIGHEST_PRIO           10
 | |
| 
 | |
| #endif /* PLC_SUPPORT_CCO_ROLE */
 | |
| 
 | |
| /* TASK priority configuration end ********************************************/
 | |
| 
 | |
| /* TASK size configuration start **********************************************/
 | |
| 
 | |
| #if (PLC_SUPPORT_CCO_ROLE)
 | |
| 
 | |
| #define IOT_DEFAULT_STACK_SIZE          512
 | |
| #define PLC_MAC_STACK_SIZE  (HPLC_RF_DEV_SUPPORT ? (512 + 384) : 512)
 | |
| #define PLC_CVG_STACK_SIZE              (512 + 256 + 256)
 | |
| #define PLC_STARTUP_INIT_SIZE           (512 + 128)
 | |
| 
 | |
| #else /* PLC_SUPPORT_CCO_ROLE */
 | |
| 
 | |
| #if (PHY_BBAI_ALGORITHM == PHY_BBAI_SLIDE_WINDOWS)
 | |
| #define IOT_DEFAULT_STACK_SIZE          512
 | |
| #else
 | |
| #define IOT_DEFAULT_STACK_SIZE          384
 | |
| #endif
 | |
| #define PLC_MAC_STACK_SIZE  (HPLC_RF_DEV_SUPPORT ? (512 + 384) : 512)
 | |
| 
 | |
| #if ((PLC_NETWORK_SCALE > 1015) || HPLC_RF_DEV_SUPPORT)
 | |
| #define PLC_CVG_STACK_SIZE              (512 + 256 + 128)
 | |
| #else
 | |
| #define PLC_CVG_STACK_SIZE              (512 + 64)
 | |
| #endif
 | |
| 
 | |
| #define PLC_STARTUP_INIT_SIZE           (512 + 128)
 | |
| 
 | |
| #endif /* PLC_SUPPORT_CCO_ROLE */
 | |
| 
 | |
| /* TASK size configuration end ************************************************/
 | |
| 
 | |
| /* WAR configuration start ****************************************************/
 | |
| 
 | |
| #if HW_PLATFORM >= HW_PLATFORM_FPGA
 | |
| #if (IOT_SMART_CONFIG)
 | |
| /* Enable IOT Market Low Mac Beheavior */
 | |
| #define IOT_POWER_GRID_CONFIG           0
 | |
| #else
 | |
| /* Enable Smart Grid Spec Defined Low Mac Beheavior */
 | |
| #define IOT_POWER_GRID_CONFIG           1
 | |
| #endif
 | |
| 
 | |
| #ifndef AUTO_PLC_HIGH_PWR
 | |
| #define AUTO_PLC_HIGH_PWR               IOT_MP_SUPPORT
 | |
| #endif
 | |
| 
 | |
| /* check rx per pb crc by sw */
 | |
| #ifndef ENA_SW_PBCRC_CHECK
 | |
| #define ENA_SW_PBCRC_CHECK              1
 | |
| #endif
 | |
| 
 | |
| /* check rx fc crc by sw */
 | |
| #ifndef ENA_SW_FCCRC_CHECK
 | |
| #if (SUPPORT_SOUTHERN_POWER_GRID)
 | |
| #define ENA_SW_FCCRC_CHECK              1
 | |
| #else //SUPPORT_SOUTHERN_POWER_GRID
 | |
| #define ENA_SW_FCCRC_CHECK              (TARGET_VERSION == TARGET_KUNLUN3)
 | |
| #endif
 | |
| #endif
 | |
| 
 | |
| /* ppm ntb sync and cal */
 | |
| /* kl2 sync ntb use hw auto sync */
 | |
| #define PPM_NTB_CAL                     (TARGET_VERSION == TARGET_KUNLUN)
 | |
| /* force cco's ppm */
 | |
| #define FORCE_INI_PPM                   0
 | |
| 
 | |
| #define DBG_RX_ABORT_REASON_4           1
 | |
| /*dump hw reg*/
 | |
| #define DBG_HW_DUMP                     0
 | |
| 
 | |
| /* mac rid pbnum input flash */
 | |
| #define MAC_RID_PBNUM_FLASH_LOG         1
 | |
| 
 | |
| /*cco check spur support */
 | |
| #define CCO_CHECK_SPUR_SUPPORT          ((TARGET_VERSION <= TARGET_KUNLUN3) \
 | |
|                                             && PLC_SUPPORT_CCO_ROLE \
 | |
|                                             && IOT_MP_SUPPORT \
 | |
|                                             && (IOT_STA_CONTROL_MODE \
 | |
|                                             != IOT_STA_CONTROL_TYPE_STA))
 | |
| 
 | |
| /*sta check spur support */
 | |
| #define STA_CHECK_SPUR_SUPPORT          ((TARGET_VERSION <= TARGET_KUNLUN3) \
 | |
|                                             && !PLC_SUPPORT_CCO_ROLE \
 | |
|                                             && IOT_MP_SUPPORT \
 | |
|                                             && (IOT_STA_CONTROL_MODE \
 | |
|                                             != IOT_STA_CONTROL_TYPE_STA))
 | |
| #if (CCO_CHECK_SPUR_SUPPORT || STA_CHECK_SPUR_SUPPORT)
 | |
| /* debug info for check spur */
 | |
| #define MAC_CHECK_SPUR_DEBUG            0
 | |
| #endif
 | |
| 
 | |
| #if PLC_SUPPORT_CCO_ROLE
 | |
| /*only cco open this macro*/
 | |
| #define DEBUG_CANNOT_SENDOUT_PKT        (IOT_MP_SUPPORT == 1)
 | |
| #else
 | |
| #define DEBUG_CANNOT_SENDOUT_PKT        ((IOT_MP_SUPPORT == 1) && \
 | |
|                                          (TARGET_VERSION == TARGET_KUNLUN))
 | |
| #endif
 | |
| 
 | |
| #define DEBUG_PKT_OVERWRITE             0
 | |
| 
 | |
| #define DEBUG_FREE_STREAM_FAIL          1
 | |
| 
 | |
| #define DEBUG_PKT_OVERFLOW              1
 | |
| 
 | |
| #define DEBUG_HWQ_SHCED_HANG            1
 | |
| //debug addr if invaild addr in isr
 | |
| #define DEBUG_INVAILD_ADDR              0
 | |
| //debug rx pb cnt not enough
 | |
| #define DEBUG_RX_PB_CNT_NOT_ENOUGH      1
 | |
| 
 | |
| //debug stream is not enough and free timeout steam
 | |
| #define DEBUG_STREAM_TIMEOUT            0
 | |
| 
 | |
| #if SUPPORT_SOUTHERN_POWER_GRID
 | |
| #define DEBUG_SPG_PER_MSDU_MPDU_TX      1
 | |
| #define DEBUG_SPG_PER_MSDU_MPDU_RX      0
 | |
| #endif
 | |
| 
 | |
| #else /* HW_PLATFORM >= HW_PLATFORM_FPGA */
 | |
| 
 | |
| #define IOT_POWER_GRID_CONFIG           1
 | |
| 
 | |
| /* ppm ntb sync and cal */
 | |
| #define PPM_NTB_CAL                     0
 | |
| #define FORCE_INI_PPM                   0
 | |
| 
 | |
| #define AUTO_PLC_HIGH_PWR               0
 | |
| 
 | |
| /* check rx per pb crc by sw */
 | |
| #ifndef ENA_SW_PBCRC_CHECK
 | |
| #define ENA_SW_PBCRC_CHECK              0
 | |
| #endif
 | |
| 
 | |
| /* check rx fc crc by sw */
 | |
| #ifndef ENA_SW_FCCRC_CHECK
 | |
| #define ENA_SW_FCCRC_CHECK              0
 | |
| #endif
 | |
| 
 | |
| #define DBG_RX_ABORT_REASON_4           0
 | |
| 
 | |
| #define DBG_HW_DUMP                     0
 | |
| 
 | |
| /* mac rid pbnum input flash */
 | |
| #define MAC_RID_PBNUM_FLASH_LOG         0
 | |
| 
 | |
| #define DEBUG_CANNOT_SENDOUT_PKT        0
 | |
| /*cco check spur support */
 | |
| #define CCO_CHECK_SPUR_SUPPORT          0
 | |
| 
 | |
| #define DEBUG_FREE_STREAM_FAIL          0
 | |
| 
 | |
| #define DEBUG_PKT_OVERFLOW              0
 | |
| 
 | |
| #define DEBUG_HWQ_SHCED_HANG            0
 | |
| 
 | |
| #define DEBUG_INVAILD_ADDR              0
 | |
| 
 | |
| #define DEBUG_RX_PB_CNT_NOT_ENOUGH      0
 | |
| 
 | |
| #define DEBUG_STREAM_TIMEOUT            0
 | |
| 
 | |
| #define IOT_FTM_INIT_MODE_SUPPORT       0
 | |
| 
 | |
| #endif /* HW_PLATFORM >= HW_PLATFORM_FPGA */
 | |
| 
 | |
| /* WAR for dingxin rx 2pb mpdu on spg */
 | |
| #define MAC_RX_2PB_WAR                  (SUPPORT_SOUTHERN_POWER_GRID && 0)
 | |
| 
 | |
| #ifndef  WAR_QJWY_MUL_MPDU_ISSUE
 | |
| /* war for qjwy */
 | |
| #define  WAR_QJWY_MUL_MPDU_ISSUE        (1)
 | |
| #endif
 | |
| 
 | |
| /* mac fix symbol number */
 | |
| #define MAC_SYM_NUM_FIX                 \
 | |
|     (SUPPORT_SOUTHERN_POWER_GRID && ((TARGET_VERSION == TARGET_KUNLUN) || \
 | |
|     (TARGET_VERSION == TARGET_KUNLUN3)))
 | |
| 
 | |
| /* WAR configuration end ******************************************************/
 | |
| 
 | |
| /* DEBUG configuration start **************************************************/
 | |
| 
 | |
| #define PLC_MAC_LOG_LEVEL_INVAIL        0
 | |
| #define PLC_MAC_LOG_LEVEL_1             1
 | |
| #define PLC_MAC_LOG_LEVEL_2             2
 | |
| #define PLC_MAC_LOG_LEVEL_3             3
 | |
| #define PLC_MAC_LOG_LEVEL_4             4
 | |
| 
 | |
| #if (IOT_MP_SUPPORT == 1) && (HW_PLATFORM >= HW_PLATFORM_FPGA)
 | |
| /* enable if MM mode and on FPGA */
 | |
| #define PLC_MAC_RX_DEBUG_LOG            PLC_MAC_LOG_LEVEL_1
 | |
| #define PLC_MAC_TX_DEBUG_LOG            PLC_MAC_LOG_LEVEL_1
 | |
| #define PLC_MAC_RA_DEBUG_LOG            PLC_MAC_LOG_LEVEL_1
 | |
| #define RF_MAC_RX_DEBUG_LOG             PLC_MAC_LOG_LEVEL_1
 | |
| #define RF_MAC_TX_DEBUG_LOG             PLC_MAC_LOG_LEVEL_1
 | |
| #else
 | |
| #define PLC_MAC_RX_DEBUG_LOG            PLC_MAC_LOG_LEVEL_INVAIL
 | |
| #define PLC_MAC_TX_DEBUG_LOG            PLC_MAC_LOG_LEVEL_INVAIL
 | |
| #define PLC_MAC_RA_DEBUG_LOG            PLC_MAC_LOG_LEVEL_INVAIL
 | |
| #define RF_MAC_RX_DEBUG_LOG             PLC_MAC_LOG_LEVEL_INVAIL
 | |
| #define RF_MAC_TX_DEBUG_LOG             PLC_MAC_LOG_LEVEL_INVAIL
 | |
| #endif
 | |
| 
 | |
| #if (1 == CPLC_IOT_CERT_SUPPORT)
 | |
| #define CERT_TEST_DEBUG                 0
 | |
| #endif
 | |
| 
 | |
| /* use this macro to record timestamp */
 | |
| #define MAC_TIMESTAMPING                0
 | |
| 
 | |
| /* check rx pkt data valid for ieee1901 */
 | |
| #if (SUPPORT_SMART_GRID && SUPPORT_IEEE_1901 \
 | |
|     && (HW_PLATFORM >= HW_PLATFORM_FPGA))
 | |
| #define MAC_RX_CHK_VALID_I1901          1
 | |
| #else
 | |
| #define MAC_RX_CHK_VALID_I1901          0
 | |
| #endif
 | |
| 
 | |
| /* would print some statistic */
 | |
| #define PLC_MEM_ALLOC_STAT              2
 | |
| #if PLC_MEM_ALLOC_STAT
 | |
| #define DESC_STAT_DISPLAY_FREQ          0x3ff
 | |
| #define IOTPKT_STAT_DISPLAY_FREQ        0x5ff
 | |
| #endif
 | |
| #define CVG_HB_DEBUG                    0
 | |
| #if (HW_PLATFORM == HW_PLATFORM_SIMU)
 | |
| #define CVG_RT_DEBUG                    1
 | |
| #define CVG_ASSOC_DEBUG                 0
 | |
| #else
 | |
| #define CVG_RT_DEBUG                    2
 | |
| #define CVG_ASSOC_DEBUG                 1
 | |
| #endif
 | |
| #define CVG_NETWORK_NTB_DEBUG           0
 | |
| #define CVG_BWM_DEBUG                   0
 | |
| #define CVG_ZC_DEBUG                    0
 | |
| #define MAC_SCHED_DEBUG                 0
 | |
| #define MAC_SCHED_HW_DEBUG              0
 | |
| #if PLC_SUPPORT_NEIGHBOR_NW_NEGO && PLC_SUPPORT_CCO_ROLE
 | |
| #define MAC_SCHED_NN_DEBUG              0
 | |
| #else
 | |
| #define MAC_SCHED_NN_DEBUG              0
 | |
| #endif
 | |
| 
 | |
| #if PLC_SUPPORT_CCO_ROLE
 | |
| #define MAC_SCHED_TIME_DISORDER_DEBUG   1
 | |
| #else
 | |
| #define MAC_SCHED_TIME_DISORDER_DEBUG   0
 | |
| #endif
 | |
| 
 | |
| #define RUNTIME_DEBUG 0
 | |
| #define IOT_PLC_NO_CRASH_DIALOG         0
 | |
| 
 | |
| #if HW_PLATFORM == HW_PLATFORM_SIMU
 | |
| #define IOT_MEM_POOL_DOUBLE_FREE_DBG    1
 | |
| #else //HW_PLATFORM == HW_PLATFORM_SIMU
 | |
| #define IOT_MEM_POOL_DOUBLE_FREE_DBG    1
 | |
| #endif
 | |
| 
 | |
| /* define if statistic log is enabled */
 | |
| #define PLC_STATISTICS_ENABLE           0
 | |
| 
 | |
| /* CHIP bring up debug */
 | |
| #if HW_PLATFORM == HW_PLATFORM_SILICON
 | |
| #define CVG_PEER_DEBUG                  1
 | |
| #define CHIP_BRINGUP_DEBUG              1
 | |
| /* beacon addr conflict debug */
 | |
| #define CVG_BC_ADDR_DEBUG               0
 | |
| /* debug switch for long time no beacon receiving */
 | |
| #define CVG_NO_BC_RX_DEBUG              0
 | |
| #else
 | |
| #define CVG_PEER_DEBUG                  0
 | |
| #define CHIP_BRINGUP_DEBUG              0
 | |
| /* beacon addr conflict debug */
 | |
| #define CVG_BC_ADDR_DEBUG               0
 | |
| /* debug switch for long time no beacon receiving */
 | |
| #define CVG_NO_BC_RX_DEBUG              0
 | |
| #endif
 | |
| 
 | |
| /* hardware transformer detection debug */
 | |
| #define HW_TSFM_DEBUG                   0
 | |
| 
 | |
| /* hardware topo debug */
 | |
| #define HW_TOPO_DEBUG                   0
 | |
| 
 | |
| /* iram isr monitor debug */
 | |
| #if (IOT_FLASH_SIZE >= 2)
 | |
| #define SNAPSHOT_MONITOR_DEBUG          0
 | |
| #else
 | |
| #define SNAPSHOT_MONITOR_DEBUG          0
 | |
| #endif
 | |
| #if ((TARGET_VERSION == TARGET_KUNLUN) || (TARGET_VERSION == TARGET_KUNLUN2))
 | |
| #define DUAL_WDG_ON_ONE_CPU_ENABLE      1
 | |
| #else
 | |
| #define DUAL_WDG_ON_ONE_CPU_ENABLE      0
 | |
| #endif
 | |
| #define JTAG0_REMAPPING_DEBUG           0
 | |
| #define FLASH_SUSPEND_ENABLE            1
 | |
| #define FLASH_HIGH_FREQ_ENABLE          0
 | |
| 
 | |
| #if IOT_PT_BOARD_SELECT
 | |
| #define SYSTEM_GPIO_RESET_CONTROL       0
 | |
| #else
 | |
| #define SYSTEM_GPIO_RESET_CONTROL       1
 | |
| #endif
 | |
| #define IOT_RECOVER_TIME                (5*60*1000) // 5 min
 | |
| 
 | |
| #if (HW_PLATFORM == HW_PLATFORM_FPGA && FPGA_IMAGE_TYPE == FPGA_IMAGE_TYPE_BB)
 | |
| #define IOT_LOG_TO_FLASH_ENABLE         0
 | |
| #else //HW_PLATFORM == HW_PLATFORM_FPGA
 | |
| #define IOT_LOG_TO_FLASH_ENABLE         1
 | |
| #endif
 | |
| 
 | |
| /* rf schedule debug */
 | |
| #define MAC_RF_SCHED_DEBUG              0
 | |
| 
 | |
| /* Enable task dump on KL3. */
 | |
| #if TARGET_VERSION == TARGET_KUNLUN3
 | |
| #define TASK_CRASH_DUMP_DEBUG           1
 | |
| #define TASK_CRASH_DUMP_STACK_DEBUG     1
 | |
| #define TASK_CRASH_DUMP_TO_FLASH        1
 | |
| #endif
 | |
| 
 | |
| /* DEBUG configuration end ****************************************************/
 | |
| 
 | |
| /* SIMULATOR configuration start **********************************************/
 | |
| 
 | |
| /* plc simulator */
 | |
| #define RANDOMLY_DROP_PB_SUPPORT        0
 | |
| #define SACK_ENABLE                     1
 | |
| #define SCHED_SUPPORT                   1
 | |
| #define SCHED_DEBUG                     0
 | |
| #define CHANNEL_SIMULATOR_SUPPORT       0
 | |
| #define SIMU_ACROSS_MACHINE             0
 | |
| #define SIMU_TEST_MODE                  0
 | |
| #define DISCARD_CLI_PACKAGE             0
 | |
| #define GRID_TYPE_SG                    0
 | |
| #define GRID_TYPE_SOUTHERN              3
 | |
| #define SIMU_SUPPORT_POWER_GRID_TYPE    GRID_TYPE_SG
 | |
| #if HW_PLATFORM == HW_PLATFORM_SIMU
 | |
| #define SIMU_DBG                        0
 | |
| #endif
 | |
| 
 | |
| /* rf simulator */
 | |
| #define RF_SCHED_SUPPORT                HPLC_RF_DEV_SUPPORT
 | |
| 
 | |
| /* SIMULATOR configuration end ************************************************/
 | |
| 
 | |
| /* BSP configuration start ****************************************************/
 | |
| 
 | |
| /* extern energy meter. if enable, the extern energy meter will be supported */
 | |
| #if (HW_PLATFORM >= HW_PLATFORM_FPGA)
 | |
| #ifndef IOT_ENERGY_METER_EXT_ENABLE
 | |
| #if ((TARGET_VERSION == TARGET_KUNLUN2 || TARGET_VERSION == TARGET_KUNLUN3) && \
 | |
|     IOT_BRM_ENABLE)
 | |
| #define IOT_ENERGY_METER_EXT_ENABLE     1
 | |
| #else
 | |
| #define IOT_ENERGY_METER_EXT_ENABLE     0
 | |
| #endif
 | |
| #endif
 | |
| #else //HW_PLATFORM >= HW_PLATFORM_FPGA
 | |
| #ifndef IOT_ENERGY_METER_EXT_ENABLE
 | |
| #define IOT_ENERGY_METER_EXT_ENABLE     0
 | |
| #endif
 | |
| #endif
 | |
| 
 | |
| /* extern humidity and temperature sensor. if enable, the humidity and
 | |
|  * temperature measurement will be supported
 | |
|  */
 | |
| #if (HW_PLATFORM >= HW_PLATFORM_FPGA)
 | |
| #ifndef IOT_HTM_EXT_ENABLE
 | |
| #if ((TARGET_VERSION == TARGET_KUNLUN2) && !PLC_SUPPORT_CCO_ROLE)
 | |
| #define IOT_HTM_EXT_ENABLE     1
 | |
| #else
 | |
| #define IOT_HTM_EXT_ENABLE     0
 | |
| #endif
 | |
| #endif
 | |
| #else //HW_PLATFORM >= HW_PLATFORM_FPGA
 | |
| #ifndef IOT_HTM_EXT_ENABLE
 | |
| #define IOT_HTM_EXT_ENABLE     0
 | |
| #endif
 | |
| #ifndef IOT_HTM_EXT_CHT8310_ENABLE
 | |
| #define IOT_HTM_EXT_CHT8310_ENABLE 0
 | |
| #endif
 | |
| #endif
 | |
| 
 | |
| /* extern gsm device. if enable, the gsm device will be supported
 | |
|  */
 | |
| #if (HW_PLATFORM >= HW_PLATFORM_FPGA)
 | |
| #ifndef IOT_GSM_EXT_ENABLE
 | |
| #if ((TARGET_VERSION == TARGET_KUNLUN2) && !PLC_SUPPORT_CCO_ROLE)
 | |
| #define IOT_GSM_EXT_ENABLE     1
 | |
| #else
 | |
| #define IOT_GSM_EXT_ENABLE     0
 | |
| #endif
 | |
| #endif
 | |
| #else //HW_PLATFORM >= HW_PLATFORM_FPGA
 | |
| #ifndef IOT_GSM_EXT_ENABLE
 | |
| #define IOT_GSM_EXT_ENABLE     0
 | |
| #endif
 | |
| #endif
 | |
| 
 | |
| /* extern Real-Time Clock sensor. if enable, the Real-Time Clock
 | |
|  * measurement will be supported
 | |
|  */
 | |
| #if (HW_PLATFORM >= HW_PLATFORM_FPGA)
 | |
| #ifndef IOT_RTC_EXT_ENABLE
 | |
| #if ((TARGET_VERSION == TARGET_KUNLUN2 || TARGET_VERSION == TARGET_KUNLUN3) && \
 | |
|     IOT_BRM_ENABLE)
 | |
| #define IOT_RTC_EXT_ENABLE     1
 | |
| #else
 | |
| #define IOT_RTC_EXT_ENABLE     0
 | |
| #endif
 | |
| #endif
 | |
| #else //HW_PLATFORM >= HW_PLATFORM_FPGA
 | |
| #ifndef IOT_RTC_EXT_ENABLE
 | |
| #define IOT_RTC_EXT_ENABLE     1
 | |
| #endif
 | |
| #endif
 | |
| 
 | |
| /* extern bluetooth. if enable, the extern bluetooth will be supported */
 | |
| #if (HW_PLATFORM >= HW_PLATFORM_FPGA)
 | |
| #ifndef IOT_BT_EXT_ENABLE
 | |
| #if ((TARGET_VERSION == TARGET_KUNLUN2 || TARGET_VERSION == TARGET_KUNLUN3) && \
 | |
|     IOT_BRM_ENABLE)
 | |
| #define IOT_BT_EXT_ENABLE               1
 | |
| #else
 | |
| #define IOT_BT_EXT_ENABLE               0
 | |
| #endif
 | |
| #endif
 | |
| #else //HW_PLATFORM >= HW_PLATFORM_FPGA
 | |
| #ifndef IOT_BT_EXT_ENABLE
 | |
| #define IOT_BT_EXT_ENABLE               0
 | |
| #endif
 | |
| #endif
 | |
| 
 | |
| #if (HW_PLATFORM >= HW_PLATFORM_FPGA)
 | |
| #ifndef IOT_FLASH_DCDC_TRIM_ENABLE
 | |
| #define IOT_FLASH_DCDC_TRIM_ENABLE      0
 | |
| #endif
 | |
| #else
 | |
| #ifndef IOT_FLASH_DCDC_TRIM_ENABLE
 | |
| #define IOT_FLASH_DCDC_TRIM_ENABLE      0
 | |
| #endif
 | |
| #endif
 | |
| 
 | |
| /* ext flash enable */
 | |
| #if (HW_PLATFORM >= HW_PLATFORM_FPGA)
 | |
| #ifndef IOT_EXT_FLASH_ENABLE
 | |
| #if ((TARGET_VERSION != TARGET_KUNLUN2) && !PLC_SUPPORT_CCO_ROLE)
 | |
| #define IOT_EXT_FLASH_ENABLE            (1)
 | |
| #else
 | |
| #define IOT_EXT_FLASH_ENABLE            (0)
 | |
| #endif
 | |
| #endif
 | |
| #else //HW_PLATFORM >= HW_PLATFORM_FPGA
 | |
| #ifndef IOT_EXT_FLASH_ENABLE
 | |
| #define IOT_EXT_FLASH_ENABLE            (0)
 | |
| #endif
 | |
| #endif
 | |
| 
 | |
| /* If DMA uart supported. */
 | |
| #if (PLC_SUPPORT_CCO_ROLE || IOT_STA_CONTROL_MODE == 1 ) \
 | |
|     && (HW_PLATFORM == HW_PLATFORM_SILICON || HW_PLATFORM == HW_PLATFORM_FPGA)
 | |
| #define IOT_UART_DMA_SUPPORT            1
 | |
| #else
 | |
| #define IOT_UART_DMA_SUPPORT            0
 | |
| #endif
 | |
| 
 | |
| /* TODO: move to hw_config.h later */
 | |
| #if ((MAC_MM_SNIFFER_MODE == MAC_SNIFFER_TYPE_MPDU) || \
 | |
|     (MAC_MM_SNIFFER_MODE == MAC_SNIFFER_TYPE_MSDU))
 | |
| /* enable emac driver */
 | |
| #define IOT_ETH_ENABLE                  (1)
 | |
| #endif
 | |
| 
 | |
| /* iot dbg msg enable */
 | |
| #define IOT_DBG_MSG_ENABLE              (HPLC_RF_DEV_SUPPORT && \
 | |
|                                         (HW_PLATFORM != HW_PLATFORM_SIMU))
 | |
| 
 | |
| /* mbedtls lib enable/disable */
 | |
| #define MBEDTLS_LIB_EN                  (TARGET_VERSION == TARGET_KUNLUN3 \
 | |
|                                         && HW_PLATFORM == HW_PLATFORM_SILICON)
 | |
| 
 | |
| #define IOT_LEDC_SOFT_MODE (TARGET_VERSION == TARGET_KUNLUN \
 | |
|                          || TARGET_VERSION == TARGET_KUNLUN2 \
 | |
|                          || TARGET_VERSION == TARGET_KUNLUN3)
 | |
| 
 | |
| #ifndef IOT_UART_HW_FLOW_CTL_ENABLE
 | |
| #define IOT_UART_HW_FLOW_CTL_ENABLE     IOT_IPC_SUPPORT_AMP
 | |
| #endif
 | |
| 
 | |
| #ifndef RTC_HW_ENABLE
 | |
| /* rtc hw error is greater than software error, so software is used for rtc */
 | |
| #define RTC_HW_ENABLE                   0
 | |
| #endif
 | |
| 
 | |
| #define IOT_CRYPTO_ASYNC_SUPPORT        (MBEDTLS_LIB_EN \
 | |
|                                         && (TARGET_VERSION == TARGET_KUNLUN3))
 | |
| 
 | |
| #define IOT_CRYPTO_MUTEX_PER_MODULE     (TARGET_VERSION == TARGET_KUNLUN3)
 | |
| 
 | |
| #ifndef IOT_SEC_CPU_SUPPORT
 | |
| #define IOT_SEC_CPU_SUPPORT             0
 | |
| #endif
 | |
| 
 | |
| #ifndef IOT_SPI_SUPPORT_DMA
 | |
| #define IOT_SPI_SUPPORT_DMA             0
 | |
| #endif
 | |
| 
 | |
| /* function switch of breakpoint resume upgrade */
 | |
| #define IOT_UPGRADE_SUPPORT_BREAKPOINT_RESUME (0)
 | |
| 
 | |
| /* BSP configuration end ******************************************************/
 | |
| 
 | |
| /* CLI configuration start ****************************************************/
 | |
| 
 | |
| #ifndef IOT_CLI_MODULE_ENABLE
 | |
| 
 | |
| #if IOT_HTBUS_EN
 | |
| 
 | |
| #define IOT_CLI_MODULE_ENABLE           0
 | |
| 
 | |
| #else /* IOT_HTBUS_EN */
 | |
| 
 | |
| #define IOT_CLI_MODULE_ENABLE           1
 | |
| 
 | |
| #endif /* IOT_HTBUS_EN */
 | |
| 
 | |
| #endif /* IOT_CLI_MODULE_ENABLE */
 | |
| 
 | |
| /* enable cli upgrade */
 | |
| #if (HW_PLATFORM >= HW_PLATFORM_FPGA)
 | |
| #if (IOT_SMART_GRID_ENABLE && (IOT_FLASH_SIZE < 4) && (!IOT_SMART_CONFIG) && \
 | |
|     (!IOT_BT_EXT_ENABLE))
 | |
| #define IOT_CLI_UPGRADE_ENABLE          0
 | |
| #else
 | |
| #define IOT_CLI_UPGRADE_ENABLE          1
 | |
| #endif
 | |
| #else //HW_PLATFORM >= HW_PLATFORM_FPGA
 | |
| #define IOT_CLI_UPGRADE_ENABLE          1
 | |
| #endif
 | |
| 
 | |
| #if (HW_PLATFORM >= HW_PLATFORM_FPGA)
 | |
| #if PLC_SUPPORT_CCO_ROLE || (PLC_SUPPORT_STA_ROLE && (!IOT_STA_CONTROL_MODE))
 | |
| #define IOT_CLI_CKB_ADDR_MAPPING        1
 | |
| #else
 | |
| #define IOT_CLI_CKB_ADDR_MAPPING        0
 | |
| #endif
 | |
| #else
 | |
| #define IOT_CLI_CKB_ADDR_MAPPING        1
 | |
| #endif
 | |
| 
 | |
| /* support cli wl cmd */
 | |
| #ifndef IOT_CLI_SUPPORT_WL_CMD
 | |
| #if (PLC_SUPPORT_CCO_ROLE || (IOT_SMART_CONFIG && (!IOT_STA_CONTROL_MODE)))
 | |
| #define IOT_CLI_SUPPORT_WL_CMD          1
 | |
| #else
 | |
| #define IOT_CLI_SUPPORT_WL_CMD          0
 | |
| #endif
 | |
| #endif
 | |
| 
 | |
| #ifndef IOT_CLI_IC_TOOL_EN
 | |
| #define IOT_CLI_IC_TOOL_EN              0
 | |
| #endif
 | |
| 
 | |
| #define IOT_CLI_RATE_TEST_EN            (TARGET_VERSION != TARGET_KUNLUN)
 | |
| 
 | |
| /* CLI configuration end ******************************************************/
 | |
| 
 | |
| /* PHY configuration start ****************************************************/
 | |
| /* improve pulse and spur performance in normal mode */
 | |
| #define PHY_HIGH_PERF_EN                1
 | |
| /* improve pulse and spur performance in cert mode */
 | |
| #define PHY_CHIP_CERT_EN                0
 | |
| /* spur war for Heilongjiang, Mengdong, Henan cert test bed */
 | |
| #define PHY_BJ_CERT_SPUR_WAR            0
 | |
| 
 | |
| /* phy private offset phase support, just for non-1901'iot */
 | |
| #define PHY_PRIVATE_OFFSET_PHASE        (IOT_SMART_CONFIG && !SUPPORT_IEEE_1901)
 | |
| 
 | |
| /* phy hw spike optimization */
 | |
| #define PHY_HW_SPIKE_OPTIMIZATION       (TARGET_VERSION != TARGET_KUNLUN)
 | |
| 
 | |
| /* phy cal reasonable snr, enable kl2/3 */
 | |
| #define PHY_CAL_REASONABLE_SNR          (TARGET_VERSION != TARGET_KUNLUN)
 | |
| 
 | |
| /* bbai way to find peak.
 | |
|  * 1: fix windows to find the maximum value
 | |
|  * 2: slide windows to find the maximum value
 | |
|  */
 | |
| #define PHY_BBAI_FIX_WINDOWS            1
 | |
| #define PHY_BBAI_SLIDE_WINDOWS          2
 | |
| #if TARGET_VERSION == TARGET_KUNLUN3
 | |
| #define PHY_BBAI_ALGORITHM              PHY_BBAI_SLIDE_WINDOWS
 | |
| #else
 | |
| #define PHY_BBAI_ALGORITHM              PHY_BBAI_FIX_WINDOWS
 | |
| #endif
 | |
| 
 | |
| /* PHY configuration end*******************************************************/
 | |
| 
 | |
| #ifdef __cplusplus
 | |
| }
 | |
| #endif
 | |
| 
 | |
| #endif /* PLC_CONFIG_H */
 |