318 lines
		
	
	
		
			9.4 KiB
		
	
	
	
		
			C
		
	
	
		
			Executable File
		
	
	
	
	
			
		
		
	
	
			318 lines
		
	
	
		
			9.4 KiB
		
	
	
	
		
			C
		
	
	
		
			Executable File
		
	
	
	
	
/****************************************************************************
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Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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be copied by any method or incorporated into another program without
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the express written consent of Aerospace C.Power. This Information or any portion
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thereof remains the property of Aerospace C.Power. The Information contained herein
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is believed to be accurate and Aerospace C.Power assumes no responsibility or
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liability for its use in any way and conveys no license or title under
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any patent or copyright and makes no representation or warranty that this
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Information is free from patent or copyright infringement.
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****************************************************************************/
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#ifndef MAC_TXQ_HW_H
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#define MAC_TXQ_HW_H
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#include "os_types.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define MAX_MAC_TXQ_NUM     24  /* 0 - 23 */
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#define MAX_MAC_DCU_NUM     5   /* 0 - 4 */
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#define HWQ_DEBUG_MODE          1
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#define HWQ_SCHE_MODE           0
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/* mac pcs busy timeout value */
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#define MAC_PCS_BUSY_TIMEOUT            2000
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/* mac pcs idle timeout value */
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#define MAC_PCS_IDLE_TIMEOUT            2000
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/**
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 * @brief mac_tx_cfg_bcn_miss_num() -  set hw rx mode both sr and qr
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 */
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void mac_rx_sr_qr_mode_set();
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/**
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 * @brief mac_tx_cfg_bcn_miss_num() -  config tx beacon miss num
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 * @param: num --    miss beacon num
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 */
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void mac_tx_cfg_bcn_miss_num(uint32_t num);
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/**
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 * @brief cfg_phy_tx_phase_select() -  force tx phase
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 * @param: enable --    1:enable 0:disable
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 * @param: phase --     0:all phase, 1:A , 2:B , 3:C
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 */
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void cfg_phy_tx_phase_select(uint32_t enable, uint32_t phase);
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/**
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* @brief mac_cfg_phy_tx_underflow_force() - force phy tx underflow.
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*
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* @param        none
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*
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* @return       none
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*/
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void mac_cfg_phy_tx_underflow_force(void);
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/* set the cfg of the specific qid */
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void mac_txq_cfg(uint32_t qid, uint32_t cap, \
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    uint32_t is_csma);
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/* enable the queue with the first tx desc */
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void mac_txq_enable(uint32_t qid, void *tx_desc);
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/* if enable, return none-zero
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 * else, return 0
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 */
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uint32_t mac_txq_is_enable(uint32_t qid);
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/* get txq tx comp status bitmap */
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uint32_t mac_txq_get_txcomp_status();
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/* clr the hwq txcomp */
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void mac_txq_clr_txcomp_status(uint32_t hwqid);
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/* enable/disable txq dbg mode */
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void mac_txq_set_dbg_mode(uint32_t is_dbg);
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/* set the txq poll interval, us unit */
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uint32_t mac_txq_set_poll_intval(uint32_t intvl_us);
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/* set the packet in hwq immediately */
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uint32_t mac_txq_trigger_send(uint32_t qid);
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uint32_t mac_tx_hw_get_bcn_swcrc_cfg();
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void mac_tx_hw_set_bcn_swcrc_cfg(uint32_t is_by_sw);
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/* check if dbg mode */
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uint32_t mac_txq_is_dbg_mode();
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void mac_tx_cfg_start_desc_timeout(uint32_t enable, uint32_t time_us);
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void mac_tx_cfg_end_desc_timeout(uint32_t enable, uint32_t time_us);
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void mac_tx_cfg_phy_tx_timeout(uint32_t enable, uint32_t time_us);
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void mac_tx_cfg_aes_key_timeout(uint32_t enable, uint32_t time_us);
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void mac_tx_cfg_buf_timeout(uint32_t enable, uint32_t time_us);
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void mac_tx_cfg_desc_timeout(uint32_t enable, uint32_t time_us);
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void mac_txq_cfg_tdma_do_cca(uint32_t enable);
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void mac_txq_clr_all_txcomp_status(uint32_t bitmap);
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uint32_t mac_txq_is_csma(uint32_t qid);
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void mac_set_slottime(uint32_t cap, uint32_t time_us);
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void mac_set_tx_bts_dly(int32_t delay_ntb);
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/**
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 * @brief mac_set_min_backoff_slotnum() -
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 *          set 2^x of min backoff be value
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 * @param tmr:    2^(_2_be)
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 */
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void mac_set_min_backoff_slotnum(uint32_t _2_be);
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/**
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 * @brief mac_tx_rx_common_rifs_tmr_set() - set common RIFS time.
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 * @param tmr:    RIFS time(us)
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 */
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void mac_tx_rx_common_rifs_tmr_set(uint32_t tmr);
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/**
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 * @brief mac_only_tx_rifs_tmr_set() - set tx RIFS time.
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 * @param tmr:    RIFS time(us)
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 */
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void mac_only_tx_rifs_tmr_set(uint32_t tmr);
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/**
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 * @brief mac_only_rx_rifs_tmr_set() - set rx RIFS time.
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 * @param tmr:    RIFS time(us)
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 */
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void mac_only_rx_rifs_tmr_set(uint32_t tmr);
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/**
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 * @brief mac_cfg_cifs_tmr_init     init cifs config
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 * @param proto:        current protocol, see PLC_PROTO_TYPE_XXX
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 * @return              none
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 */
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void mac_cfg_cifs_tmr_init(uint32_t proto);
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/**
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 * @brief mac_cfg_rifs_tmr_init     init rifs config
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 * @param is_cert:      0 - normal mode case, others - cert mode case
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 * @param proto:        current protocol, see PLC_PROTO_TYPE_XXX
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 * @return              none
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 */
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void mac_cfg_rifs_tmr_init(uint8_t is_cert, uint32_t proto);
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/**
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 * @brief mac_set_fc_fl_cfg_status() - set sw cfg fc frame len
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 * @param flag 0 : hw cfg, 1 : sw cfg
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 */
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void mac_set_fc_fl_cfg_status(uint8_t flag);
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/**
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 * @brief mac_get_fc_fl_cfg_status() - get fc frame len cfg status
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 * @return  0 : hw cfg, 1 : sw cfg
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 */
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uint32_t mac_get_fc_fl_cfg_status();
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/**
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 * @brief mac_get_tx_cifs() - get tx cifs value
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 * @return cifs value
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 */
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uint32_t mac_get_tx_cifs();
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/**
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 * @brief mac_get_tx_rifs() - get tx rifs value
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 * @return rifs value
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 */
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uint32_t mac_get_tx_rifs();
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/* @brief mac_get_tx_bifs() - get tx bifs value
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 * @param proto             current porotocol, see PLC_PROTO_TYPE_XXX
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 * @return:      bifs value - us
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 */
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uint32_t mac_get_tx_bifs(uint32_t proto);
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/**
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 * @brief set cifs time
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 * @param tmr - [value of us unit time]
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 * @return - [none]
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 */
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void mac_tx_cifs_tmr_set(uint32_t tmr);
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/**
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 * @brief set bifs time
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 * @param proto     [current porotocol, see PLC_PROTO_TYPE_XXX]
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 * @param tmr       [value of us unit time]
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 * @return - [none]
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 */
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void mac_tx_bifs_tmr_set(uint32_t proto, uint32_t tmr);
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/**
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 *@brief mac_tx_hw_set_delay  set count, and used to sw delay .
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 *@param tmr                [delay time]
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 *@exception                [none.]
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 *@return                   [none.]
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*/
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void mac_tx_hw_set_delay(uint32_t tmr);
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/**
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 *@brief mac_tx_hw_get_delay  get count, used to sw delay.
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 *@exception                [none.]
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 *@return                   [get time]
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*/
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uint32_t mac_tx_hw_get_delay();
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/**
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 * @brief mac_get_sche_rx_phase  get schedule rx phase
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 * @param tmr - [value of us unit time]
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 * @return - [rx phase]
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 */
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uint32_t mac_get_sche_rx_phase();
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/**
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 * @brief mac_set_cca_pcs_busy_timeout_ms   -this api is to set
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 *        the timeout ms value of cca's pcs busy, because the isr maybe trigger
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 *        if the value is too small, so we need to set the value before the isr enabled
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 * @param uint32_t ena                      -enable / disable.
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 * @param uint32_t time_ms                  -timeout value.
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 * @return                                  -0
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 */
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uint32_t mac_set_cca_pcs_busy_timeout_ms(uint32_t ena, uint32_t time_ms);
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/**
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 * @brief mac_set_cca_pcs_idle_timeout_ms      -this api is to set
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 *        the timeout ms value of cca's pcs idle, because the isr maybe trigger
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 *        if the value is too small, so we need to set the value before the isr enabled
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 * @param uint32_t ena                         -enable / disable.
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 * @param uint32_t time_ms                     -timeout value.
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 * @return                                     -0
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 */
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uint32_t mac_set_cca_pcs_idle_timeout_ms(uint32_t ena, uint32_t time_ms);
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/**
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 * @brief mac_cca_pcs_busy_isr_enable  -pcs busy isr enable.
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 * @param uint32_t pri                 -intterupte priority addr.
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 * @return                             -none.
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 */
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void mac_cca_pcs_busy_isr_enable(uint32_t pri);
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/**
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 * @brief mac_cca_pcs_busy_isr_disable -pcs busy isr disable.
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 * @param uint32_t pri                 -intterupte priority.
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 * @return                             -none.
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 */
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void mac_cca_pcs_busy_isr_disable(uint32_t pri);
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/**
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 * @brief mac_cca_pcs_idle_isr_enable  -pcs idle isr enable.
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 * @param uint32_t pri                 -intterupte priority.
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 * @return                             -none.
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 */
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void mac_cca_pcs_idle_isr_enable(uint32_t pri);
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/**
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 * @brief mac_cca_pcs_idle_isr_disable -pcs busy isr disable.
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 * @param uint32_t pri                 -intterupte priority.
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 * @return                             -none.
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 */
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void mac_cca_pcs_idle_isr_disable(uint32_t pri);
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/**
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 * @brief mac_cca_get_int_sts          -get cca int.
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 * @param uint32_t pri                 -intterupte priority.
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 * @return uint32_t                    -int status.
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 */
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uint32_t mac_cca_get_int_sts(uint32_t pri);
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/**
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 * @brief mac_cca_int_clear            -cca int clear.
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 * @param uint32_t pri                 -intterupte priority addr.
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 * @param uint32_t int_sts             -int status.
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 * @return                             -0.
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 */
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uint32_t mac_cca_int_clear(uint32_t pri, uint32_t int_sts);
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/**
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 * @brief mac_tx_cfg_cmd_slot_guard_interval      used for calculate if this
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                                                  frame may cross scheduler command
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 * @param uint32_t hw_write_time                  time for hw write mpdu end. uint us.
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 */
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void mac_tx_cfg_cmd_slot_guard_interval(uint32_t hw_write_time);
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/**
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 * @brief mac_tx_get_cmd_slot_guard_interval      get cmd slot guard time.
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 * @return                                        time for hw write mpdu end.
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 *                                                uint: us.
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 */
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uint32_t mac_tx_get_cmd_slot_guard_interval(void);
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/**
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 * @brief mac_tx_phy_sts_filter        -tx filter enable config.
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 * @param uint32_t filter_en           -filter enable.
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 * @param uint32_t err0_en             -error update 0 enable.
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 * @param uint32_t err1_en             -error update 1 enable.
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 * @return                             -0.
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 */
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uint32_t mac_tx_phy_sts_filter( \
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    bool_t filter_en, bool_t err0_en, bool_t err1_en);
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#ifdef __cplusplus
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}
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#endif
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#endif // !MAC_TXQ_HW_H
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