52 lines
1.6 KiB
C
52 lines
1.6 KiB
C
/****************************************************************************
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Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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be copied by any method or incorporated into another program without
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the express written consent of Aerospace C.Power. This Information or any portion
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thereof remains the property of Aerospace C.Power. The Information contained herein
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is believed to be accurate and Aerospace C.Power assumes no responsibility or
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liability for its use in any way and conveys no license or title under
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any patent or copyright and makes no representation or warranty that this
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Information is free from patent or copyright infringement.
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****************************************************************************/
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#ifndef __SRAM_H
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#define __SRAM_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief HAL Status structures definition
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*/
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typedef enum
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{
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HAL_SRAM_OK = 0x00U,
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HAL_SRAM_ERROR = 0x01U,
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HAL_SRAM_BUSY = 0x02U,
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HAL_SRAM_TIMEOUT = 0x03U,
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HAL_SRAM_NOT_SUPPORTED = 0x04U
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} sram_rt_sts_t;
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uint8_t sram_qspi_init(void);
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bool_t sram_qspi_is_busy(void);
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uint8_t sram_qspi_write(uint8_t* data, uint32_t wt_addr, uint32_t size);
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uint8_t sram_qspi_quad_write(uint8_t* data, uint32_t wt_addr, uint32_t size);
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uint8_t sram_qspi_erase_chip(void);
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uint8_t sram_qspi_read(uint8_t* data, uint32_t read_addr, uint32_t size);
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uint8_t sram_qspi_quad_read(uint8_t* data, uint32_t read_addr, uint32_t size);
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uint8_t sram_qspi_enter(void);
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uint8_t sram_qspi_exit(void);
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#ifdef __cplusplus
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}
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#endif
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#endif
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