29 lines
		
	
	
		
			987 B
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			29 lines
		
	
	
		
			987 B
		
	
	
	
		
			C
		
	
	
	
	
	
| #define ADA_BASEADDR 0x53200000
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| #define AHB_RF_BASEADDR 0x50000000
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| #define APB_GLB_BASEADDR 0x44000000
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| #define INTC_BASEADDR 0x44004000
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| #define RGF_HWQ_BASEADDR 0x51000800
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| #define RGF_RX_BASEADDR 0x51000C00
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| #define RGF_MAC_BASEADDR 0x51000000
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| #define RGF_TMR_BASEADDR 0x51000400
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| #define PHY_BASEADDR 0x51800000
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| #define SFC_RF_BASEADDR 0x52000100
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| #define SMC_RF_BASEADDR 0x52000200
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| #define PHY_RXTD_BASEADDR 0x51A00000
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| #define PHY_DFE_BASEADDR 0x51C00000
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| #define PHY_TX_BASEADDR 0x51900000
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| #define PHY_RX_FD_BASEADDR 0x51B00000
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| #define DAM_RF_BASEADDR 0x55000000
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| #define EFUSE_DIG_BASEADDR 0x44011000
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| #define DMA_BASEADDR 0x44012000
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| #define APB_UART_BASEADDR 0x44001000
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| #define APB_UART1_BASEADDR 0x44005000
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| #define APB_UART2_BASEADDR 0x44006000
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| #define APB_UART3_BASEADDR 0x44010000
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| #define GTMR_BASEADDR 0x44003000
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| #define GTMR1_BASEADDR 0x44008000
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| #define WDG_BASEADDR 0x4400e000
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| #define WDG1_BASEADDR 0x44023000
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| #define GPIO_MTX_BASEADDR 0x44020000
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| #define PIN_RF_BASEADDR 0x44007000
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