147 lines
4.1 KiB
C
147 lines
4.1 KiB
C
/**
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* \file timing_alt.h
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*
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* \brief Portable interface to the CPU cycle counter
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*
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* Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* This file is part of mbed TLS (https://tls.mbed.org)
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*/
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#ifndef MBEDTLS_TIMING_ALT_H
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#define MBEDTLS_TIMING_ALT_H
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#if !defined(MBEDTLS_CONFIG_FILE)
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#include "mbedtls/config.h"
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#else
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#include MBEDTLS_CONFIG_FILE
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#endif
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#if defined(MBEDTLS_TIMING_ALT)
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/* Iotelic timing implementation */
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#include "encoding.h"
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* \brief timer structure
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*/
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struct mbedtls_timing_hr_time
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{
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unsigned char opaque[32];
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};
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/**
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* \brief Context for mbedtls_timing_set/get_delay()
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*/
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typedef struct
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{
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struct mbedtls_timing_hr_time timer;
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uint32_t int_ms;
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uint32_t fin_ms;
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} mbedtls_timing_delay_context;
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extern volatile int mbedtls_timing_alarmed;
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/**
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* \brief Return the elapsed time in milliseconds
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*
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* \param val points to a timer structure
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* \param reset if set to 1, the timer is restarted
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*/
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unsigned long mbedtls_timing_get_timer( struct mbedtls_timing_hr_time *val, int reset );
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/**
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* \brief Setup an alarm clock
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*
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* \param seconds delay before the "mbedtls_timing_alarmed" flag is set
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*
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* \warning Only one alarm at a time is supported. In a threaded
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* context, this means one for the whole process, not one per
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* thread.
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*/
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void mbedtls_set_alarm( int seconds );
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/**
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* \brief Set a pair of delays to watch
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* (See \c mbedtls_timing_get_delay().)
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*
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* \param data Pointer to timing data
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* Must point to a valid \c mbedtls_timing_delay_context struct.
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* \param int_ms First (intermediate) delay in milliseconds.
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* \param fin_ms Second (final) delay in milliseconds.
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* Pass 0 to cancel the current delay.
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*/
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void mbedtls_timing_set_delay( void *data, uint32_t int_ms, uint32_t fin_ms );
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/**
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* \brief Get the status of delays
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* (Memory helper: number of delays passed.)
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*
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* \param data Pointer to timing data
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* Must point to a valid \c mbedtls_timing_delay_context struct.
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*
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* \return -1 if cancelled (fin_ms = 0)
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* 0 if none of the delays are passed,
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* 1 if only the intermediate delay is passed,
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* 2 if the final delay is passed.
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*/
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int mbedtls_timing_get_delay( void *data );
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// The mcycle counter is 64-bit counter, but since
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// Freedom E platforms use RV32, we must access it as
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// 2 32-bit registers. At 256MHz, the lower bits will
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// roll over approx. every 5 seconds, so we check for
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// rollover with this routine as suggested by the
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// RISC-V Priviledged Architecture Specification.
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#define rdmcycle(x) { \
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uint32_t lo, hi, hi2; \
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__asm__ __volatile__ ("1:\n\t" \
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"csrr %0, mcycleh\n\t" \
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"csrr %1, mcycle\n\t" \
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"csrr %2, mcycleh\n\t" \
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"bne %0, %2, 1b\n\t" \
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: "=r" (hi), "=r" (lo), "=r" (hi2)) ; \
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*(x) = lo | ((uint64_t) hi << 32); \
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}
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/**
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* \brief Return the CPU cycle counter value
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*
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*/
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static inline unsigned long mbedtls_timing_hardclock( void )
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{
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uint64_t mcycle;
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rdmcycle(&mcycle);
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return mcycle;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* MBEDTLS_TIMING_ALT */
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#endif /* MBEDTLS_TIMING_ALT_H */
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