105 lines
		
	
	
		
			2.9 KiB
		
	
	
	
		
			C
		
	
	
		
			Executable File
		
	
	
	
	
			
		
		
	
	
			105 lines
		
	
	
		
			2.9 KiB
		
	
	
	
		
			C
		
	
	
		
			Executable File
		
	
	
	
	
| /****************************************************************************
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| 
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| Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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| 
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| This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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| be copied by any method or incorporated into another program without
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| the express written consent of Aerospace C.Power. This Information or any portion
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| thereof remains the property of Aerospace C.Power. The Information contained herein
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| is believed to be accurate and Aerospace C.Power assumes no responsibility or
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| liability for its use in any way and conveys no license or title under
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| any patent or copyright and makes no representation or warranty that this
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| Information is free from patent or copyright infringement.
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| 
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| ****************************************************************************/
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| 
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| #ifndef __PHY_ISR_H
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| #define __PHY_ISR_H
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| 
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| /* os shim includes */
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| #include "os_types.h"
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| 
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| /* driver includes */
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| #include "iot_irq.h"
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| #include "os_timer_api.h"
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| 
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| #ifdef __cplusplus
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| extern "C" {
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| #endif
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| 
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| #define IRQ_NUM_PHY_LIC_OVR_STRESS      HAL_VECTOR_PHY_1
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| 
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| /* phy interrupt map */
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| #define PHY_TX_FD_TX_DONE               (0x1 << 0)      //bit 0
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| #define PHY_FD_TX_ABORT                 (0x1 << 1)      //bit 1
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| #define PHY_FD_TX_STUCK                 (0x1 << 2)      //bit 2
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| #define PHY_TX_TD_START                 (0x1 << 3)      //bit 3
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| #define PHY_TX_FD_INSERT_PREAM_DONE     (0x1 << 6)      //bit 6
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| #define PHY_LIC_OVR_STRESS              (0x1 << 9)      //bit 9
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| #define PHY_RECV_FD_FC_OK               (0x1 << 17)     //bit 17
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| #define PHY_RECV_FD_FC_FAIL             (0x1 << 18)     //bit 18
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| #define PHY_RECV_FD_PLD_OK              (0x1 << 21)     //bit 21
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| #define PHY_RECV_FD_PLD_FAIL            (0x1 << 22)     //bit 22
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| 
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| #define INTR_TYPE_PHY_FD_FC_OK          (0x1 << 0)
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| #define INTR_TYPE_PHY_FD_FC_FAIL        (0x1 << 1)
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| #define INTR_TYPE_PHY_TX_FD_TX_DONE     (0x1 << 2)
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| #define INTR_TYPE_PHY_LIC_OVR_STRESS    (0x1 << 5)
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| 
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| #if MAC_TIMESTAMPING || ENA_CCO_RX_THR_PHASE_CHANGE
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| #define INTR_TYPE_PHY_FD_PLD_OK         (0x1 << 3)
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| #define INTR_TYPE_PHY_FD_PLD_FAIL       (0x1 << 4)
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| #endif
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| 
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| #define INTR_TYPE_PHY_FD_TX_ABORT       (0x1 << 6)
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| #define INTR_TYPE_PHY_TX_TD_START       (0x1 << 7)
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| #define INTR_TYPE_PHY_FD_TX_STUCK       (0x1 << 8)
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| #define INTR_TYPE_PHY_INSERT_PREAM_DONE (0x1 << 9)
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| 
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| /**
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| * @brief phy_overstress_is_on
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| *   get the overstress status
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| *
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| * @param        [none]
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| *
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| * @return       [true or false]
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| */
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| bool_t phy_overstress_is_on(void);
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| 
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| /**
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| * @brief phy_overstress_power_up
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| *    increase tx power with full level.
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| *
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| * @param void   [void]
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| *
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| * @return       [none]
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| */
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| void phy_overstress_power_up();
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| 
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| /**
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|  * @brief phy_isr_init() -init phy isr.
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|  */
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| void phy_isr_init();
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| 
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| /**
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|  * @brief phy_isr_start() -start phy isr.
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|  */
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| void phy_isr_start();
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| 
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| /**
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| * @brief phy_isr_start_cpu1() - enable and start cpu1 phy interrupt
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| *
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| * @param        none
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| *
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| * @return       none
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| */
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| void phy_isr_start_cpu1(void);
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| 
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| 
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| #ifdef __cplusplus
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| }
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| #endif
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| 
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| #endif
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| 
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