393 lines
		
	
	
		
			16 KiB
		
	
	
	
		
			C
		
	
	
		
			Executable File
		
	
	
	
	
			
		
		
	
	
			393 lines
		
	
	
		
			16 KiB
		
	
	
	
		
			C
		
	
	
		
			Executable File
		
	
	
	
	
| /****************************************************************************
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| 
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| Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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| 
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| This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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| be copied by any method or incorporated into another program without
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| the express written consent of Aerospace C.Power. This Information or any portion
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| thereof remains the property of Aerospace C.Power. The Information contained herein
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| is believed to be accurate and Aerospace C.Power assumes no responsibility or
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| liability for its use in any way and conveys no license or title under
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| any patent or copyright and makes no representation or warranty that this
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| Information is free from patent or copyright infringement.
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| 
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| ****************************************************************************/
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| 
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| #ifndef PLC_CONST_H
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| #define PLC_CONST_H
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| 
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| #include "plc_utils.h"
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| #include "plc_cert_test.h"
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| #include "plc_conn_less.h"
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| #include "plc_mac_header.h"
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| #include "plc_mac_cfg.h"
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| #include "plc_beacon.h"
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| #include "plc_fr.h"
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| #include "hw_war.h"
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| 
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| #ifdef __cplusplus
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| extern "C" {
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| #endif
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| /*
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|  * max logic network number on a single node
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|  * shared by SG, SPG(NW), and GP
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|  * usually used by security setting
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|  * NOTE: must be <= MAX_AVLN_HW_NUM, it's 8 for kunlun
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|  */
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| #define MAX_AVLN_NUM            (1)
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| 
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| /* max logic key table number for an avln
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|  * NOTE: must be <= MAX_KEY_TABLE_HW_NUM, it's 4 for kunlun
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|  */
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| #define MAX_KEY_TABLE_NUM       (2)
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| 
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| /* max logic key number for a key table
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|  * NOTE: must be <= MAX_KEY_ENTRY_HW_NUM, it's 32 for kunlun
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|  */
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| #define MAX_KEY_ENTRY_NUM       (4)
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| 
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| #define MAC_QUE_NUM             (24)
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| 
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| /* ieee1901 */
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| #define MAC_HDR_LEN_NO_VAR_I1901    (sizeof(i1901_mac_header_t))
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| #define MAC_HDR_LEN_WITH_VAR_I1901  (sizeof(i1901_mac_header_t) \
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|     + sizeof(i1901_mac_header_var_t))
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| #define MAC_HDR_LEN_WITH_VAR_ADDR_I1901  (MAC_HDR_LEN_WITH_VAR_I1901 \
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|     + IOT_MAC_ADDR_LEN * 2)
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| 
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| /* smart grid */
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| #define MAC_HDR_LEN_WITH_ADDR   (sizeof(mac_header_t) + IOT_MAC_ADDR_LEN * 2)
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| #define MAC_HDR_LEN_NO_ADDR     (sizeof(mac_header_t))
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| #define MAC_HDR_LEN_SHORT       (sizeof(mac_short_header_t))
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| #define FC_LEN                  (sizeof(frame_control_t))
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| 
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| /* MAC layer required reserved len when sending data through mac_send_msdu_ex */
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| #define MAC_REQ_HEAD_RSVD_LEN   (FC_LEN + 16)
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| #define MAC_REQ_TAIL_RSVD_LEN   (4)
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| #define MME_HEAD_RESERVE_LEN    (MAC_REQ_HEAD_RSVD_LEN)
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| #define MME_TAIL_RESERVE_LEN    (MAC_REQ_TAIL_RSVD_LEN)
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| #define APP_HEAD_RESERVE_LEN    (MAC_REQ_HEAD_RSVD_LEN + MAC_HDR_LEN_WITH_ADDR)
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| #define APP_TAIL_RESERVE_LEN    (MAC_REQ_TAIL_RSVD_LEN)
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| #define APP_HEAD_CONN_LESS_RESERVE_LEN   \
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|     (APP_HEAD_RESERVE_LEN + sizeof(cert_test_t) + sizeof(plc_conn_less_hdr_t))
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| #define APP_HEAD_SILA_NHM_RESERVE_LEN    \
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|     (APP_HEAD_RESERVE_LEN + sizeof(nhm_header_t))
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| 
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| /* southern power grid */
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| #define MAC_LONG_HDR_LEN_SPG      \
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|     (sizeof(spg_mac_header_t) + sizeof(spg_mac_lheader_tail_t))
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| #define MAC_SHORT_HDR_LEN_SPG     (sizeof(spg_mac_header_t))
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| #define MAC_SINGLE_HOP_HDR_LEN_SPG (sizeof(spg_mac_short_header_t))
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| #define MSDU_LONG_HDR_LEN_SPG     (sizeof(spg_msdu_lfrm_t))
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| #define MSDU_SHORT_HDR_LEN_SPG    (sizeof(spg_msdu_sfrm_t))
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| #define FC_LEN_SPG                (sizeof(spg_frame_control_t))
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| 
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| #define MAC_REQ_HEAD_RSVD_LEN_SPG (FC_LEN_SPG + 16)
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| #define MAC_REQ_TAIL_RSVD_LEN_SPG (4)
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| #define MME_HEAD_RESERVE_LEN_SPG  (MAC_REQ_HEAD_RSVD_LEN_SPG)
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| #define MME_TAIL_RESERVE_LEN_SPG  (MAC_REQ_TAIL_RSVD_LEN_SPG)
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| #define APP_HEAD_RESERVE_LEN_SPG  \
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|     (MAC_REQ_HEAD_RSVD_LEN_SPG + MAC_LONG_HDR_LEN_SPG + MSDU_LONG_HDR_LEN_SPG \
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|     + 16)
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| #define APP_TAIL_RESERVE_LEN_SPG  (MAC_REQ_TAIL_RSVD_LEN_SPG)
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| #define APP_HEAD_CONN_LESS_RESERVE_LEN_SPG   \
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|     (APP_HEAD_RESERVE_LEN_SPG + sizeof(spg_cert_test_hdr_t) + \
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|     sizeof(plc_conn_less_hdr_t))
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| 
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| /* 1901 */
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| #define FC_LEN_1901               FC_LEN
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| 
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| #define PLC_PDEV_ID                     0           // PLC default pDEV id
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| 
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| #define RF_PDEV_ID                      0           // rf default PDEV id
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| 
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| #define PLC_DEFAULT_VDEV                0
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| #define PLC_INV_DBG_PKT_MODE_VDEV_ID    0xFF
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| 
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| #define PLC_MAX_PB_PER_MPDU     4
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| 
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| /* give smallest number, which is -128 */
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| #define INVALID_SNR             (-128)
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| /* give smallest number, which is -128 */
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| #define INVALID_RSSI            (-128)
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| /* give largest number, which is 127 */
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| #define MAX_SNR                 (127)
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| /* highest available snr */
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| #define SNR_HIGHEST             (90)
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| /* lowest available snr */
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| #define SNR_LOWEST              (-10)
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| /* update snr max threshold value */
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| #define MAX_FD_SNR              (20)
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| /* update snr min threshold value */
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| #define MIN_FD_SNR              (-10)
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| /* update rf snr max threshold value */
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| #define RF_MAX_FD_SNR           (63)
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| /* update rf snr max threshold value */
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| #define RF_MIN_FD_SNR           (0)
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| /* give smallest rf snr number, which is 0 */
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| #define RF_INVALID_SNR          (INVALID_SNR)
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| /* rf highest snr value in protocal */
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| #define RF_SNR_HIGHEST          (90)
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| /* rf lowest snr value in protocal */
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| #define RF_SNR_LOWEST           (-10)
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| /* highest available rssi */
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| #define RF_RSSI_HIGHEST         (-10)
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| /* lowest available rssi */
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| #define RF_RSSI_LOWEST          (-110)
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| /* define rf tx power max value for smart power grid */
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| #define RF_TX_PWR_MAX_DBM_NSG       (20)
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| /* define rf tx power min value for smart power grid */
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| #define RF_TX_PWR_MIN_DBM_NSG       (-35)
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| /* define rf tx power default value for smart power grid */
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| #define RF_TX_PWR_DEF_DBM_NSG       (10)
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| /* define rf tx full power value for smart power grid */
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| #define RF_TX_FULL_PWR_DBM_NSG      (15)
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| /* define rf tx power max value for overseas power grid */
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| #define RF_TX_PWR_MAX_DBM_OVERSEAS  (8)
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| /* define rf tx power min value for overseas power grid */
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| #define RF_TX_PWR_MIN_DBM_OVERSEAS  (-35)
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| /* define rf tx power default value for overseas power grid */
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| #define RF_TX_PWR_DEF_DBM_OVERSEAS  (8)
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| /* define rf tx full power value for overseas power grid */
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| #define RF_TX_FULL_PWR_DBM_OVERSEAS (8)
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| /* define rf loopback tx power value */
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| #define RF_TX_LOOPBACK_PWR_DBM  (5)
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| /* define rf tx power invalid value */
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| #define RF_TX_PWR_INVALID       (-128)
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| 
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| /* war for qianjing sack snr alway queal 100 */
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| #define WAR_QJWY_SNR_INPUT      (100)
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| #define WAR_QJWY_SNR_OUTPUT     (0)
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| 
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| /* calculate ppm parameter. 1 << 20 meanse 1million */
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| #define PPM_CALC_MILLION_SHIFT  (20)
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| 
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| /* max ppm supported, if in this range, we try to re-cal */
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| #define PLC_MAX_PPM_SUPPORT     (250)
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| /* ntb ppm shift bit, ntb_ppm_accuracy = 1/(1 << 6) ppm */
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| #define PLC_NTB_PPM_SHIFT       (6)
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| /* register ppm shift bit, reg_ppm_accuracy = 1/(1 << 4) ppm */
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| #define PLC_REG_PPM_SHIFT       (4)
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| /* max mac ntb supported */
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| #define PLC_MAX_MAC_NTB_PPM     \
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|     ((PLC_MAX_PPM_SUPPORT) << (PLC_NTB_PPM_SHIFT))
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| /* the max ppm for sync ntb beacon */
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| #define PLC_SYNC_NTB_MAX_PPM    (50 << PLC_NTB_PPM_SHIFT)
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| /* the max ppm for rf sync ntb beacon */
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| #define RF_SYNC_NTB_MAX_PPM     (50 << PLC_NTB_PPM_SHIFT)
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| 
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| /* hw ppm available snr */
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| #define PLC_HW_PPM_AVL_SNR      (20)
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| 
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| #if (HW_PLATFORM != HW_PLATFORM_SIMU)
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| /* KPI for Performance */
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| #if PLC_SUPPORT_CCO_ROLE
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| #if (IOT_FLASH_BUILD)
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| #if RUN_IN_PSRAM
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| #if (IOT_PSRAM_SIZE >= 4)
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| #define PCO_PERFORMANCE_MBPS    (6)     // x1 Mbps
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| #define PLC_LONG_BUF_MIN_NUM    (50)    /* 2k buffer minimal requirement */
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| #define PLC_LARGE_BUF_MIN_NUM   (140)   /* 1k buffer minimal requirement */
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| #define PLC_BCSMA_TOKEN_NUM     (6)     /* number of bound CSMA tokens */
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| #define PLC_TDMA_TOKEN_NUM      (1)     /* number of bound TDMA tokens */
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| #else /* (IOT_PSRAM_SIZE >= 4) */
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| #define PCO_PERFORMANCE_MBPS    (6)     // x1 Mbps
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| #define PLC_LONG_BUF_MIN_NUM    (30)    /* 2k buffer minimal requirement */
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| #define PLC_LARGE_BUF_MIN_NUM   (100)   /* 1k buffer minimal requirement */
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| #define PLC_BCSMA_TOKEN_NUM     (6)     /* number of bound CSMA tokens */
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| #define PLC_TDMA_TOKEN_NUM      (1)     /* number of bound TDMA tokens */
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| #endif /* (IOT_PSRAM_SIZE >= 4) */
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| #else /* RUN_IN_PSRAM */
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| #define PCO_PERFORMANCE_MBPS    (1)     // x1 Mbps
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| #define PLC_LONG_BUF_MIN_NUM    (5)     /* 2k buffer minimal requirement */
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| #define PLC_LARGE_BUF_MIN_NUM   (10)    /* 1k buffer minimal requirement */
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| #define PLC_BCSMA_TOKEN_NUM     (1)     /* number of bound CSMA tokens */
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| #define PLC_TDMA_TOKEN_NUM      (1)     /* number of bound TDMA tokens */
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| #endif /* RUN_IN_PSRAM */
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| #else
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| /* PSRAM build don't have so much RAM */
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| #define PCO_PERFORMANCE_MBPS    (1)     // x1 Mbps
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| #define PLC_LONG_BUF_MIN_NUM    (5)     /* 2k buffer minimal requirement */
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| #define PLC_LARGE_BUF_MIN_NUM   (5)     /* 1k buffer minimal requirement */
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| #define PLC_BCSMA_TOKEN_NUM     (1)     /* number of bound CSMA tokens */
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| #define PLC_TDMA_TOKEN_NUM      (1)     /* number of bound TDMA tokens */
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| #endif
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| #elif ((IOT_STA_CONTROL_MODE == IOT_STA_CONTROL_TYPE_STA) || \
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|         (IOT_STA_CONTROL_MODE == IOT_STA_CONTROL_TYPE_METER) || \
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|         (IOT_STA_CONTROL_MODE == IOT_STA_CONTROL_TYPE_PPM_DETECT) || \
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|         IOT_DEV_TEST_CCO_MODE)
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| #if RUN_IN_PSRAM
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| #define PCO_PERFORMANCE_MBPS    (6)     // x6 Mbps
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| #define PLC_LONG_BUF_MIN_NUM    (50)    /* 2k buffer minimal requirement */
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| #define PLC_LARGE_BUF_MIN_NUM   (100)   /* 1k buffer minimal requirement */
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| #define PLC_BCSMA_TOKEN_NUM     (6)     /* nmber of bound CSMA tokens */
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| #define PLC_TDMA_TOKEN_NUM      (1)     /* number of bound TDMA tokens */
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| #else
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| #define PCO_PERFORMANCE_MBPS    (5/4)   // x1.25 Mbps
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| #define PLC_LONG_BUF_MIN_NUM    (6)     /* 2k buffer minimal requirement */
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| #define PLC_LARGE_BUF_MIN_NUM   (21)    /* 1k buffer minimal requirement */
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| #define PLC_BCSMA_TOKEN_NUM     (4)     /* number of bound CSMA tokens */
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| #define PLC_TDMA_TOKEN_NUM      (1)     /* number of bound TDMA tokens */
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| #endif
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| #else
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| #if RUN_IN_PSRAM
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| #define PCO_PERFORMANCE_MBPS    (6)      // x6 Mbps
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| #define PLC_LONG_BUF_MIN_NUM    (50)     /* 2k buffer minimal requirement */
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| #define PLC_LARGE_BUF_MIN_NUM   (100)    /* 1k buffer minimal requirement */
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| #define PLC_BCSMA_TOKEN_NUM     (20)     /* number of bound CSMA tokens */
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| #define PLC_TDMA_TOKEN_NUM      (1)     /* number of bound TDMA tokens */
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| #else
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| #define PCO_PERFORMANCE_MBPS    (1)     // x1 Mbps
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| #define PLC_LONG_BUF_MIN_NUM    (6)     /* 2k buffer minimal requirement */
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| #define PLC_LARGE_BUF_MIN_NUM   (20)    /* 1k buffer minimal requirement */
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| #define PLC_BCSMA_TOKEN_NUM     (1)     /* number of bound CSMA tokens */
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| #define PLC_TDMA_TOKEN_NUM      (1)     /* number of bound TDMA tokens */
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| #endif
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| #endif
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| #else /* HW_PLATFORM != HW_PLATFORM_SIMU */
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| #define PCO_PERFORMANCE_MBPS    (6)     // x6 Mbps
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| #define PLC_BCSMA_TOKEN_NUM     (20)    /* number of bound CSMA tokens */
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| #define PLC_TDMA_TOKEN_NUM      (1)     /* number of bound TDMA tokens */
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| #if PLC_SUPPORT_CCO_ROLE
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| #define PLC_LONG_BUF_MIN_NUM    (110)   /* 2k buffer minimal requirement */
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| #define PLC_LARGE_BUF_MIN_NUM   (215)   /* 1k buffer minimal requirement */
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| #else /* PLC_SUPPORT_CCO_ROLE */
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| #define PLC_LONG_BUF_MIN_NUM    (6)     /* 2k buffer minimal requirement */
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| #define PLC_LARGE_BUF_MIN_NUM   (30)    /* 1k buffer minimal requirement */
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| #endif /* PLC_SUPPORT_STA_ROLE */
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| #endif /* HW_PLATFORM == HW_PLATFORM_SIMU */
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| 
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| /* max buf required under KPI */
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| #define PCO_RX_DATA_BUF_KB      ((64 * PCO_PERFORMANCE_MBPS) << 10)
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| 
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| #if HPLC_RF_DEV_SUPPORT
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| #if (PLC_NETWORK_SCALE > 1015)
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| /* 3K : reserved for rf discovery node list mme generation */
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| #define PLC_HUGE_BUF_SIZE       (3000)
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| #define PLC_HUGE_BUF_COUNT      (2)
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| #elif (PLC_NETWORK_SCALE > 256)
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| /* 2K : reserved for rf discovery node list mme generation */
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| #define PLC_HUGE_BUF_SIZE       (PLC_LONG_BUF_SIZE)
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| #define PLC_HUGE_BUF_COUNT      (0)
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| #else
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| /* 1K : reserved for rf discovery node list mme generation */
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| #define PLC_HUGE_BUF_SIZE       (PLC_LARGE_BUF_SIZE)
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| #define PLC_HUGE_BUF_COUNT      (0)
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| #endif
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| #else /* HPLC_RF_DEV_SUPPORT */
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| #if (PLC_NETWORK_SCALE > 1015)
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| /* 3K : reserved for discovery node list mme generation */
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| #define PLC_HUGE_BUF_SIZE       (3000)
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| #define PLC_HUGE_BUF_COUNT      (1)
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| #elif (PLC_NETWORK_SCALE > 256)
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| #define PLC_HUGE_BUF_SIZE       (PLC_LONG_BUF_SIZE)
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| #define PLC_HUGE_BUF_COUNT      (0)
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| #else
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| #define PLC_HUGE_BUF_SIZE       (PLC_SHORT_BUF_SIZE)
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| #define PLC_HUGE_BUF_COUNT      (0)
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| #endif
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| #endif /* HPLC_RF_DEV_SUPPORT */
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| 
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| /* 2K : 1/16 at least 2 */
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| #define PLC_LONG_BUF_SIZE       (PLC_HW_RX_BUF_SIZE)
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| #define PLC_LONG_BUF_COUNT      ((PCO_RX_DATA_BUF_KB/PLC_LONG_BUF_SIZE / 16) \
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|                                     < PLC_LONG_BUF_MIN_NUM ? \
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|                                     PLC_LONG_BUF_MIN_NUM : \
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|                                     (PCO_RX_DATA_BUF_KB/PLC_LONG_BUF_SIZE / 16))
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| #define PLC_LONG_RX_BUF_COUNT   (PLC_LONG_BUF_COUNT / 2)
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| #define PLC_LONG_TX_BUF_COUNT   (PLC_LONG_BUF_COUNT - PLC_LONG_RX_BUF_COUNT)
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| 
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| /* 1K : 1/16 */
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| #define PLC_LARGE_BUF_SIZE      (PLC_HW_RX_BUF_SIZE / 2)
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| #define PLC_LARGE_BUF_COUNT \
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|     ((PCO_RX_DATA_BUF_KB/PLC_LARGE_BUF_SIZE / 16) < PLC_LARGE_BUF_MIN_NUM ? \
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|     PLC_LARGE_BUF_MIN_NUM : (PCO_RX_DATA_BUF_KB/PLC_LARGE_BUF_SIZE / 16))
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| #define PLC_LARGE_RX_BUF_COUNT  (PLC_LARGE_BUF_COUNT / 2)
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| #define PLC_LARGE_TX_BUF_COUNT  (PLC_LARGE_BUF_COUNT - PLC_LARGE_RX_BUF_COUNT)
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| 
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| /* 136 : 3/8, in rx ring */
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| #define PLC_SMALL_BUF_SIZE      (PLC_RX_BUF_RESV_SIZE + 136 + MAC_HW_WAR_RESV_BYTES)
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| 
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| #if (PLC_SUPPORT_STA_ROLE && (TARGET_VERSION == TARGET_KUNLUN))
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| 
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| #define PLC_SMALL_BUF_COUNT     ((PCO_RX_DATA_BUF_KB/PLC_SMALL_BUF_SIZE / 8 * 3) \
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|     - 10)
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| 
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| #else /* PLC_SUPPORT_STA_ROLE && (TARGET_VERSION == TARGET_KUNLUN) */
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| 
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| #define PLC_SMALL_BUF_COUNT     ((PCO_RX_DATA_BUF_KB/PLC_SMALL_BUF_SIZE / 8 * 3))
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| 
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| #endif /* PLC_SUPPORT_STA_ROLE && (TARGET_VERSION == TARGET_KUNLUN) */
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| 
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| #define PLC_SMALL_RX_BUF_COUNT  (PLC_SMALL_BUF_COUNT / 2)
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| #define PLC_SMALL_TX_BUF_COUNT  (PLC_SMALL_BUF_COUNT - PLC_SMALL_RX_BUF_COUNT)
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| 
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| /* 520 : 4/8, in rx ring */
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| /* the rest alloc to 520's buffer size */
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| #define PLC_SHORT_BUF_SIZE      (PLC_RX_BUF_RESV_SIZE + 520 \
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|             + MAC_HW_WAR_RESV_BYTES + MAC_HW_WAR_SPG_RESV_SHORT_BYTES)
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| #define PLC_SHORT_BUF_COUNT     (PCO_RX_DATA_BUF_KB/PLC_SHORT_BUF_SIZE / 8 * 4)
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| #define PLC_SHORT_RX_BUF_COUNT  (PLC_SHORT_BUF_COUNT / 2)
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| #define PLC_SHORT_TX_BUF_COUNT  (PLC_SHORT_BUF_COUNT - PLC_SHORT_RX_BUF_COUNT)
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| 
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| #if HPLC_RF_DEV_SUPPORT
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| #if RUN_IN_PSRAM
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| #define RF_PCO_PERFORMANCE_MBPS (6)
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| #else /* RUN_IN_PSRAM */
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| #define RF_PCO_PERFORMANCE_MBPS (1)
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| #endif /* RUN_IN_PSRAM */
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| #else /* HPLC_RF_DEV_SUPPORT */
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| #define RF_PCO_PERFORMANCE_MBPS (0)
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| #endif /* HPLC_RF_DEV_SUPPORT */
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| 
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| //TODO: fix rf performance base on chip
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| #define RF_PCO_RX_DATA_BUF_KB   ((64 * RF_PCO_PERFORMANCE_MBPS) << 10)
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| 
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| /* 136: 1/2, rf in rx ring buffer */
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| #define RF_SMALL_BUF_COUNT      (RF_PCO_RX_DATA_BUF_KB / PLC_SMALL_BUF_SIZE / 2)
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| #define RF_SMALL_RX_BUF_COUNT   (RF_SMALL_BUF_COUNT / 2)
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| #define RF_SMALL_TX_BUF_COUNT   (RF_SMALL_BUF_COUNT - RF_SMALL_RX_BUF_COUNT)
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| 
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| /* 520: 1/2, rf in rx ring buffer */
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| #define RF_SHORT_BUF_COUNT      (RF_PCO_RX_DATA_BUF_KB / PLC_SHORT_BUF_SIZE / 2)
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| #define RF_SHORT_RX_BUF_COUNT   (RF_SHORT_BUF_COUNT / 2)
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| #define RF_SHORT_TX_BUF_COUNT   (RF_SHORT_BUF_COUNT - RF_SHORT_RX_BUF_COUNT)
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| 
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| #if RUN_IN_PSRAM
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| #define RF_BCSMA_TOKEN_NUM      (20)    /* number of bound CSMA tokens */
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| #define RF_TDMA_TOKEN_NUM       (1)     /* number of bound TDMA tokens */
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| #else
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| #define RF_BCSMA_TOKEN_NUM      (1)     /* number of bound CSMA tokens */
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| #define RF_TDMA_TOKEN_NUM       (1)     /* number of bound TDMA tokens */
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| #endif
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| 
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| /* AVG pkt len */
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| #define PCO_AVG_PKT_LEN_KB      (1) // 1k Byte
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| /* MAX Peer NUM support when not dropping packet under KPI */
 | |
| #define PCO_PEER_NUM_SUPPORT    \
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|     (PCO_RX_DATA_BUF_KB / PCO_AVG_PKT_LEN_KB)
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| 
 | |
| /* plc debug pkt mode parameter */
 | |
| /* debug pkt mode tx/rx nid */
 | |
| #define PLC_DBG_PKT_MODE_NID            0
 | |
| /* debug pkt mode default link id */
 | |
| #define PLC_DBG_PKT_MODE_DEF_LID        LID_CSMA_CAP3
 | |
| /* debug pkt mode default tx/rx phase */
 | |
| #define PLC_DBG_PKT_MODE_DEF_PHASE      PLC_PHASE_ALL
 | |
| /* rf rssi value */
 | |
| #define INV_RSSI_RF                     (INVALID_RSSI)
 | |
| #define MAX_RSSI_RF                     (127)
 | |
| #define MIN_RSSI_RF                     (-127)
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| 
 | |
| /* NTB tick number for each ms */
 | |
| #define NTB_TICKS_PER_MS        (25000)
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| 
 | |
| /* rf bcn slot tx reserver time, unit: 1us */
 | |
| #define RF_BCN_TX_RESERVE_US            (7 * 1000)
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| 
 | |
| #ifdef __cplusplus
 | |
| }
 | |
| #endif
 | |
| 
 | |
| #endif  // PLC_CONST_H
 |