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kunlun/plc/halphy/hw2/inc/phy_bb.h
andy c756587541 初始提交
2024-09-28 14:24:04 +08:00

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/****************************************************************************
Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
be copied by any method or incorporated into another program without
the express written consent of Aerospace C.Power. This Information or any portion
thereof remains the property of Aerospace C.Power. The Information contained herein
is believed to be accurate and Aerospace C.Power assumes no responsibility or
liability for its use in any way and conveys no license or title under
any patent or copyright and makes no representation or warranty that this
Information is free from patent or copyright infringement.
****************************************************************************/
#ifndef PHY_BB_H
#define PHY_BB_H
#include "os_types.h"
#include "hw_tonemap.h"
#include "iot_config.h"
#include "phy_status.h"
#include "mac_pm.h"
#include "plc_protocol.h"
#include "hw_war.h"
#if ENA_HW_SYNC_PPM_WAR
#include "multi_nid_sync.h"
#include "phy_multi_ppm.h"
#endif
#include "plc_const.h"
#ifdef __cplusplus
extern "C" {
#endif
#define TOTAL_TONE_MASK_NUM (2048)
#define TOTAL_TONE_MAX (2048)
#define PHY_DBG_EN (0)
#define PHY_PPM_PREF_DFT (0)
#define PHY_OVR_STRESS_PWR_DOWN_VAL (6)
#define PHY_RSSI_VALID_WAIT_MS (10)
#define HW_FULL_BAND (0)
#define HW_LOW_BAND (1)
#define HW_HIGH_BAND (2)
#define MAX_HW_BAND (3)
#define PHY_SPEC_TX_PREAM_NUM_SG (12)
#define PHY_SPEC_TX_PREAM_NUM_SPG (13)
#define PHY_SPEC_TX_PREAM_NUM_GP (10)
#define IOT_SUPPORT_AGC
//#define IOT_SUPPORT_4096FFT
//#define IOT_SUPPORT_FS_SELF_COMP
#define PHY_DET_TONE_EXT_ADD (500)
#define DEFAULT_PHY_TX_FD_TIME (41)
#define IOT_SUPPORT_RATE_SR (0)
#define IOT_SUPPORT_RATE_QR (1)
#define IOT_SUPPORT_RATE_XR (2)
#define IOT_SUPPORT_RATE_SR_QR (3)
#define IOT_SUPPORT_RATE_QR_XR (4)
#define IOT_RATE_MODE_TX IOT_SUPPORT_RATE_SR
#define IOT_RATE_MODE_RX IOT_SUPPORT_RATE_SR
#define MAC_BB_MAX_RATE (3)
#define BB_TONE_MASK_PHASE_BASEADDR (0x51880000)
#define BB_GAIN_BASEADDR (0x51881000)
#define BB_NB_GAIN_BASEADDR (0x51881180)
#define BB_CSI_BASEADDR (0x51882000)
#define BB_SNR_BASEADDR (0x51884000)
#define BB_TMAP_PTR_BASEADDR (0x51886000)
/* TODO: speed up? */
#define PPM_CAL_FROM_NTB(NTB_DIFF, NTB_PERIOD) \
(((NTB_DIFF) << (PPM_CALC_MILLION_SHIFT + PLC_NTB_PPM_SHIFT)) \
/ ((NTB_PERIOD) >> 0))
/* invalid rssi unit dbuv */
#define INV_RSSI (0xFF)
#define MAX_RSSI (140)
#define MIN_RSSI (20)
#define PHY_AGC_GAIN_ENTRY_OFFSET (24)
#define PHY_AGC_NB_GAIN_ENTRY_START (96)
#define PHY_SW_AGC_THRE (115)
/* get rssi */
#define PHY_RSSI_FROM_RMI_GAIN(adc_power,agc_tbl_entry) ( \
adc_power < PHY_SW_AGC_THRE ? \
(agc_tbl_entry >= PHY_AGC_NB_GAIN_ENTRY_START) ? \
(adc_power + PHY_AGC_GAIN_ENTRY_OFFSET + \
PHY_AGC_NB_GAIN_ENTRY_START - agc_tbl_entry) : \
(adc_power + PHY_AGC_GAIN_ENTRY_OFFSET - agc_tbl_entry) : \
INV_RSSI \
)
/* equivalent resistance 50Ω, use 107 algorithm */
#define PHY_RSSI_DBUV_TO_DBM(rssi_dbuv) (int8_t)( \
(rssi_dbuv == INV_RSSI) ? (INV_RSSI_RF) : (rssi_dbuv - 107))
#define PHY_GET_AGC_POWER(agc) (int8_t)( \
(agc >= PHY_AGC_NB_GAIN_ENTRY_START) ? \
(agc - PHY_AGC_GAIN_ENTRY_OFFSET - PHY_AGC_NB_GAIN_ENTRY_START) : \
(agc - PHY_AGC_GAIN_ENTRY_OFFSET))
/* OFFSET_OF_QR_RX_TS =((gap)*4+((N)+(cnt)*1.96)/0.04).
* to modify float-point to fixed-point operation.
* then: TS = gap*4 + N/0.04 + cnt*1.96/0.04
* = gap*4 + N*25 + cnt*(196/100)*25
* = gap*4 + N*25 + cnt*49
*/
#define OFFSET_OF_QR_RX_TS(gap, N, cnt) \
((uint64_t)(gap) * 4 + (uint64_t)(N) * 25 + (uint64_t)(cnt) * 49)
/* mac proto for fw
* 0 - PLC_PROTO_TYPE_SG (smart grid)
* 1 - PLC_PROTO_TYPE_GP (green grid)
* 2 - PLC_PROTO_TYPE_AV
* 3 - PLC_PROTO_TYPE_SPG (southern power grid)
*/
#define PHY_PROTO_TYPE_GET() phy_proto_type_get()
#define PHY_CHN_EST_GAIN_RTY_CNT (10)
typedef uint32_t (*mac_get_rx_phase_cb_t)();
typedef struct _phy_cpu_share_ctxt {
/* rx multi bandsel */
uint8_t multiband;
/* sym number fix disable */
uint8_t sym_num_fix_dis;
uint8_t sym_num_rsv1;
uint8_t sym_num_rsv2;
/* point to symppb value */
void *p_g_symppb;
uint32_t
/* current protocol type */
phy_proto : 3,
/* phase in mac reg */
reg_phase : 2,
/* current band */
band_id : 8,
/*rx phase force enable/disable*/
rx_phase_force_en : 1,
/*rx force phase num*/
rx_phase_force : 2,
/* product test mode entry */
pt_mode_entry : 1,
/* shift low level */
shift_low : 2,
/* shift high level */
shift_high : 2,
/* rf channel */
rf_channel : 8,
g_mt_mode_sel : 4,
resv0 : 1;
/* nf with 192 point */
uint32_t nf_192p : 8,
/* nf with 384 point */
nf_384p : 8,
/* nf with 768 point */
nf_768p : 8,
/* nf with 1536 point */
nf_1536p : 8;
/* nf with 3072 point */
uint32_t nf_3072p : 8,
/* nf with 6144 point */
nf_6144p : 8,
/* tx pwr ctl enable */
tx_pwr_ctl_ena : 1,
/* spur and pulse mix mode */
high_perf_en : 1,
spur_exist : 1,
shift_dis : 1,
/* nf for bbai */
nf_for_bbai : 8,
/* rf option */
rf_option : 2,
resv1 : 2;
/* init ppm(sw control, sw add/decrease), unit: (1 / 16) * ppm */
int16_t phy_ppm_init;
/* if spike exist, the spike value */
uint32_t spike_value : 8,
/* sw detect spike exist or not */
spike_exist : 1,
/* support tx/rx phase switch function */
trx_phase_switch_en : 1,
/* record tx/rx switch phase, see PLC_PHASE_xx */
trx_switch_phase : 2,
resv3 : 20;
/*rx phase callback*/
mac_get_rx_phase_cb_t rx_phase_cb;
#if ENA_WAR_244
uint32_t need_record_tei : 1,
need_record_sof : 1,
revs : 14,
sof_src_tei : 16;
uint32_t sack_miss_cnt;
uint32_t sack_err_occur_cnt;
#endif
#if MAC_WAR_244_TIMESTAMPING
uint32_t _2_tx_fd_ts;
uint32_t _2_tx_td_st_ts;
uint32_t _1_rx_fd_fc_ts;
uint32_t _3_rx_fc_ok_ts;
uint32_t _3_rx_fc_fail_ts;
#endif
#if ENA_WAR_440
uint32_t bcn_start_update_ntb;
uint32_t tx_underflow_cnt;
#endif
#if DEBUG_CANNOT_SENDOUT_PKT
uint32_t tx_fc[4];
uint32_t isr_cnt0;
uint32_t isr_cnt1;
#endif
uint32_t phy_tx_abort_cnt;
/* power manager bitmap */
pm_status_t pm_status;
#if ENA_HW_SYNC_PPM_WAR
phy_ppm_status_ctxt_t ppm_status;
#endif
uint32_t timeout_tx_abort_flag : 1,
timeout_tx_abort_cnt : 31;
#if DEBUG_NID_ERR
uint32_t nid_err_cnt : 8,
cur_nid : 24;
uint32_t config_nid : 24,
rsv2 : 8;
#endif
/* phy receive pld ok or fail interrupt */
uint32_t phy_pld_int_ntb;
/* debug phy tx */
uint32_t tx_td_start_status;
uint32_t tx_td_start_cnt;
uint32_t tx_td_fc_done_cnt;
uint32_t tx_fd_stuck_cnt;
} phy_cpu_share_ctxt_t;
typedef struct _iot_phy_plat_dep_ctxt {
/* phy statistics */
phy_status_t phy_status;
#if DEG_TX_ABORT
uint32_t tx_abort_cnt;
uint32_t phy_dbg_bus_lock_value;
uint32_t phy_tx_int_raw;
uint32_t mac_reg_30;
uint32_t dbg_sts_0;
uint32_t dbg_sts_1;
uint32_t dbg_sts_2;
uint32_t dbg_sts_3;
uint32_t dbg_sts_4;
uint32_t dbg_sts_5;
uint32_t dbg_sts_6;
uint32_t dbg_sts_7;
/* TODO: move to mac */
uint32_t mac_tx_data_0;
uint32_t mac_tx_data_1;
uint32_t mac_tx_data_2;
uint32_t mac_tx_data_3;
uint32_t mac_tx_data_4;
uint32_t mac_tx_data_5;
uint32_t timestap;
uint32_t cur_ptr_lat;
uint32_t tx_fc0;
uint32_t tx_fc1;
uint32_t tx_fc2;
uint32_t tx_fc3;
uint32_t pb_sumnum;
#endif
/* nf timer */
uint32_t phy_snr_cal_timer;
/* up or down power in work */
uint32_t power_limit_db : 8,
/* set power by sw */
sw_set_pwr : 8,
/* is the new settings */
is_valid_power : 1,
/* current nf */
nf : 8,
/* rx phase force en */
rx_phase_force_en : 1,
/* rx force phase */
rx_phase_force : 2,
/*rx phase*/
reg_phase : 2,
/* flag for big nf (>90) */
big_nf_handle : 1,
/* cal nf fast flag */
cal_nf_fast_flag : 1;
/* bandwidth 5.6M cap setting */
uint32_t band_5p6m_cap_set : 16,
/* bandwidth 8M cap setting */
band_8m_cap_set : 16;
/* bandwidth 12M cap setting */
uint32_t band_12m_cap_set : 16,
/* bandwidth 15M cap setting */
band_15m_cap_set : 16;
/* bandwidth 20M cap setting */
uint16_t band_20m_cap_set;
/* expect ppm */
uint16_t phy_ppm_pref;
/* init ppm(sw control, sw add/decrease), unit: (1 / 16) * ppm */
int16_t phy_ppm_init;
/* save init ppm get form oem, unit: ppm */
int16_t phy_cal_ppm_in_oem;
} iot_phy_plat_dep_ctxt_t;
typedef enum {
PHY_RST_REASON_COLD,
PHY_RST_REASON_WARM,
PHY_RST_REASON_SCAN
} PHY_RST_REASON_ID;
typedef struct _iot_phy_sts_info {
uint32_t mac_tx_ok_cnt;
uint32_t mac_tx_abort_cnt;
uint32_t sync_ok_cnt;
uint32_t fc_crc_ok_cnt;
uint32_t fc_crc_fail_cnt;
uint32_t pld_crc_ok_cnt;
uint32_t pld_crc_fail_cnt;
uint32_t phy_rx_abort_cnt;
int16_t phy_tempt_celsius;
} iot_phy_sts_info_t;
typedef enum {
PHY_CAL_UNIT_1_1,
PHY_CAL_UNIT_1_2,
PHY_CAL_UNIT_1_4,
PHY_CAL_UNIT_1_8,
PHY_CAL_UNIT_1_16
} PHY_CAL_UNIT_ID;
typedef struct _agc_gain_tbl {
uint8_t reg_val;
int8_t rx_gain;
} agc_gain_tbl_t;
typedef enum {
PHY_ANF_OPT_BYPASS = 0,
PHY_ANF_OPT_ADAPT = 2,
PHY_ANF_OPT_NOTCH_OUT = 3,
PHY_ANF_OPT_RECOVERY = 4
} PHY_ANF_OPT_ID;
typedef enum {
PHY_ANF_MODE_BYPASS,
PHY_ANF_MODE_FIX,
PHY_ANF_MODE_ADAPT
} PHY_ANF_MODE_ID;
typedef enum {
PHY_FNF_OPT_BYPASS = 0,
PHY_FNF_OPT_NOTCH_OUT = 1
} PHY_FNF_OPT_ID;
typedef enum {
PHY_FNF_MODE_BYPASS,
PHY_FNF_MODE_FIX
} PHY_FNF_MODE_ID;
typedef enum {
BB_PPM_TX_ONLY,
BB_PPM_RX_ONLY,
BB_PPM_TXRX
} BB_PPM_UPDATE_METHORD;
/* cpu0 & cpu1 phy layer share data */
extern phy_cpu_share_ctxt_t g_phy_cpu_share_ctxt;
/**
*@brief register_over_stress_cb.
*
* Register callback function for temperature over stress.
* need init as soon as possible.
*
*@param cb [callback function from mac]
*@exception [none.]
*@return [none.]
*/
typedef void (*iot_plc_over_stress_cb_t)(void *param, uint8_t is_from_isr);
void register_over_stress_cb(iot_plc_over_stress_cb_t cb);
extern uint32_t PHY_PROTO_TYPE_GET();
extern uint32_t g_fw_mode;
extern agc_gain_tbl_t gain_reg_tbl[];
uint32_t phy_get_tx_pb_swcrc_cfg(void);
void phy_set_tx_pb_swcrc_cfg(uint32_t is_by_sw);
uint32_t phy_get_tx_fc_swcrc_cfg(void);
void phy_set_tx_fc_swcrc_cfg(uint32_t is_by_sw);
void phy_param_init(uint32_t mac_typ);
/* set phy bb's rx band info to reg */
void phy_rate_band_set(uint32_t rate_id, uint32_t band_id, uint32_t fc_sym, \
uint32_t start_tone, uint32_t end_tone);
/* get mac and phy statistics */
void phy_sts_get(iot_phy_sts_info_t *pkt_sts);
/* set wake to strong threshold */
void phy_wk_to_st_set(uint32_t thd);
void phy_reset(PHY_RST_REASON_ID reason);
void phy_eb(bool_t en);
void phy_gain_shift_set(uint8_t tx_dir, uint8_t t_shift, \
uint8_t rx_dir, uint8_t r_shift);
/* ppm cal */
/**
*@brief cal hw ppm.
*
*@return [ppm.]
*/
int16_t phy_ppm_cal_hw_val(PHY_CAL_UNIT_ID cal_unit, \
int16_t ppm_err, uint32_t rate_mode);
/**
*@brief set hw ppm.
*@param ppm_cal [ppm to set]
*@param update_flag [update tx/rx ppm]
*@return [none.]
*/
void phy_ppm_set(int16_t ppm_cal, uint8_t flag);
int16_t phy_txppm_get();
uint32_t phy_ppm_cal_and_update_hw(PHY_CAL_UNIT_ID cal_unit, \
int16_t ppm_err, uint32_t rate_mode, uint8_t update_flag);
int16_t phy_ppm_info_get(void);
uint32_t phy_rx_snr_gain_get(int32_t *gain, uint32_t *nf);
uint32_t phy_gain_val_get(uint8_t gain0, uint8_t gain1);
void phy_rxfd_rate0_det(uint32_t start, uint32_t end);
void phy_rxfd_rate1_det(uint32_t start, uint32_t end);
void phy_turbo_dec_inter_set(uint8_t iter_num);
void phy_freq_shift_self_comp(bool_t fd_en, bool_t td_en);
/**
*@brief set phy tx rate mode.
*
*@param en: 0 - disable, 1 - enable
*@param rate_mode: see IOT_SUPPORT_RATE_XXX. (SR/QR/XR)
*@return none
*/
void phy_tx_rate_mode_ovr_set(bool_t en, uint32_t rate_mode);
/**
*@brief get phy tx rate mode.
*
*@return see IOT_SUPPORT_RATE_XXX. (SR/QR/XR)
*/
uint8_t phy_tx_rate_mode_ovr_get(void);
/**
*@brief set phy rx rate mode.
*
*@param en: 0 - disable, 1 - enable
*@param rate_mode: see IOT_SUPPORT_RATE_XXX. (SR/QR/XR)
*@return none
*/
void phy_rx_rate_mode_ovr_set(bool_t en, uint32_t rate_mode);
void phy_vld_tone_num_set(uint32_t rate_id, uint32_t band_id, uint32_t vld_tone_num);
uint32_t phy_vld_tone_num_get(uint32_t rate_id, uint32_t band_id);
void phy_qr_common_init(void);
void phy_new_sg_en(bool_t en);
void phy_short_band_set(uint32_t fc_sym, uint32_t start_tone, uint32_t end_tone);
void phy_mix_flag_set(bool_t en);
/**
*@brief phy_pkt_time_out_disable.
*
* disable pkt time out.
*
*@param en [enable or disable.]
*@exception [none.]
*@return [none.]
*/
void phy_pkt_time_out_disable(bool_t disable);
/**
*@brief phy_pkt_time_out_set.
*
* pkt time out cnt set .
*
*@param time_out_cnt [packt time out counter.]
*@exception [none.]
*@return [none.]
*/
void phy_pkt_time_out_set(uint32_t time_out_cnt);
/**
*@brief phy_find_minus_time_out_384_set.
*
* find minus 384 time out cnt set .
*
*@param time_out_cnt [packt time out counter.]
*@exception [none.]
*@return [none.]
*/
void phy_find_minus_time_out_384_set(uint32_t time_out_cnt);
/**
*@brief phy_find_minus_time_out_3k_set.
*
* find minus 3k time out cnt set .
*
*@param time_out_cnt [packt time out counter.]
*@exception [none.]
*@return [none.]
*/
void phy_find_minus_time_out_3k_set(uint32_t time_out_cnt);
/**
*@brief phy_pkt_time_out_384_set.
*
* gp pkt time out cnt set .
*
*@param time_out_cnt [packt time out counter.]
*@exception [none.]
*@return [none.]
*/
void phy_pkt_time_out_384_set(uint32_t time_out_cnt);
/**
*@brief phy_tx_rms_set
* get current td rms value.
*@param rate_id [0/1/2.]
*@param hw_band_id [full,low,high]
*@param integer [integer part of setting rms]
*@param frac [frac part of setting rms]
*@exception [none.]
*@return [none.]
*/
void phy_tx_rms_set(uint32_t rate_id, \
uint32_t hw_band_id, uint16_t integer, uint8_t frac);
uint32_t phy_short_vld_tone_num_get(void);
void phy_short_vld_tone_num_set(uint32_t vld_tone_num);
//rawdata mode bb set pb size and turbo rate
uint32_t phy_rawdata_mode_bb_set_ps_tr(uint8_t enable, \
uint8_t pb_size, uint8_t turbo_rate);
/**
* @brief phy_rawdata_bb_set_tmi()
* set mac's rawdata mode's enablement
* @param proto: [0:SG-1:GP-3:SPG]
* @param tmi: [tmi]
* @param ext_tmi: [ext tmi]
* @return [0]
*/
uint32_t phy_rawdata_bb_set_tmi(uint32_t proto, uint8_t tmi, uint8_t ext_tmi);
void enable_sw_access_tmi_buf(uint32_t enable);
void enable_sw_access_gain_buf(uint32_t enable);
void enable_sw_access_csi_buf(uint32_t enable);
void enable_sw_access_loopback(uint32_t enable);
/**
* @brief phy_agc_gain_lvl_set
* force gain or leave auto.
* @param en: [true for enable and false for disable force]
* @param max: [max gain within 60dB to set]
* @param min: [min gain bigger than -24dB to set]
* @param ini: [initial gain]
* @return [0]
*/
void phy_agc_gain_lvl_set(bool_t en, int8_t max, int8_t min, int8_t ini);
void phy_agc_gain_adj_dis(uint32_t msk);
void phy_dfe_tone_cfg(bool_t tone_en, uint32_t tone0_num, \
uint32_t tone1_num);
void phy_dfe_tone_att_cfg(uint32_t dc_offset, uint32_t tone0_atten, \
uint32_t tone1_atten);
/**
* @brief phy_set_fix_gain_sat_adj_dis
* force gain or leave auto and set sat adj.
* @param en: [true for enable and false for disable force]
* @param max: [max gain within 60dB to set]
* @param min: [min gain bigger than -24dB to set]
* @param ini: [initial gain]
* @param sat_dis: [true or false.]
* @param adj_dis: [true or false.]
* @return [0]
*/
void phy_set_fix_gain_sat_adj_dis(bool_t en, int8_t max,
int8_t min, int8_t ini, bool_t sat_dis, bool_t adj_dis);
/**
*@brief phy_anf_option_set.
*
* Here is more APIs used to initialize phy configurations.
* Notch filter is one of the ways to fit spur scenarios.
*
*@param mode [0:bypass,1:fix,2:adaptive.]
*@param data_shift_num [data left shift bits.]
*@param anf_id [anf 1 or 2.]
*@param anf_alpha [calibrate to fit spur frequency.]
*@exception [none.]
*@return [none.]
*/
void phy_anf_option_set(PHY_ANF_MODE_ID mode, \
uint32_t data_shift_num, \
uint8_t anf_id, \
uint16_t anf_alpha);
/**
*@brief phy_anf_sel_set.
*
* set notch filter 1 sel value from 0 to 4. more narrow if value bigger.
*
*@param sel1 [anf1 sel value.]
*@exception [none.]
*@return [none.]
*/
void phy_anf_sel_set(uint8_t sel1);
/*@brief phy_anf2_sel_set.
*
* set notch filter 2 sel value from 0 to 4. more narrow if value bigger.
*
*@param sel2 [anf2 sel value.]
*@exception [none.]
*@return [none.]
*/
void phy_anf2_sel_set(uint8_t sel2);
/*@brief phy_fnf_option_set. FNF option set.
*@param mode [0:bypass,1:fix]
*@param fnf_id [fnf 1 or 2.]
*@param fnf_alpha [calibrate to fit spur frequency.]
*@exception [none.]
*@return [none.]
*/
void phy_fnf_option_set(PHY_FNF_MODE_ID mode, uint8_t fnf_id,
uint16_t fnf_alpha);
/*@brief phy_fnf_sel_set.
*
* set fnf sel value from 0 to 4. more narrow if value bigger.
*
*@param fnf_id [fnf 1 or 2.]
*@param beta [beta value. 0 - 4]
*@exception [none.]
*@return [none.]
*/
void phy_fnf_sel_set(uint8_t fnf_id, uint8_t beta);
/*@brief phy_dc_blk_alpha_step3_set.
*
* set notch filter 2 sel value from 0 to 4. more narrow if value bigger.
*
*@param step3 [dc block alpha step3 value.]
*@exception [none.]
*@return [none.]
*/
void phy_dc_blk_alpha_step3_set(uint8_t step3);
/**
*@brief phy_anf_top_option_set.
*
* set notch filter top option value.
*
*@param option_val [option value.]
*@exception [none.]
*@return [none.]
*/
void phy_anf_top_option_set(uint8_t option_val);
/**
*@brief phy_gain_table_ovr_set.
*
* force gain table normal or ext table.
*
*@param en [enable or disable.]
*@param tbl [0:default 1:extenal table]
*@exception [none.]
*@return [none.]
*/
void phy_gain_table_ovr_set(bool_t en, uint8_t tbl);
/**
*@brief phy_txrx_ovr_set.
*
* force dfe to fixed state like idle/tx/rx etc.
*
*@param en [enable txrx over mode.]
*@param mode [config the fixed mode such as 0:idle,1:rx,2:tx.]
*@exception [none.]
*@return [none.]
*/
void phy_txrx_ovr_set(bool_t en, uint32_t mode);
/**
*@brief phy_dac_data_ovr_set.
*
* force DAC to fixed state, and set dac data with 10 bits.
* pgacomp will change to 1 form 0 or 0 form 1 if dac data
* fit dc offset.
*
*@param en [enable dac over mode.]
*@param data [dac data configed by software]
*@exception [none.]
*@return [none.]
*/
void phy_dac_data_ovr_set(bool_t en, uint32_t data);
/**
*@brief phy_dfe_dc_comp_set.
*
* dc offset comp
*
*@param gain_idx [gain index as 0/1/2/3.]
*@param dac_comp [comp value]
*@exception [none.]
*@return [none.]
*/
void phy_dfe_dc_comp_set(uint8_t gain_idx, uint16_t dac_comp);
/**
*@brief phy_dfe_dc_comp_get.
*
* dc offset comp
*
*@param gain_idx [gain index as 0/1/2/3.]
*@param dac_comp [comp value]
*@exception [none.]
*@return dc_offset [dc offset.]
*/
uint16_t phy_dfe_dc_comp_get(uint8_t gain_idx);
/**
*@brief phy_tx_gain_factor_set.
*
* TX power scaling in TimeDomain, range is from -12dB to +12dB,
* step is 1dB. The format is 2'comp. Default is 0dB.
*
*@param pwr_scale_factor [20~0~12 : -12~0~12 dB]
*@exception [none.]
*@return [none.]
*/
void phy_tx_gain_factor_set(uint8_t pwr_scale_factor);
/**
*@brief phy_tx_gain_factor_get.
*
* TX power scaling in TimeDomain, range is from -12dB to +12dB,
* step is 1dB. The format is 2'comp. Default is 0dB.
*
*@param [none.]
*@exception [none.]
*@return [tx gain factor value.]
*/
uint8_t phy_tx_gain_factor_get(void);
uint32_t phy_add_dc_cal_cnt();
uint32_t phy_add_overstress_cnt();
/**
*@brief phy_rx_nf_by_rxtd_get.
*
* calcualte noise floor,
*
*@dly_value [2^dly_value * 2.6us: sw_cal_noise_dly_exp]
*@return [noise floor value.]
*/
uint8_t phy_rx_nf_by_rxtd_get(uint8_t dly_value);
/**
*@brief phy_adc_mon_sel_set.
*@param en [true,false]
*@exception [none.]
*@return [none.]
*/
void phy_adc_mon_sel_set(bool_t en);
/**
*@brief phy_ctrl_tx_always_en.
* enable or disable tx always function.
*
*@param en [0:disable, 1:enable]
*@exception [none.]
*@return [none.]
*/
void phy_ctrl_tx_always_en(bool_t en);
/**
*@brief phy_agc_rcv_tgt_set.
* set agc target power by auto gain.
*
*@param tgt_pwr [the target power for setting.]
*@param low [the target power for low threshold.]
*@param hi [the target power for high threshold]
*@exception [none.]
*@return [none.]
*/
void phy_agc_rcv_tgt_set(uint8_t tgt_pwr, uint8_t low, uint8_t hi);
/**
*@brief phy_tx_rms_get
* get current td rms value.
*@param rate_id [0/1/2.]
*@param hw_band_id [full,low,high]
*@param integer [integer part of return rms]
*@param frac [frac part of return rms]
*@exception [none.]
*@return [none.]
*/
void phy_tx_rms_get(uint32_t rate_id, \
uint32_t hw_band_id, uint16_t *integer, uint8_t *frac);
/**
*@brief phy_pld_gi_set
* set plg gi1 value.
*@exception [none.]
*@return [rms integer and frac.]
*/
void phy_pld_gi1_set(uint16_t gi1);
/**
*@brief phy_sg_bmcs_pream_num_set
* set sofeware nsg bmcs preamble number.
*@param band0_pnum [band0 preamble number]
*@param band1_pnum [band1 preamble number]
*@param band2_pnum [band2 preamble number]
*@exception [none.]
*@return [none.]
*/
void phy_sg_bmcs_pream_num_set( \
uint8_t band0_pnum, uint8_t band1_pnum, uint8_t band2_pnum);
/**
*@brief phy_sg_emcs_pream_num_get
* get current preamble num.
*@param hw_band_id [full,low,high]
*@return [preamble number]
*/
uint32_t phy_sg_bmcs_pream_num_get(uint32_t hw_band_id);
/**
*@brief phy_sg_emcs_pream_num_set
* set current td rms value.
*@param rate_id [0/1/2.]
*@param hw_band_id [full,low,high]
*@param integer [integer part of return rms]
*@param frac [frac part of return rms]
*@exception [none.]
*@return [none.]
*/
void phy_sg_emcs_pream_num_set( \
uint8_t band0_pnum, uint8_t band1_pnum, uint8_t band2_pnum);
/**
*@brief phy_sg_emcs_pream_num_get
* get current preamble num.
*@param hw_band_id [full,low,high]
*@return [preamble number]
*/
uint32_t phy_sg_emcs_pream_num_get(uint32_t hw_band_id);
/**
*@brief phy_agc_rcv_tgt_get
* get rx target power, hi and low threshold.
*@param tgt_pwr [target power.]
*@param low [low threshold.]
*@param hi [hi threshold.]
*@exception [none.]
*@return [rms integer and frac.]
*/
void phy_agc_rcv_tgt_get(uint8_t *tgt_pwr, uint8_t *low, uint8_t *hi);
/**
*@brief phy_agc_ramup_restart_dis_set.
* disable agc ramup restart
*@param up_rst_dis [true or false.]
*@exception [none.]
*@return [none.]
*/
void phy_agc_ramup_restart_dis_set(bool_t up_rst_dis);
/**
*@brief phy_agc_drop_restart_dis_set.
* disable agc drop restart.
*@param drop_rst_dis [true or false.]
*@exception [none.]
*@return [none.]
*/
void phy_agc_drop_restart_dis_set(bool_t drop_rst_dis);
/**
*@brief phy_agc_sat_jug_cnt_set.
* config sat judge counter.
*@param jug_cnt [judge counter.]
*@exception [none.]
*@return [none.]
*/
void phy_agc_sat_jug_cnt_set(uint8_t jug_cnt);
/**
*@brief phy_agc_sat_adj_set.
*@param sat_dis [true or false.]
*@param adj_dis [true or false.]
*@exception [none.]
*@return [none.]
*/
void phy_agc_sat_adj_set(bool_t sat_dis, bool_t adj_dis);
/**
*@brief phy_agc_sat_rst_dis_set.
*@param rst_dis [true or false.]
*@exception [none.]
*@return [none.]
*/
void phy_agc_sat_rst_dis_set(bool_t rst_dis);
/**
*@brief phy_gain_get_from_agc
* get current average gain.
*@exception [none.]
*@return [current gain.]
*/
int8_t phy_gain_get_from_agc();
/**
*@brief phy_gain_tab_load
* load gain table to phy internal buffer.
*
*@param table [gain table pointer]
*@exception [none.]
*@return [current gain.]
*/
void phy_gain_tab_load(const uint32_t *table);
/**
*@brief phy_rxtd_gain_get
* get current gain.
*
*@exception [none.]
*@return [current gain.]
*/
int8_t phy_rxtd_gain_get();
/**
* @brief phy_set_rx_abort_rx_phase_force_from_isr()
* -- config force rx abort/rx phase;
* @param: rxabort_enable -- 1: enable, 0: disable;
* @param: rx_phase_enable -- 1: enable, 0: disable;
* @param: hw_phase -- hw phase;
*
* @return none
*/
void phy_set_rx_abort_rx_phase_force_from_isr(uint32_t rxabort_enable,
uint32_t rx_phase_enable, uint8_t hw_phase);
/**
*@brief phy_rxfd_pkt_det_thd_set
* set packet detect threshold in frequency domain.
*
*@param thr0 [threshold 0]
*@param thr1 [threshold 1]
*@exception [none.]
*@return [none.]
*/
void phy_rxfd_pkt_det_thd_set(uint8_t thr0, uint8_t thr1);
/**
*@brief phy_rxfd_pkt_det_thd_set
* get packet detect threshold in frequency domain.
*
*@param thr0 [threshold 0 pointer]
*@param thr1 [threshold 1 pointer]
*@exception [none.]
*@return [none.]
*/
void phy_rxfd_pkt_det_thd_get(uint8_t *thr0, uint8_t *thr1);
/**
*@brief phy_rxfd_frame_sync_set
* set frame sync threshold in frequency domain.
*
*@param sync_thr [sync threshold]
*@exception [none.]
*@return [none.]
*/
void phy_rxfd_frame_sync_set(uint8_t sync_thr);
/**
*@brief phy_rxfd_rate_offset_set
* set csi rate1 in rx frequency domain.
*
*@param offset [csi1 rate]
*@exception [none.]
*@return [none.]
*/
void phy_rxfd_rate_offset_set(uint16_t offset);
void phy_enable_hw_interrupt_cpu1(uint32_t irq_type);
/**
*@brief phy_set_all0_fcs_error
* set all 0 fc to be fcs error
*
*@param to_err [treat as error if all fc all 0s]
*@exception [none.]
*@return [0]
*/
uint32_t phy_set_all0_fcs_error(uint32_t to_err);
/**
*@brief phy_env_pre_check.
*
* check current environment if ok or not.
*
*@param mac_proto [description:
* 0 - PLC_PROTO_TYPE_SG (smart grid)
* 1 - PLC_PROTO_TYPE_GP (green grid)
* 2 - PLC_PROTO_TYPE_AV
* 3 - PLC_PROTO_TYPE_SPG (southern power grid)]
*@param band_id [ref to phy_bb.h, 100-230, 80-490 etc.]
*@param mask_id [description:
* 0 - TONE_MASK_ID_NULL
* 1 - TONE_MASK_ID_SG0
* 2 - TONE_MASK_ID_SG1
* 3 - TONE_MASK_ID_GP]
*@exception [none.]
*@return [true: ok, ohters: fail.]
*/
bool_t phy_env_pre_check( \
uint32_t mac_proto, \
uint32_t band_id, \
uint32_t mask_id);
/**
*@brief phy_agc_step_set.
*
* set different agc step.
*
*@param step_ls [agc acc step ls.]
*@param step_hs [agc acc step hs.]
*@exception [none.]
*@return [none.]
*/
void phy_agc_step_set(uint8_t step_ls, uint8_t step_hs);
/**
*@brief phy_dc_block_set.
*
* dc block control.
*
*@param set_val [0: enable dc blocker, 1: pypass.]
*@exception [none.]
*@return [none.]
*/
void phy_dc_block_set(uint8_t set_val);
/**
*@brief phy_get_cal_ppm_in_pib. get phy cal ppm in pib.
*
*@exception [none.]
*@return [phy_cal_ppm_in_oem.]
*/
int16_t phy_get_cal_ppm_in_pib();
/**
*@brief phy_agc_seg_num_set.
*@param seg_num [seg pwr num.]
*@exception [none.]
*@return [none.]
*/
void phy_agc_seg_num_set(uint8_t seg_num);
/**
*@brief phy_agc_sat_seg_en.
*@param seg_num [1: enable, 0: disable.]
*@exception [none.]
*@return [none.]
*/
void phy_agc_sat_seg_en(uint8_t en);
/**
*@brief phy_set_soft_shift0. set soft shift0.
*@param value shift value
*
*@exception [none.]
*@return [none.]
*/
void phy_set_soft_shift0(uint32_t value);
/**
*@brief phy_set_g_mt_mode_sel. set phy g_mt_mode.
*@param mode set to the mode
*
*@exception [none.]
*@return [none.]
*/
void phy_set_g_mt_mode_sel(uint32_t mode);
/**
*@brief phy_get_g_mt_mode_sel. get phy g_mt_mode.
*@param none
*
*@exception [none.]
*@return [phy g_mt_mode]
*/
uint32_t phy_get_g_mt_mode_sel(void);
#ifdef __cplusplus
}
#endif
#endif // !PHY_BB_H
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