119 lines
		
	
	
		
			3.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			119 lines
		
	
	
		
			3.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/****************************************************************************
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Copyright(c) 2019 by Aerospace C.Power (Chongqing) Microelectronics. ALL RIGHTS RESERVED.
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This Information is proprietary to Aerospace C.Power (Chongqing) Microelectronics and MAY NOT
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be copied by any method or incorporated into another program without
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the express written consent of Aerospace C.Power. This Information or any portion
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thereof remains the property of Aerospace C.Power. The Information contained herein
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is believed to be accurate and Aerospace C.Power assumes no responsibility or
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liability for its use in any way and conveys no license or title under
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any patent or copyright and makes no representation or warranty that this
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Information is free from patent or copyright infringement.
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****************************************************************************/
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/* os shim includes */
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#include "iot_config.h"
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#include "os_types.h"
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#include "hw_reg_api.h"
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#include "iot_mem.h"
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/* plc public api includes */
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#include "plc_fr.h"
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#include "plc_const.h"
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#include "iot_bitops.h"
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/* adc api includes */
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#include "sadc.h"
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#include "sadc_hw.h"
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#include "iot_adc_api.h"
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#include "pmu_hw.h"
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#include "phy_temperature.h"
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#if PLC_PHY_SUPPORT_TEMPERATURE
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static phy_temperature_ctxt_t phy_tempt_ctxt;
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void phy_temperature_adc_init(void)
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{
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#if HW_PLATFORM >= HW_PLATFORM_FPGA
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    /* pmu reset */
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    pmu_soft_reset(SADC_CH1_SOFT_RST_OFFSET);
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    /* adc init */
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    sadc_init(ANA_SADC0, NULL);
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    /* phase mode init */
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    sadc_phase_mode_set(ANA_SADC0, 0);
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    /* phase 0 select mapping mux 0 */
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    sadc_phase_sel_scl_mux(SADC_PHASE0, ADC_CHANNEL0);
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    /* set gain to 1/2 */
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    sadc_adc_gain_set(ADC_CHANNEL0, 0);
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    /* mtr sel scl from meter vtem */
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    sadc_mtr_sel_scl_mux(SADC_PHASE0,SADC_TSW_MTR_SEL_MUX_MODE_VTMP);
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    /* start sadc */
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    sadc_start_en(ANA_SADC0, 1);
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    /* set channel sample time */
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    sadc_discard_num_set(ANA_SADC0, SADC_PHASE0, 6);
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    /* select refer voltage as gnd */
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    sadc_vcm_sel_mux_set(ANA_SADC0, SADC_PHASE0, ANA_SADC_VCM_SEL_GND);
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#endif //#if HW_PLATFORM >= HW_PLATFORM_FPGA
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}
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void phy_temperature_adc_scan(void)
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{
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#if HW_PLATFORM >= HW_PLATFORM_FPGA
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    uint32_t val;
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    if (sadc_check_data_vld(ANA_SADC0, 0))
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    {
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        val = sadc_data_get(ANA_SADC0, 0);
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        sadc_data_vld_clr(ANA_SADC0,0);
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        val &= 0xffffff;
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        /* recover gain to 1 */
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        val <<= 1;
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        /* check valid raw data */
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        if (val < RAW_DATA_VALID_MIN) {
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            val = RAW_DATA_VALID_MIN;
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        } else if (val > RAW_DATA_VALID_MAX) {
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            val = RAW_DATA_VALID_MAX;
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        }
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        /* count for valid average data */
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        if (phy_tempt_ctxt.cnt < TEMPT_DATA_SKIP) {
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            phy_tempt_ctxt.cnt++;
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        }
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        /* calc average raw data */
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        phy_tempt_ctxt.tempt_raw_data = phy_tempt_ctxt.tempt_raw_data -
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            (phy_tempt_ctxt.tempt_raw_data >> NEW_RAW_WEIGHT) +
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            (val >> NEW_RAW_WEIGHT);
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    }
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#endif //#if HW_PLATFORM >= HW_PLATFORM_FPGA
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}
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float phy_temperature_val_get(void)
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{
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    /* make sure return value is valid */
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    if (phy_tempt_ctxt.cnt < TEMPT_DATA_SKIP) {
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        return 0;
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    }
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    /* convert the adc value to real temperature */
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    phy_tempt_ctxt.cur_tempt_val = (float)RAW_TO_TEMP(phy_tempt_ctxt.tempt_raw_data);
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    if (phy_tempt_ctxt.cur_tempt_val < TEMP_VAL_MIN) {
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        phy_tempt_ctxt.cur_tempt_val = TEMP_VAL_MIN;
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    }
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    if (phy_tempt_ctxt.cur_tempt_val > TEMP_VAL_MAX) {
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        phy_tempt_ctxt.cur_tempt_val = TEMP_VAL_MAX;
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    }
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    return phy_tempt_ctxt.cur_tempt_val;
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}
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#endif  //#if PLC_PHY_SUPPORT_TEMPERATURE > 0
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